76 lines
1.7 KiB
Makefile
76 lines
1.7 KiB
Makefile
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# Copyright (C) 2014 Apple Inc. All rights reserved.
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#
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# This document is the property of Apple Inc.
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# It is considered confidential and proprietary.
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#
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# This document may not be reproduced or transmitted in any form,
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# in whole or in part, without the express written permission of
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# Apple Inc.
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#
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LOCAL_DIR := $(GET_LOCAL_DIR)
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TARGET_DIR := $(LOCAL_DIR)
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OPTIONS += \
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DIALOG_D2255=1
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# XXX darrin -- These aren't correct.
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# However, they aren't used unless doing clpc,
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# which we don't expect to do on this platform
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OPTIONS +=\
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BUCK_CPU=0 \
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BUCK_CPU_RAM=7 \
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BUCK_SOC=2 \
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BUCK_GPU=1 \
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BUCK_GPU_RAM=8 \
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# XXX darrin -- These haven't been reviewed yet
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OPTIONS+= \
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TARGET_BOOT_CPU_VOLTAGE=0 \
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TARGET_BOOT_RAM_VOLTAGE=0 \
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TARGET_BOOT_SOC_VOLTAGE=0
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# VID0 is 74.25MHz pixel clock from SPARE0 (PLL2) = (24/2•99)/(15+1)
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OPTIONS+= \
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TARGET_SPARE0_CLK_CFG=0x82000001 \
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TARGET_VID0_CLK_CFG=0x81100000 \
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PLL2_T=1 \
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PLL2_P=2 \
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PLL2_M=99 \
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PLL2_S=15 \
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OPTIONS+= \
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DISPLAY_APPLE_TV_TUNABLES=1 \
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TARGET_DITHER_TYPE=DITHER_BLUE_NOISE \
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WITH_HW_DISPLAY_DISPLAYPORT=1 \
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DP_DTPATH=\"arm-io/displayport0\" \
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DPPHY_DTPATH=\"arm-io/lpdp-phy0\" \
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xOPTIONS+= \
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\
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TARGET_CORE_PHY_TMR_LPCLK_CFG=0x00330087 \
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TARGET_CORE_PHY_TMR_CFG=0x256f0000 \
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TARGET_PHY_STOP_WAIT_TIME=0x28 \
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OPTIONS+= \
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TARGET_DWI_FREQUENCY=24000000 \
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TARGET_DWI_TRANSFER_GAP_US=2.5 \
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OPTIONS+= \
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BT_DTPATH=\"arm-io/uart4/bluetooth\" \
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WIFI_DTPATH=\"arm-io/uart3/wlan\" \
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ETHERNET_DTPATH=\"arm-io/apcie/pci-bridge2/lan0\"
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OPTIONS += \
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DCS_NUM_RANKS=1 \
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DCS_NUM_CHANNELS=8
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GLOBAL_INCLUDES += $(LOCAL_DIR)/include
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ALL_OBJS += $(LOCAL_DIR)/init.o \
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$(LOCAL_DIR)/pinconfig.o
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ifneq ($(PRODUCT),LLB)
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ALL_OBJS += \
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$(LOCAL_DIR)/properties.o
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endif
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