37 lines
2.7 KiB
C
37 lines
2.7 KiB
C
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/*
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* Copyright (C) 2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef _PL080DMAC_REGS_H
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#define _PL080DMAC_REGS_H
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#include <platform/soc/hwregbase.h>
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#define rPL080DMAC_INTSTATUS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0000)
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#define rPL080DMAC_INTTCSTATUS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0004)
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#define rPL080DMAC_INTTCCLR(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0008)
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#define rPL080DMAC_INTERRSTATUS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x000C)
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#define rPL080DMAC_INTERRCLR(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0010)
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#define rPL080DMAC_RAWINTTCSTATUS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0014)
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#define rPL080DMAC_RAWINTERRSTATUS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0018)
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#define rPL080DMAC_ENBLDCHNLS(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x001C)
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#define rPL080DMAC_SOFTBREQ(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0020)
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#define rPL080DMAC_SOFTSREQ(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0024)
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#define rPL080DMAC_SOFTLBREQ(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0028)
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#define rPL080DMAC_SOFTLSREQ(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x002C)
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#define rPL080DMAC_CFG(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0030)
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#define rPL080DMAC_SYNC(_n) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0034)
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#define rPL080DMAC_CHSRCADDR(_n, _c) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0100 + ((_c) * 0x20))
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#define rPL080DMAC_CHDESTADDR(_n, _c) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0104 + ((_c) * 0x20))
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#define rPL080DMAC_CHLLI(_n, _c) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0108 + ((_c) * 0x20))
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#define rPL080DMAC_CHCTRL(_n, _c) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x010C + ((_c) * 0x20))
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#define rPL080DMAC_CHCFG(_n, _c) *(volatile uint32_t *)(PL080DMAC_BASE_ADDR + ((_n) * PL080DMAC_SPACING) + 0x0110 + ((_c) * 0x20))
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#endif /* _PL080DMAC_REGS_H */
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