93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
/*
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* Copyright (c) 2009-2010 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef _SDIO_CCCR_H_
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#define _SDIO_CCCR_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum SDIOCccrRegisterAddress
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{
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kSDIOCccrRevisionAddr = 0x00,
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kSDIOCccrSpecRevAddr = 0x01,
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kSDIOCccrIOEnableAddr = 0x02,
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kSDIOCccrIOReadyAddr = 0x03,
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kSDIOCccrIntEnableAddr = 0x04,
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kSDIOCccrIntPendingAddr = 0x05,
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kSDIOCccrIOAbortAddr = 0x06,
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kSDIOCccrBusInterfaceControlAddr= 0x07,
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kSDIOCccrCardCapabilityAddr = 0x08,
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kSDIOCccrCommonCISPtrLowAddr = 0x09,
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kSDIOCccrCommonCISPtrMidAddr = 0x0A,
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kSDIOCccrCommonCISPtrHighAddr = 0x0B,
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kSDIOCccrBusSuspendAddr = 0x0C,
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kSDIOCccrFunctionSelectAddr = 0x0D,
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kSDIOCccrExecFlagsAddr = 0x0E,
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kSDIOCccrReadyFlagsAddr = 0x0F,
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kSDIOCccrFn0BlockSizeLSBAddr = 0x10,
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kSDIOCccrFn0BlockSizeMSBAddr = 0x11,
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kSDIOCccrPowerControlAddr = 0x12,
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kSDIOCccrHighSpeedAddr = 0x13,
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};
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// Bus Interface Control
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enum SDIOCccrBusInterfaceControlMask
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{
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kSDIOCccrBusWidthMask = (1 << 1) | (1 << 0),
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};
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enum SDIOCccrBusInterfaceControl
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{
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kSDIOCccrBusIfWidth1Bit = ((0 << 1)|(0 << 0)),
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kSDIOCccrBusIfWidth4Bit = ((1 << 1)|(0 << 0)),
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kSDIOCccrBusIfContinuousSPIIntEnabled = (1 << 5),
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kSDIOCccrBusIfContinuousSPIInt = (1 << 6),
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kSDIOCccrBusIfCardDetectDisable = (1 << 7),
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};
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// Card Capabilities
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enum SDIOCccrCardCapability
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{
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kSDIOCccrCapDirectCommands = (1 << 0),
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kSDIOCccrCapMultiBlock = (1 << 1),
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kSDIOCccrCapReadWait = (1 << 2),
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kSDIOCccrCapSuspendResume = (1 << 3),
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kSDIOCccrCap4BitIntraBlockInt = (1 << 4),
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kSDIOCccrCap4BitIntraBlockIntEnable = (1 << 5),
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kSDIOCccrCapLowSpeed = (1 << 6),
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kSDIOCccrCap4BitLowSpeed = (1 << 7),
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};
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// High Speed
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enum SDIOCccrHighSpeed
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{
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kSDIOCccrHighSpeedSupported = (1 << 0),
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kSDIOCccrHighSpeedEnabled = (1 << 1),
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SDIO_CCCR_H_ */
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