137 lines
6.5 KiB
C
137 lines
6.5 KiB
C
/*
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* Copyright (C) 2007 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Computer, Inc.
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*/
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#ifndef __SAMSUNG_SPI_H
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#define __SAMSUNG_SPI_H
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#include <platform/soc/hwregbase.h>
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#define rSPCLKCON0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x00))
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#define rSPCON0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x04))
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#define rSPSTA0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x08))
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#define rSPPIN0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x0C))
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#define rSPTDAT0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x10))
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#define rSPRDAT0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x20))
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#define rSPPRE0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x30))
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#define rSPCNT0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x34))
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#define rSPIDD0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x38))
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#define rSPIRTO0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x3C))
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#define rSPIHANGD0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x40))
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#define rSPISWRST0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x44))
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#define rSPIVER0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x48))
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#define rSPTDCNT0 (*(volatile u_int32_t *)(SPI0_BASE_ADDR + 0x4C))
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#define rSPCLKCON1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x00))
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#define rSPCON1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x04))
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#define rSPSTA1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x08))
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#define rSPPIN1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x0C))
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#define rSPTDAT1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x10))
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#define rSPRDAT1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x20))
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#define rSPPRE1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x30))
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#define rSPCNT1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x34))
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#define rSPIDD1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x38))
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#define rSPIRTO1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x3C))
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#define rSPIHANGD1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x40))
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#define rSPISWRST1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x44))
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#define rSPIVER1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x48))
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#define rSPTDCNT1 (*(volatile u_int32_t *)(SPI1_BASE_ADDR + 0x4C))
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#define rSPCLKCON2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x00))
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#define rSPCON2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x04))
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#define rSPSTA2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x08))
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#define rSPPIN2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x0C))
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#define rSPTDAT2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x10))
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#define rSPRDAT2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x20))
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#define rSPPRE2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x30))
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#define rSPCNT2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x34))
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#define rSPIDD2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x38))
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#define rSPIRTO2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x3C))
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#define rSPIHANGD2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x40))
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#define rSPISWRST2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x44))
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#define rSPIVER2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x48))
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#define rSPTDCNT2 (*(volatile u_int32_t *)(SPI2_BASE_ADDR + 0x4C))
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#define rSPCLKCON3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x00))
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#define rSPCON3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x04))
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#define rSPSTA3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x08))
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#define rSPPIN3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x0C))
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#define rSPTDAT3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x10))
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#define rSPRDAT3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x20))
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#define rSPPRE3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x30))
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#define rSPCNT3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x34))
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#define rSPIDD3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x38))
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#define rSPIRTO3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x3C))
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#define rSPIHANGD3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x40))
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#define rSPISWRST3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x44))
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#define rSPIVER3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x48))
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#define rSPTDCNT3 (*(volatile u_int32_t *)(SPI3_BASE_ADDR + 0x4C))
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#define rSPCLKCON4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x00))
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#define rSPCON4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x04))
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#define rSPSTA4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x08))
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#define rSPPIN4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x0C))
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#define rSPTDAT4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x10))
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#define rSPRDAT4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x20))
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#define rSPPRE4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x30))
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#define rSPCNT4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x34))
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#define rSPIDD4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x38))
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#define rSPIRTO4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x3C))
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#define rSPIHANGD4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x40))
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#define rSPISWRST4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x44))
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#define rSPIVER4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x48))
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#define rSPTDCNT4 (*(volatile u_int32_t *)(SPI4_BASE_ADDR + 0x4C))
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#if SPI_VERSION == 0
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#define SPICON_SHIFT_OFFSET0 (0)
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#define SPICON_SHIFT_OFFSET1 (0)
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#define SPICON_SHIFT_OFFSET2 (0)
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#else
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#define SPICON_SHIFT_OFFSET0 (2)
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#define SPICON_SHIFT_OFFSET1 (3)
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#define SPICON_SHIFT_OFFSET2 (-1)
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#endif
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#define SPICON_AGD_SHIFT (0)
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#define SPICON_CPHA_SHIFT (1)
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#define SPICON_CPOL_SHIFT (2)
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#define SPICON_MASTER_SHIFT (3)
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#define SPICON_CLK_EN_SHIFT (4)
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#define SPICON_MODE_SHIFT (5)
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#define SPICON_IE_RX_SHIFT (7)
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#define SPICON_IE_TR_SHIFT (8)
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#define SPICON_IE_MME_SHIFT (9)
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#define SPICON_IE_DCE_SHIFT (10)
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#define SPICON_MSBFT_SHIFT (11 + SPICON_SHIFT_OFFSET0)
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#define SPICON_CLK_SEL_SHIFT (12 + SPICON_SHIFT_OFFSET0)
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#define SPICON_BIT_LEN_SHIFT (13 + SPICON_SHIFT_OFFSET0)
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#define SPICON_DMA_SIZE_SHIFT (15 + SPICON_SHIFT_OFFSET0)
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#define SPICON_DATA_SWAP_SHIFT (16 + SPICON_SHIFT_OFFSET1)
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#define SPICON_RX_DELAY_SHIFT (17 + SPICON_SHIFT_OFFSET1)
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#define SPICON_IE_TX_SHIFT (21)
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#define SPICON_DELAY_SEL_SHIFT (27 + SPICON_SHIFT_OFFSET2)
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#if SPI_VERSION == 0
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#define SPI_FIFO_BITS (4)
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#define SPSTA_TX_FIFO_BIT_LO (4)
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#define SPSTA_RX_FIFO_BIT_LO (8)
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#else
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#define SPI_FIFO_BITS (5)
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#define SPSTA_TX_FIFO_BIT_LO (6)
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#define SPSTA_RX_FIFO_BIT_LO (11)
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#endif
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#define SPSTA_TX_FIFO_BIT_HI (SPSTA_TX_FIFO_BIT_LO + SPI_FIFO_BITS - 1)
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#define SPSTA_RX_FIFO_BIT_HI (SPSTA_RX_FIFO_BIT_LO + SPI_FIFO_BITS - 1)
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#define SPI_FIFO_SIZE (1 << (SPI_FIFO_BITS - 1))
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#endif /* __SAMSUNG_SPI_H */
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