211 lines
12 KiB
C
211 lines
12 KiB
C
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/*
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* Copyright (C) 2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/*
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* This file is only a database of the frequencies used by CPU and GPU, it has no access
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* To the chip.
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*/
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#include <platform.h>
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#include <platform/soc/operating_point.h>
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#include <platform/soc/chipid.h>
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#define CHIP_ID_ALL 0
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#define DELIMITER CHIPID_ALL_VOLTAGE_LAST
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static const struct operating_point_params operating_point_params[] = {
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// GPU
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{.chipid_max = DELIMITER, .chip_id = 0x8000, .voltage_type = CHIPID_GPU_VOLTAGE},
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// P M S
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// | | |
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{{.gpu = {CHIPID_GPU_VOLTAGE_OFF,0,0, 0, 0, 0}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_340,0,0, 2,170, 5}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_474,0,0, 2,158, 3}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_550,0,0, 3,275, 3}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_616,0,0, 3,154, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_723,0,0, 1, 90, 2}}}, // It's 720 now for <rdar://problem/22294854> Change GPU & SoC PLL settings to recover yield
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{{.gpu = {CHIPID_GPU_VOLTAGE_804,0,0, 1, 67, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_850,0,0, 6,425, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_900,0,0, 1, 75, 1}}},
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{.chipid_max = DELIMITER, .chip_id = 0x8003, .voltage_type = CHIPID_GPU_VOLTAGE},
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// P M S
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// | | |
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{{.gpu = {CHIPID_GPU_VOLTAGE_OFF,0,0, 0, 0, 0}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_340,0,0, 2, 85, 2}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_474,0,0, 2, 79, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_550,0,0, 4,275, 2}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_723,0,0, 4,241, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_804,0,0, 1, 67, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_850,0,0, 6,425, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_900,0,0, 1, 75, 1}}},
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{.chipid_max = DELIMITER, .chip_id = 0x8001, .voltage_type = CHIPID_GPU_VOLTAGE},
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// P M S
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// | | |
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{{.gpu = {CHIPID_GPU_VOLTAGE_OFF,0,0, 0, 0, 0}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_360,0,0, 1, 60, 3}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_520,0,0, 1, 65, 2}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_650,0,0, 6,325, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_723,0,0, 4,241, 1}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_800,0,0, 3,100, 0}}},
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{{.gpu = {CHIPID_GPU_VOLTAGE_804,0,0, 1, 67, 1}}},
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// S8000 B0
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{.chipid_max = DELIMITER, .chip_id = 0x8000, .voltage_type = CHIPID_CPU_VOLTAGE, .chip_rev = CHIP_REVISION_B0},
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// bypass
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// | clkSrc
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// | | P M S biuDiv4HiVol
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// | | | | | | biuDiv4LoVol
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// | | | | | | | dvmrMaxWgt
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// | | | | | | | | iexrfCfgWrData
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// | | | | | | | | | iexrfCfgWrIdxa
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// | | | | | | | | | | iexrfCfgWrIdxb
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// | | | | | | | | | | | exrfCfgWrIdxmuxsel
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// | | | | | | | | | | | | nrgAccScaleTab(Ext)
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// | | | | | | | | | | | | | lkgEstTab(Ext)
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// | | | | | | | | | | | | | | dpe0DvfmTab(Ext)
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// | | | | | | | | | | | | | | |
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{{{CHIPID_CPU_VOLTAGE_BYPASS, 0, 0, 0, 0, 0, 2, 2, 0xf, 1, 0, 0, 0, 0x1, 0x1, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_SECUREROM,1, 1, 1, 50, 3, 2, 2, 0xf, 1, 0, 0, 0, 0x1, 0x1, 0xff}}}, // 300MHz
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{{{CHIPID_CPU_VOLTAGE_396, 0, 1, 1, 66, 3, 2, 2, 0xf, 1, 0, 0, 0, 0x37, 0x30, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_600, 0, 1, 1, 75, 2, 2, 3, 0xf, 1, 0, 0, 0, 0x3e, 0x1f, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_912, 0, 1, 1, 76, 1, 4, 4, 0xf, 1, 0, 0, 0, 0x53, 0x14, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1200, 0, 1, 1, 50, 0, 4, 5, 0xf, 1, 0, 0, 0, 0x66, 0x0f, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1512, 0, 1, 1, 63, 0, 5, 6, 0xf, 1, 0, 0, 0, 0x88, 0x0c, 0xd7}}},
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{{{CHIPID_CPU_VOLTAGE_1800, 0, 1, 1, 75, 0, 6, 7, 0xf, 1, 0, 0, 0, 0xbf, 0x0b, 0x97}}},
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{{{CHIPID_CPU_VOLTAGE_1848, 0, 1, 1, 77, 0, 6, 7, 0x2, 1, 0, 0, 0, 0xbf, 0x0a, 0x93}}},
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{{{CHIPID_CPU_VOLTAGE_1896, 0, 1, 1, 79, 0, 6, 7, 0x2, 1, 0, 0, 0, 0xc5, 0x16, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1992, 0, 1, 1, 83, 0, 6, 7, 0xf, 1, 0, 0, 0, 0xc8, 0x15, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_2112, 0, 1, 1, 88, 0, 7, 0, 0x2, 1, 0, 0, 0, 0xc8, 0x14, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_396_WA, 0, 1, 1, 82, 4, 2, 2, 0xf, 1, 0, 0, 0, 0x37, 0x30, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1200_WA, 0, 1, 1, 76, 1, 4, 5, 0xf, 1, 0, 0, 0, 0x66, 0x0f, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1512_WA, 0, 1, 1, 76, 1, 5, 6, 0xf, 1, 0, 0, 0, 0x88, 0x0c, 0xd7}}},
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// S8000 A1
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{.chipid_max = DELIMITER, .chip_id = 0x8000, .voltage_type = CHIPID_CPU_VOLTAGE},
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// bypass
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// | clkSrc
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// | | P M S biuDiv4HiVol
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// | | | | | | biuDiv4LoVol
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// | | | | | | | dvmrMaxWgt
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// | | | | | | | | iexrfCfgWrData
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// | | | | | | | | | iexrfCfgWrIdxa
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// | | | | | | | | | | iexrfCfgWrIdxb
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// | | | | | | | | | | | exrfCfgWrIdxmuxsel
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// | | | | | | | | | | | | nrgAccScaleTab(Ext)
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// | | | | | | | | | | | | | lkgEstTab(Ext)
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// | | | | | | | | | | | | | | dpe0DvfmTab(Ext)
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// | | | | | | | | | | | | | | |
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{{{CHIPID_CPU_VOLTAGE_BYPASS, 0, 0, 0, 0, 0, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_SECUREROM,1, 1, 1, 50, 3, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}}, // 300MHz
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{{{CHIPID_CPU_VOLTAGE_396, 0, 1, 1, 66, 3, 2, 2, 0xf, 0, 0, 0, 0, 0x3e, 0x46, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_600, 0, 1, 1, 50, 1, 2, 3, 0xf, 0, 0, 0, 0, 0x44, 0x2f, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_912, 0, 1, 1, 76, 1, 4, 4, 0xf, 0, 0, 0, 0, 0x5b, 0x1d, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1200, 0, 1, 1, 50, 0, 4, 5, 0xf, 0, 0, 0, 0, 0x74, 0x16, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1512, 0, 1, 1, 63, 0, 5, 6, 0xf, 0, 0, 0, 0, 0x91, 0x11, 0xd7}}},
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{{{CHIPID_CPU_VOLTAGE_1800, 0, 1, 1, 75, 0, 6, 7, 0xf, 0, 0, 0, 0, 0xaf, 0x0f, 0x97}}},
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{{{CHIPID_CPU_VOLTAGE_1896, 0, 1, 1, 79, 0, 6, 7, 0x2, 0, 0, 0, 0, 0xbc, 0x0e, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1992, 0, 1, 1, 83, 0, 6, 7, 0xf, 0, 0, 0, 0, 0xc8, 0x0d, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_2112, 0, 1, 1, 88, 0, 7, 0, 0x2, 0, 0, 0, 0, 0xc8, 0x0c, 0xff}}},
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// S8001
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{.chipid_max = DELIMITER, .chip_id = 0x8001, .voltage_type = CHIPID_CPU_VOLTAGE},
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// bypass
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// | clkSrc
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// | | P M S biuDiv4HiVol
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// | | | | | | biuDiv4LoVol
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// | | | | | | | dvmrMaxWgt
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// | | | | | | | | iexrfCfgWrData
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// | | | | | | | | | iexrfCfgWrIdxa
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// | | | | | | | | | | iexrfCfgWrIdxb
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// | | | | | | | | | | | exrfCfgWrIdxmuxsel
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// | | | | | | | | | | | | nrgAccScaleTab(Ext)
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// | | | | | | | | | | | | | lkgEstTab(Ext)
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// | | | | | | | | | | | | | | dpe0DvfmTab(Ext)
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// | | | | | | | | | | | | | | |
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{{{CHIPID_CPU_VOLTAGE_BYPASS, 0, 0, 0, 0, 0, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_SECUREROM,1, 1, 1, 75, 6, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}}, // 300MHz
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{{{CHIPID_CPU_VOLTAGE_396, 0, 1, 1, 66, 3, 2, 2, 0xf, 0, 0, 0, 0, 0x3d, 0x2b, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_720, 0, 1, 1, 90, 2, 2, 2, 0xf, 0, 0, 0, 0, 0x4a, 0x17, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1080, 0, 1, 1, 90, 1, 3, 3, 0xf, 0, 0, 0, 0, 0x58, 0x0e, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1440, 0, 1, 1, 60, 0, 4, 4, 0xf, 0, 0, 0, 0, 0x6b, 0x0a, 0xfb}}},
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{{{CHIPID_CPU_VOLTAGE_1800, 0, 1, 1, 75, 0, 5, 5, 0xf, 0, 0, 0, 0, 0x99, 0x08, 0xa8}}},
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{{{CHIPID_CPU_VOLTAGE_2160, 0, 1, 1, 90, 0, 5, 5, 0xf, 0, 0, 0, 0, 0xc1, 0x06, 0x7c}}},
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{{{CHIPID_CPU_VOLTAGE_2256_1core,0,1, 1, 94, 0, 5, 5, 0x2, 0, 0, 0, 0, 0xc1, 0x06, 0x77}}},
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{{{CHIPID_CPU_VOLTAGE_2256, 0, 1, 1, 94, 0, 5, 5, 0xf, 0, 0, 0, 0, 0xc1, 0x06, 0x77}}},
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{{{CHIPID_CPU_VOLTAGE_2352, 0, 1, 1, 98, 0, 5, 5, 0xf, 0, 0, 0, 0, 0xe0, 0x0d, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_2448, 0, 1, 1, 102,0, 6, 6, 0x2, 0, 0, 0, 0, 0xe0, 0x0d, 0xff}}},
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// S8003
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{.chipid_max = DELIMITER, .chip_id = 0x8003, .voltage_type = CHIPID_CPU_VOLTAGE},
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// bypass
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// | clkSrc
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// | | P M S biuDiv4HiVol
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// | | | | | | biuDiv4LoVol
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// | | | | | | | dvmrMaxWgt
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// | | | | | | | | iexrfCfgWrData
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// | | | | | | | | | iexrfCfgWrIdxa
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// | | | | | | | | | | iexrfCfgWrIdxb
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// | | | | | | | | | | | exrfCfgWrIdxmuxsel
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// | | | | | | | | | | | | nrgAccScaleTab(Ext)
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// | | | | | | | | | | | | | lkgEstTab(Ext)
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// | | | | | | | | | | | | | | dpe0DvfmTab(Ext)
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// | | | | | | | | | | | | | | |
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{{{CHIPID_CPU_VOLTAGE_BYPASS, 0, 0, 0, 0, 0, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_SECUREROM,1, 1, 1, 75, 6, 2, 2, 0xf, 0, 0, 0, 0, 0x1, 0x1, 0xff}}}, // 300MHz
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{{{CHIPID_CPU_VOLTAGE_396, 0, 1, 1, 66, 3, 2, 2, 0xf, 0, 0, 0, 0, 0x3a, 0x2c, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_600, 0, 1, 1, 75, 2, 2, 3, 0xf, 0, 0, 0, 0, 0x40, 0x1c, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_912, 0, 1, 1, 76, 1, 4, 4, 0xf, 0, 0, 0, 0, 0x4f, 0x11, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1200, 0, 1, 1,100, 1, 4, 5, 0xf, 0, 0, 0, 0, 0x5e, 0x0d, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1512, 0, 1, 1, 63, 0, 5, 6, 0xf, 0, 0, 0, 0, 0x73, 0x0a, 0xe7}}},
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{{{CHIPID_CPU_VOLTAGE_1800, 0, 1, 1, 75, 0, 6, 7, 0xf, 0, 0, 0, 0, 0x82, 0x08, 0xb6}}},
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{{{CHIPID_CPU_VOLTAGE_1848, 0, 1, 1, 77, 0, 6, 7, 0x2, 0, 0, 0, 0, 0x82, 0x08, 0xb1}}},
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{{{CHIPID_CPU_VOLTAGE_1896, 0, 1, 1, 79, 0, 6, 7, 0xf, 0, 0, 0, 0, 0xa7, 0x10, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_1992, 0, 1, 1, 83, 0, 6, 7, 0xf, 0, 0, 0, 0, 0xb2, 0x10, 0xff}}},
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{{{CHIPID_CPU_VOLTAGE_2112, 0, 1, 1, 88, 0, 7, 0, 0x2, 0, 0, 0, 0, 0xbf, 0x0f, 0xff}}},
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};
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const struct operating_point_params *operating_point_get_params(enum chipid_voltage_index voltage_index, enum chipid_voltage_type voltage_type)
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{
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uint64_t chip_id = chipid_get_chip_id();
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uint64_t chip_rev = chipid_get_chip_revision();
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uint64_t chip_id_in_array = 0;
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uint64_t chip_rev_in_array = 0;
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size_t size = sizeof(operating_point_params)/sizeof(operating_point_params[0]);
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enum chipid_voltage_type voltage_type_in_array = CHIPID_CPU_VOLTAGE;
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size_t found = size;
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for (size_t i = 0; i < size; i++) {
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if (operating_point_params[i].voltage_index == DELIMITER) {
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chip_id_in_array = operating_point_params[i].chip_id;
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chip_rev_in_array = operating_point_params[i].chip_rev;
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voltage_type_in_array = operating_point_params[i].voltage_type;
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continue;
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}
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if ((voltage_type_in_array != voltage_type)) {
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continue;
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}
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if (chip_rev_in_array > chip_rev) {
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continue;
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}
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if ((operating_point_params[i].voltage_index == voltage_index) && ((chip_id_in_array == CHIP_ID_ALL) || (chip_id_in_array == chip_id))) {
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found = i;
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break;
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}
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}
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if (found == size) {
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panic("%s Index %d not found for chipId 0x%llx\n",
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__func__, voltage_index, chip_id);
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}
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return &operating_point_params[found];
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}
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