404 lines
11 KiB
C
404 lines
11 KiB
C
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/*
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* Copyright (C) 2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <cbuffer.h>
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#include <platform.h>
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#include <platform/dockfifo_config.h>
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#include <platform/int.h>
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#include <sys.h>
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#include <sys/task.h>
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#include "cobs.h"
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#include "dockfifo_regs.h"
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#include "endian_tools.h"
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#include "lib/cksum.h"
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// #undef DEBUG_LEVEL
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// #define DEBUG_LEVEL DEBUG_SPEW
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// Slowest rate of polling write fifo when full.
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#define MAX_CHECK_INTERVAL 100000
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// Maximum size of frame before stuffing bytes inserted, not including CRC.
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#define MAX_UNSTUFFED_FRAME (DOCKFIFO_BULK_MRU + 4)
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// Maximum size of frame after stuffing bytes inserted (growing its size).
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// Worst case need 1 extra coding byte per 254 byte segment.
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#define MAX_STUFFED_FRAME (MAX_UNSTUFFED_FRAME + \
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(MAX_UNSTUFFED_FRAME + 253) / 254)
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// Small buffer to help speed up RX transfers.
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#define RX_CBUF_SIZE 256
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struct PacketBuffer {
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uint8_t stuffed_buf[MAX_STUFFED_FRAME];
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uint8_t unstuffed_buf[MAX_UNSTUFFED_FRAME];
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};
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static struct task_event dockfifo_bulk_rx_event;
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static struct PacketBuffer rx_packet;
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static struct PacketBuffer tx_packet;
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// When not in sync, we need a framing byte before accepting input.
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static bool rx_sync = true;
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// Small cbuffer to accelerate reading from the DBGFIFO.
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static CBUFFER rx_cbuf;
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//=======================
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// Local funtions
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//=======================
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static void dockfifo_bulk_fill_rx_cbuf(void)
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{
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size_t min_occupancy = 0;
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size_t bytes = cb_free_space(&rx_cbuf);
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while (bytes > 0) {
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if ((min_occupancy >= 4) && (bytes >= 4)) {
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dprintf(DEBUG_SPEW,
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"dockfifo_bulk_fill_rx_cbuf 4B %d %d\n",
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(int) min_occupancy, (int) bytes);
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// At least 4 bytes available and 4 bytes to read.
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uint32_t rdata_4 =
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rDBGFIFO_R_DATA(DOCKFIFO_BULK_READ, 4);
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cb_write_unsafe(&rx_cbuf,
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(const uint8_t *) &rdata_4, 4);
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bytes -= 4;
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min_occupancy -= 4;
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} else {
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// Read between 1 and 3 bytes, including FIFO status.
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uint32_t to_read = bytes;
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if (to_read > 3) {
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to_read = 3;
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}
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uint32_t rdata_n =
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rDBGFIFO_R_DATA(DOCKFIFO_BULK_READ, to_read);
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// Get FIFO status *before* read took place.
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uint32_t occupancy = rdata_n & 0x7f;
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dprintf(DEBUG_SPEW,
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"dockfifo_bulk_fill_rx_cbuf occ:%d %d %d\n",
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(int) occupancy,
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(int) min_occupancy,
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(int) bytes);
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if (occupancy == 0) {
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// If no bytes were available, break
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// the loop instead of busy polling.
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break;
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}
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// Between 1 and 3 inclusive bytes were pumped
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// from the FIFO.
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uint32_t got_bytes = to_read;
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if (got_bytes > occupancy) {
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got_bytes = occupancy;
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}
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cb_write_unsafe(&rx_cbuf,
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((const uint8_t *) &rdata_n) + 1,
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got_bytes);
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bytes -= got_bytes;
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min_occupancy = occupancy - got_bytes;
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}
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}
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}
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static uint8_t dockfifo_bulk_read_byte(void)
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{
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// Grab a byte from the rx cbuffer if possible.
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int c = cb_getc_unsafe(&rx_cbuf);
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if (c >= 0) {
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return (uint8_t) c;
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}
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// Otherwise, try to fill up the cbuffer.
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for (;;) {
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// Fill cbuffer from DBGFIFO.
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dockfifo_bulk_fill_rx_cbuf();
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// Try again.
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c = cb_getc_unsafe(&rx_cbuf);
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if (c >= 0) {
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return (uint8_t) c;
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}
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// Still nothing - wait for interrupt.
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dprintf(DEBUG_SPEW,
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"dbgfifo_bulk_read_byte wait IRQ avail %d\n",
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(int) (rDBGFIFO_R_STAT(DOCKFIFO_BULK_WRITE) & 0xffff));
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unmask_int(dockfifo_configs[DOCKFIFO_BULK_READ].irq);
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event_wait(&dockfifo_bulk_rx_event);
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dprintf(DEBUG_SPEW,
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"dbgfifo_bulk_read_byte got IRQ avail %d\n",
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(int) (rDBGFIFO_R_STAT(DOCKFIFO_BULK_WRITE) & 0xffff));
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}
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}
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static void dockfifo_bulk_write_byte(uint8_t byte)
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{
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// Wait until the FIFO has at least one byte available.
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uint32_t check_interval = 1;
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while ((rDBGFIFO_W_STAT(DOCKFIFO_BULK_WRITE) & 0xffff) == 0) {
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task_sleep(check_interval);
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check_interval *= 2;
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if (check_interval > MAX_CHECK_INTERVAL) {
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check_interval = MAX_CHECK_INTERVAL;
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}
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}
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rDBGFIFO_W_DATA(DOCKFIFO_BULK_WRITE, 1) = byte;
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}
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static void dockfifo_bulk_write_bytes(const uint8_t *data, size_t count)
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{
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while (count > 0) {
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// Wait until the FIFO has available space.
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uint32_t check_interval = 1;
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uint16_t avail;
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for (;;) {
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avail = rDBGFIFO_W_STAT(DOCKFIFO_BULK_WRITE) & 0xffff;
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if (avail > 0) {
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break;
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}
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task_sleep(check_interval);
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check_interval *= 2;
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if (check_interval > MAX_CHECK_INTERVAL) {
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check_interval = MAX_CHECK_INTERVAL;
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}
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}
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// Fill the available space up to the remaining count.
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size_t fill = (avail < count) ? avail : count;
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// Use 32 bit writes as much as possible.
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for (size_t i = 0; i < fill / sizeof(uint32_t); ++i) {
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uint32_t word;
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memcpy(&word, data, sizeof(word));
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data += sizeof(word);
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rDBGFIFO_W_DATA(DOCKFIFO_BULK_WRITE, 4) = word;
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}
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// Write remaining bits out in a single transaction.
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size_t remainder = fill % sizeof(uint32_t);
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if (remainder > 0) {
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uint32_t word = 0;
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memcpy(&word, data, remainder);
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data += remainder;
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rDBGFIFO_W_DATA(DOCKFIFO_BULK_WRITE, remainder) = word;
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}
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count -= fill;
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}
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}
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static void dockfifo_bulk_interrupt_handler(void *arg)
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{
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int32_t which_bulk = (int32_t) arg;
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if (which_bulk != DOCKFIFO_BULK_READ) {
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panic("dockfifo_bulk_interrupt_handler wrong arg: %d",
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(int) which_bulk);
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}
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// Just mask the interrupt and defer to a task. The hardware
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// FIFO is large and has pacing.
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uint16_t avail = rDBGFIFO_R_STAT(DOCKFIFO_BULK_READ) & 0xffff;
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if (avail > 0) {
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//dprintf(DEBUG_SPEW, "irq with %d data\n", (int) avail);
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mask_int(dockfifo_configs[DOCKFIFO_BULK_READ].irq);
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event_signal(&dockfifo_bulk_rx_event);
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} else {
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dprintf(DEBUG_INFO, "Spurious DBGFIFO bulk irq\n");
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}
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}
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//=======================
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// Global funtions
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//=======================
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int32_t dockfifo_bulk_read_frame(void *buf, size_t bytes, size_t *received)
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{
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*received = 0;
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// Get into sync if necessary.
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while (!rx_sync) {
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uint8_t byte = dockfifo_bulk_read_byte();
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if (byte == 0) {
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dprintf(DEBUG_INFO, "Found sync byte\n");
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rx_sync = true;
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} else {
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dprintf(DEBUG_INFO, "Bulk re-sync, dropping 0x%02x\n",
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byte);
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}
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}
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// Block reading bytes until we have a complete frame.
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size_t pos = 0;
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for (;;) {
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uint8_t byte = dockfifo_bulk_read_byte();
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if (byte == 0) {
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if (pos > 0) {
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// Got non-empty frame.
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dprintf(DEBUG_SPEW, "Got frame, %d bytes\n",
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(int) pos);
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break;
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} else {
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// Allowed to have EOF-SOF combinations.
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dprintf(DEBUG_SPEW, "Ignoring empty frame\n");
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}
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} else if (pos < MAX_STUFFED_FRAME) {
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// Got a data byte, and room to insert it.
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dprintf(DEBUG_SPEW, "Data[%d] = 0x%02x\n",
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(int) pos, byte);
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rx_packet.stuffed_buf[pos] = byte;
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++pos;
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} else {
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// MRU overflow.
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dprintf(DEBUG_INFO, "Bulk overflow 0x%02x\n", byte);
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rx_sync = false;
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break;
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}
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}
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if (!rx_sync) {
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// Bad framing.
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return -1;
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}
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// COBS decode.
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size_t unstuffed_bytes = 0;
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if (!cobs_decode(rx_packet.unstuffed_buf,
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sizeof(rx_packet.unstuffed_buf),
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rx_packet.stuffed_buf, pos,
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&unstuffed_bytes)) {
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// Abandon dispatch if the COBS encoding is bad.
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dprintf(DEBUG_INFO, "Bad COBS data\n");
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return -1;
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}
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// Must be at least enough space for a CRC.
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if (unstuffed_bytes < 4) {
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dprintf(DEBUG_INFO, "Runt packet len %d\n",
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(int) unstuffed_bytes);
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return -1;
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}
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size_t payload_size = unstuffed_bytes - 4;
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// Must be enough room to receive the buffer up to the CRC.
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if (payload_size > bytes) {
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dprintf(DEBUG_INFO, "Frame payload too large: %d vs %d\n",
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(int) payload_size, (int) bytes);
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return -1;
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}
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// Check CRC-32 is good.
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uint32_t computed_crc = crc32(rx_packet.unstuffed_buf, payload_size);
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uint32_t sent_crc = read_le_32(rx_packet.unstuffed_buf, payload_size);
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if (computed_crc != sent_crc) {
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dprintf(DEBUG_INFO,
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"Bad CRC %d: computed 0x%08x received 0x%08x\n",
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(int) payload_size, computed_crc, sent_crc);
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return -1;
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}
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dprintf(DEBUG_SPEW, "Received frame with CRC 0x%08x\n", sent_crc);
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// Success - we have a correctly received frame.
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memcpy(buf, rx_packet.unstuffed_buf, payload_size);
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*received = payload_size;
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return 0;
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}
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int32_t dockfifo_bulk_write_frame(const void *buf, size_t bytes)
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{
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// Need room for pipe number and CRC-32.
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if (bytes > sizeof(tx_packet.unstuffed_buf) - 4) {
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dprintf(DEBUG_INFO, "No room to serialize packet\n");
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return -1;
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}
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// Copy packet to unstuffed packet buffer, append with CRC-32.
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memcpy(tx_packet.unstuffed_buf, buf, bytes);
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uint32_t crc = crc32(tx_packet.unstuffed_buf, bytes);
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write_le_32(tx_packet.unstuffed_buf, bytes, crc);
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// COBS byte-stuffing.
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size_t stuffed_size = 0;
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if (!cobs_encode(tx_packet.stuffed_buf, sizeof(tx_packet.stuffed_buf),
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tx_packet.unstuffed_buf, bytes + 4,
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&stuffed_size)) {
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dprintf(DEBUG_INFO, "No room to serialize framing\n");
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return -1;
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}
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dprintf(DEBUG_SPEW, "Send frame with CRC 0x%08x\n", crc);
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// SOF.
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dprintf(DEBUG_SPEW, "Send SOF\n");
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dockfifo_bulk_write_byte(0x00);
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// COBS stuffed data.
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dprintf(DEBUG_SPEW, "Send %d data\n", (int) stuffed_size);
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dockfifo_bulk_write_bytes(tx_packet.stuffed_buf, stuffed_size);
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// EOF.
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dprintf(DEBUG_SPEW, "Send EOF\n");
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dockfifo_bulk_write_byte(0x00);
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return 0;
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}
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int32_t dockfifo_bulk_init()
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{
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dprintf(DEBUG_SPEW, "dockfifo_bulk_init\n");
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// Initialize rx cbuffer.
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cb_create(&rx_cbuf, RX_CBUF_SIZE);
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// Setup hardware.
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clock_gate(CLK_SPU, true);
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clock_gate(CLK_DOCKFIFO, true);
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// Reset fifos.
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rDBGFIFO_CNFG(DOCKFIFO_BULK_READ) = (1 << 31);
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|
rDBGFIFO_CNFG(DOCKFIFO_BULK_WRITE) = (1 << 31);
|
||
|
|
spin(1);
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_READ) = (0 << 31);
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_WRITE) = (0 << 31);
|
||
|
|
|
||
|
|
// Initialize local events.
|
||
|
|
event_init(&dockfifo_bulk_rx_event, EVENT_FLAG_AUTO_UNSIGNAL, false);
|
||
|
|
|
||
|
|
dprintf(DEBUG_SPEW, "interrupt: %d\n",
|
||
|
|
(int) dockfifo_configs[DOCKFIFO_BULK_READ].irq);
|
||
|
|
install_int_handler(dockfifo_configs[DOCKFIFO_BULK_READ].irq,
|
||
|
|
&dockfifo_bulk_interrupt_handler,
|
||
|
|
(void *)DOCKFIFO_BULK_READ);
|
||
|
|
|
||
|
|
// Enable access to fifo
|
||
|
|
platform_dockfifo_access_enable(DOCKFIFO_BULK_READ, true);
|
||
|
|
platform_dockfifo_access_enable(DOCKFIFO_BULK_WRITE, true);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int32_t dockfifo_bulk_quiesce()
|
||
|
|
{
|
||
|
|
dprintf(DEBUG_SPEW, "dockfifo_bulk_quiesce\n");
|
||
|
|
|
||
|
|
mask_int(dockfifo_configs[DOCKFIFO_BULK_READ].irq);
|
||
|
|
|
||
|
|
// Disable access to fifo
|
||
|
|
platform_dockfifo_access_enable(DOCKFIFO_BULK_READ, false);
|
||
|
|
platform_dockfifo_access_enable(DOCKFIFO_BULK_WRITE, false);
|
||
|
|
|
||
|
|
// Reset rx cbuffer.
|
||
|
|
cb_reset(&rx_cbuf);
|
||
|
|
|
||
|
|
// Reset fifos.
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_READ) = (1 << 31);
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_WRITE) = (1 << 31);
|
||
|
|
spin(1);
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_READ) = (0 << 31);
|
||
|
|
rDBGFIFO_CNFG(DOCKFIFO_BULK_WRITE) = (0 << 31);
|
||
|
|
|
||
|
|
clock_gate(CLK_DOCKFIFO, false);
|
||
|
|
clock_gate(CLK_SPU, false);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|