388 lines
14 KiB
C
388 lines
14 KiB
C
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// *****************************************************************************
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//
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// File: H2fmi_private.h
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//
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// *****************************************************************************
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//
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// Notes:
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//
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// - register bitfield definitions are only good for creating bitfield in
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// register position; add definitions for extracting value from register
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// position
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//
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// *****************************************************************************
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//
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// Copyright (C) 2008 Apple Computer, Inc. All rights reserved.
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//
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// This document is the property of Apple Computer, Inc.
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// It is considered confidential and proprietary.
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//
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// This document may not be reproduced or transmitted in any form,
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// in whole or in part, without the express written permission of
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// Apple Computer, Inc.
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//
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// *****************************************************************************
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#ifndef _H2FMI_PRIVATE_H_
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#define _H2FMI_PRIVATE_H_
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#include <sys/task.h>
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#include "H2fmi_regs.h"
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// =============================================================================
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// preprocessor platform identification
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// =============================================================================
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#if (defined(APPLICATION_SECUREROM) && APPLICATION_SECUREROM)
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#define H2FMI_BOOTROM true
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#else
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#define H2FMI_BOOTROM false
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#endif
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#if (defined(APPLICATION_EMBEDDEDIOP) && APPLICATION_EMBEDDEDIOP)
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#define H2FMI_IOP true
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#else
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#define H2FMI_IOP false
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#endif
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#if (defined(APPLICATION_IBOOT) && APPLICATION_IBOOT)
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#define H2FMI_IBOOT true
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#else
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#define H2FMI_IBOOT false
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#endif
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// TODO: add EFI platform identification
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// =============================================================================
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// configurable preprocessor compilation control
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// =============================================================================
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// Set H2FMI_DEBUG below to true if you want to build with extra
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// debugging features (default to false).
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#define H2FMI_DEBUG false
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// Set H2FMI_TEST_HOOK below to true if you want to insert tests at the end
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// of FIL_Init in iBoot (default to false).
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#define H2FMI_TEST_HOOK false
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// Set H2FMI_DMA_SYNC_READ and/or H2FMI_DMA_SYNC_WRITE to true in order to
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// force read and/or write operations to only use the synchronous interface
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// to the CDMA. This is a workaround for a problem with async dma that is
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// currently under investigation.
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#define H2FMI_DMA_SYNC_READ false
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#define H2FMI_DMA_SYNC_WRITE false
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// Set H2FMI_WAIT_USING_ISR to true if you want operations to wait for
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// dma and bus events by hooking an interrupt service routine to the
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// FMI interrupt vector; set to false for waiting using register
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// polling with yield (default to true).
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#define H2FMI_WAIT_USING_ISR true
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// =============================================================================
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// fixed preprocessor compilation control
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// =============================================================================
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// Always build SecureROM read-only.
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#if (H2FMI_BOOTROM)
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#define H2FMI_READONLY true
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// Also, EmbeddedIOP builds should always be read/write.
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#elif (H2FMI_IOP)
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#define H2FMI_READONLY false
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// Otherwise, ignore nand driver read-only configuration in iBoot
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// debug builds so that erase/write are available for use in testing
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// read operations.
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#elif (H2FMI_IBOOT && defined(AND_READONLY) && H2FMI_DEBUG)
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#define H2FMI_READONLY false
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// Otherwise, mirror nand driver configuration in iBoot.
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#elif (defined(AND_READONLY))
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#define H2FMI_READONLY true
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#else
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#define H2FMI_READONLY false
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#endif
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// =============================================================================
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// preprocessor constant definitions
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// =============================================================================
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#define H2FMI_META_PER_ENVELOPE 10
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#define H2FMI_BYTES_PER_META 10
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#define H2FMI_MAX_DEVICE 8UL
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#define H2FMI_BYTES_PER_SECTOR 512UL
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#define H2FMI_WORDS_PER_SECTOR (H2FMI_BYTES_PER_SECTOR / sizeof(uint32_t))
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#define H2FMI_BOOT_SECTORS_PER_PAGE 3UL
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#define H2FMI_BOOT_BYTES_PER_PAGE (H2FMI_BYTES_PER_SECTOR * H2FMI_BOOT_SECTORS_PER_PAGE)
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#define H2FMI_DEFAULT_TIMEOUT_MICROS ((utime_t)(2 * 1000 * 1000))
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#define H2FMI_PAGE_TIMEOUT_MICROS ((utime_t)(2 * 1000 * 1000))
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#define H2FMI_NAND_ID_SIZE 5
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// conservative bus timings used for boot and Read Id during init
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#define H2FMI_INIT_READ_CYCLE_NANOS 200
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#define H2FMI_INIT_READ_SETUP_NANOS 100
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#define H2FMI_INIT_READ_HOLD_NANOS 100
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#define H2FMI_INIT_WRITE_CYCLE_NANOS 200
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#define H2FMI_INIT_WRITE_SETUP_NANOS 100
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#define H2FMI_INIT_WRITE_HOLD_NANOS 100
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// =============================================================================
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// type declarations
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// =============================================================================
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typedef uint32_t h2fmi_ce_t;
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typedef uint32_t h2fmi_chipid_t;
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struct _h2fmi_t
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{
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volatile uint32_t* regs;
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uint32_t num_of_ce;
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uint32_t pages_per_block;
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uint32_t sectors_per_page;
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uint32_t bytes_per_spare;
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uint32_t blocks_per_ce;
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uint32_t banks_per_ce;
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uint32_t bytes_per_meta;
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uint32_t if_ctrl;
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uint32_t isr_condition;
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struct task_event dma_data_done_event;
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struct task_event dma_meta_done_event;
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struct task_event isr_event;
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bool initialized;
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};
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typedef struct _h2fmi_t h2fmi_t;
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struct _h2fmi_virt_to_phys_map_t
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{
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uint32_t bus;
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h2fmi_ce_t ce;
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};
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typedef struct _h2fmi_virt_to_phys_map_t h2fmi_virt_to_phys_map_t;
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// =============================================================================
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// general fail macro
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// =============================================================================
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#define h2fmi_fail(b) \
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do { \
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dprintf(DEBUG_CRITICAL, \
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"[FIL:ERR] FAIL -> %s@%d\n", \
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__FILE__, __LINE__); \
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b = false; \
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} while (0)
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// =============================================================================
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// fmi bus selection macros
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//
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// Note: this doesn't scale nicely past two buses
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// =============================================================================
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#define h2fmi_select_by_bus(fmi, sel0, sel1) ((fmi->regs == FMI0) ? sel0 : sel1)
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#define h2fmi_bus_index(fmi) h2fmi_select_by_bus(fmi, 0, 1)
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// =============================================================================
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// dma-related macros
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// =============================================================================
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#define h2fmi_dma_data_chan(fmi) h2fmi_select_by_bus(fmi, DMA_FMI0DATA, DMA_FMI1DATA)
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#define h2fmi_dma_meta_chan(fmi) h2fmi_select_by_bus(fmi, DMA_FMI0CHECK, DMA_FMI1CHECK)
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#define h2fmi_dma_meta_fifo(fmi) ((void*)(((uint32_t)fmi->regs) + FMI_META_FIFO))
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#define h2fmi_dma_data_fifo(fmi) ((void*)(((uint32_t)fmi->regs) + FMI_DATA_BUF))
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// =============================================================================
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// busy wait macro
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//
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// this should only be used for very short waits that should never halt
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// during code sequences where performance matters
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// =============================================================================
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#define h2fmi_busy_wait(fmi, reg, mask, cond) \
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do { \
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uint32_t val; \
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do { \
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val = h2fmi_rd(fmi, reg); \
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} while ((val & (mask)) != (cond)); \
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h2fmi_wr(fmi, reg, (val & ~(mask)) | (~(cond) & (mask))); \
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} while (0)
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// =============================================================================
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// cache operation size macro
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// =============================================================================
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// TODO: refactor this cache line rounding functionality
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#if (H2FMI_IOP)
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#define cache_op_size(buf_size) (((buf_size) + (CPU_CACHELINE_SIZE-1)) & ~(CPU_CACHELINE_SIZE-1))
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#else
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#define cache_op_size(buf_size) buf_size
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#endif
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// =============================================================================
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// nand device command bytes
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// =============================================================================
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#define NAND_CMD__RESET ((uint8_t)0xFF)
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#define NAND_CMD__READ_ID ((uint8_t)0x90)
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#define NAND_CMD__READ_STATUS ((uint8_t)0x70)
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#define NAND_CMD__READ ((uint8_t)0x00)
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#define NAND_CMD__READ_CONFIRM ((uint8_t)0x30)
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#define NAND_CMD__ERASE ((uint8_t)0x60)
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#define NAND_CMD__ERASE_CONFIRM ((uint8_t)0xD0)
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#define NAND_CMD__WRITE ((uint8_t)0x80)
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#define NAND_CMD__WRITE_CONFIRM ((uint8_t)0x10)
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// =============================================================================
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// nand operations timeout specifications
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// =============================================================================
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#define TIMEOUT_MICROSEC_READ ((uint32_t)1000)
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#define TIMEOUT_MICROSEC_WRITE ((uint32_t)5000)
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#define TIMEOUT_MICROSEC_ERASE ((uint32_t)15000)
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// =============================================================================
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// nand operations status specifications
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// =============================================================================
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#define NAND_STATUS__CHIP_STATUS1 ((uint8_t)1 << 0)
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#define NAND_STATUS__CHIP_STATUS1_FAIL ((uint8_t)1 << 0)
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#define NAND_STATUS__CHIP_STATUS1_PASS ((uint8_t)0 << 0)
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#define NAND_STATUS__CHIP_STATUS2 ((uint8_t)1 << 1)
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#define NAND_STATUS__CHIP_STATUS2_FAIL ((uint8_t)1 << 1)
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#define NAND_STATUS__CHIP_STATUS2_PASS ((uint8_t)0 << 1)
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// bits 2-4 are not used
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#define NAND_STATUS__PAGE_BUFFER_RB ((uint8_t)1 << 5)
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#define NAND_STATUS__PAGE_BUFFER_RB_READY ((uint8_t)1 << 5)
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#define NAND_STATUS__PAGE_BUFFER_RB_BUSY ((uint8_t)0 << 5)
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#define NAND_STATUS__DATA_CACHE_RB ((uint8_t)1 << 6)
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#define NAND_STATUS__DATA_CACHE_RB_READY ((uint8_t)1 << 6)
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#define NAND_STATUS__DATA_CACHE_RB_BUSY ((uint8_t)0 << 6)
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#define NAND_STATUS__WRITE_PROTECT ((uint8_t)1 << 7)
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#define NAND_STATUS__WRITE_PROTECT_NOT_PROTECTED ((uint8_t)1 << 7)
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#define NAND_STATUS__WRITE_PROTECT_PROTECTED ((uint8_t)0 << 7)
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// =============================================================================
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// implementation function declarations shared between SecureROM and iBoot
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// =============================================================================
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bool h2fmi_init_minimal(h2fmi_t* fmi, uint32_t interface);
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void h2fmi_ungate(h2fmi_t* fmi);
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void h2fmi_gate(h2fmi_t* fmi);
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void h2fmi_reset(h2fmi_t* fmi);
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void h2fmi_calc_bus_timings(h2fmi_t* fmi, uint32_t min_read_cycle_nanos, uint32_t min_read_setup_nanos, uint32_t min_read_hold_nanos, uint32_t min_write_cycle_nanos, uint32_t min_write_setup_nanos, uint32_t min_write_hold_nanos);
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bool h2fmi_is_chipid_invalid(uint32_t id);
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bool h2fmi_wait_done(h2fmi_t* fmi, uint32_t reg, uint32_t mask, uint32_t bits);
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bool h2fmi_wait_dma_task_pending(h2fmi_t* fmi);
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void h2fmi_clean_ecc(h2fmi_t* fmi);
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void h2fmi_fmc_read_data(h2fmi_t* fmi, uint32_t size, uint8_t* data);
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bool h2fmi_nand_reset(h2fmi_t* fmi, h2fmi_ce_t ce);
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bool h2fmi_nand_read_id(h2fmi_t* fmi, h2fmi_ce_t ce, uint32_t* id);
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bool h2fmi_pio_read_sector(h2fmi_t* fmi, void* buf);
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// =============================================================================
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// implementation function declarations not used by SecureROM
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// =============================================================================
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#if (!H2FMI_BOOTROM)
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bool h2fmi_init_fil(h2fmi_t* fmi, uint32_t interface, void* scratch_buf);
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void h2fmi_init_sys(h2fmi_t* fmi);
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bool h2fmi_erase_blocks(h2fmi_t* fmi, uint32_t ce, uint32_t block, bool* status_failed);
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bool h2fmi_write_page(h2fmi_t* fmi, uint32_t ce, uint32_t page, uint8_t* data_buf, uint8_t* meta_buf, bool* status_failed);
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bool h2fmi_read_page(h2fmi_t* fmi, uint32_t ce, uint32_t page, uint8_t* data_buf, uint8_t* meta_buf, uint8_t* max_corrected, bool* is_clean);
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bool h2fmi_write_multi(h2fmi_t* fmi, uint32_t page_count, uint32_t* chip_enable_array, uint32_t* page_number_array, uint8_t** data_buf_array, uint8_t** meta_buf_array, bool* status_failed);
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bool h2fmi_reset_and_read_chipids(h2fmi_t* fmi, h2fmi_chipid_t* ids);
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bool h2fmi_nand_reset_all(h2fmi_t* fmi);
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void h2fmi_nand_read_chipid(h2fmi_t* fmi, h2fmi_ce_t ce, h2fmi_chipid_t* id);
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uint32_t h2fmi_config_raw_data_format(h2fmi_t* fmi);
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uint32_t h2fmi_config_raw_spare_format(void);
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uint32_t h2fmi_config_page_format(h2fmi_t* fmi);
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void h2fmi_config_page_addr(h2fmi_t* fmi, uint32_t page);
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bool h2fmi_using_16bit_ecc(h2fmi_t* fmi);
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bool h2fmi_read_raw_page(h2fmi_t* fmi, uint32_t ce, uint32_t page, uint8_t* data_buf, uint8_t* spare_buf);
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bool h2fmi_wait_status(h2fmi_t* fmi, uint8_t io_mask, uint8_t io_cond, uint8_t* status);
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void h2fmi_dma_data_done_handler(void* arg);
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void h2fmi_dma_meta_done_handler(void* arg);
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void h2fmiInitVirtToPhysMap(void);
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void h2fmiMapBankToBusAndEnable(uint32_t bank, uint32_t bus, h2fmi_ce_t enable);
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h2fmi_t* h2fmiTranslateBankToBus(uint32_t bank);
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h2fmi_ce_t h2fmiTranslateBankToCe(uint32_t bank);
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#endif // !H2FMI_BOOTROM
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// =============================================================================
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// implementation function declarations used only for debug during development
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//
|
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// note that these are designed so that the calls will disappear when
|
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|
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// not compiling for debug
|
||
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// =============================================================================
|
||
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#if (H2FMI_DEBUG)
|
||
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|
||
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bool h2fmi_test_hook(h2fmi_t* fmi);
|
||
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void h2fmi_spew_config(h2fmi_t* fmi);
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||
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void h2fmi_spew_status_regs(h2fmi_t* fmi, const char* prefix);
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void h2fmi_spew_fmi_regs(h2fmi_t* fmi, const char* prefix);
|
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|
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void h2fmi_spew_fmc_regs(h2fmi_t* fmi, const char* prefix);
|
||
|
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void h2fmi_spew_ecc_regs(h2fmi_t* fmi, const char* prefix);
|
||
|
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void h2fmi_spew_regs(h2fmi_t* fmi, const char* prefix);
|
||
|
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void h2fmi_spew_buffer(uint8_t* buf, size_t size);
|
||
|
|
|
||
|
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#else
|
||
|
|
|
||
|
|
#define h2fmi_test_hook(fmi_ignored) true
|
||
|
|
#define h2fmi_spew_config(fmi_ignored)
|
||
|
|
#define h2fmi_spew_status_regs(fmi_ignored, prefix_ignored)
|
||
|
|
#define h2fmi_spew_fmi_regs(fmi_ignored, prefix_ignored)
|
||
|
|
#define h2fmi_spew_fmc_regs(fmi_ignored, prefix_ignored)
|
||
|
|
#define h2fmi_spew_ecc_regs(fmi_ignored, prefix_ignored)
|
||
|
|
#define h2fmi_spew_regs(fmi_ignored, prefix_ignored)
|
||
|
|
#define h2fmi_spew_buffer(buf_ignored, size_ignored)
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
|
||
|
|
#endif // _H2FMI_PRIVATE_H_
|
||
|
|
|
||
|
|
// ********************************** EOF **************************************
|