318 lines
10 KiB
C
318 lines
10 KiB
C
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/*
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* Copyright (C) 2009-2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <drivers/apple/gpio.h>
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#include <platform.h>
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#include <platform/soc/hwregbase.h>
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#include <target.h>
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/* Default S5L8940X SoC Pin Configuration */
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#define FMI_DRIVE_STR DRIVE_X3
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#if !WITH_TARGET_CONFIG
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static const uint32_t gpio_default_cfg[GPIO_GROUP_COUNT * GPIOPADPINS] = {
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/* Port 0 */
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CFG_IN, // GPIO0 -> MENU_KEY
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CFG_IN, // GPIO1 -> HOLD_KEY
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CFG_DISABLED, // GPIO2 ->
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CFG_DISABLED, // GPIO3 ->
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CFG_DISABLED, // GPIO4 ->
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CFG_DISABLED | PULL_DOWN, // GPIO5 ->
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CFG_DISABLED, // GPIO6 ->
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CFG_DISABLED | PULL_DOWN, // GPIO7 ->
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/* Port 1 */
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CFG_DISABLED, // GPIO8 ->
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CFG_DISABLED, // GPIO9 ->
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CFG_DISABLED, // GPIO10 ->
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CFG_DISABLED, // GPIO11 ->
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CFG_DISABLED, // GPIO12 ->
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CFG_DISABLED, // GPIO13 ->
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CFG_DISABLED, // GPIO14 ->
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CFG_DISABLED, // GPIO15 ->
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/* Port 2 */
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CFG_DISABLED, // GPIO16 -> BOARD_ID[3]
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CFG_DISABLED, // GPIO17 ->
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CFG_DISABLED, // GPIO18 -> BOOT_CONFIG[0]
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CFG_DISABLED | PULL_DOWN, // GPIO19 ->
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CFG_DISABLED, // GPIO20 ->
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CFG_DISABLED, // GPIO21 ->
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CFG_DISABLED | PULL_DOWN, // GPIO22 ->
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CFG_DISABLED, // GPIO23 ->
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/* Port 3 */
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CFG_DISABLED | PULL_DOWN, // GPIO24 ->
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CFG_DISABLED, // GPIO25 -> BOOT_CONFIG[1]
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CFG_IN | PULL_DOWN, // GPIO26 -> FORCE_DFU
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CFG_DISABLED | PULL_DOWN, // GPIO27 -> DFU_STATUS
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CFG_DISABLED, // GPIO28 -> BOOT_CONFIG[2]
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CFG_DISABLED, // GPIO29 -> BOOT_CONFIG[3]
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CFG_DISABLED, // GPIO30 ->
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CFG_DISABLED, // GPIO31 ->
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/* Port 4 */
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CFG_DISABLED, // GPIO32 ->
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CFG_DISABLED, // GPIO33 ->
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CFG_DISABLED, // GPIO34 ->
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CFG_DISABLED, // GPIO35 ->
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CFG_DISABLED, // GPIO36 ->
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CFG_DISABLED, // GPIO37 ->
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CFG_DISABLED, // GPIO38 ->
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CFG_DISABLED, // GPIO39 ->
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/* Port 5 */
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CFG_DISABLED, // EHCI_PORT_PWR[0] ->
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CFG_DISABLED, // EHCI_PORT_PWR[1] ->
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CFG_DISABLED, // EHCI_PORT_PWR[2] ->
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CFG_DISABLED, // UART1_TXD ->
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CFG_DISABLED, // UART1_RXD ->
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CFG_DISABLED, // UART1_RTSN ->
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CFG_DISABLED, // UART1_CTSN ->
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CFG_DISABLED, // UART2_TXD ->
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/* Port 6 */
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CFG_DISABLED, // UART2_RXD ->
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CFG_DISABLED, // UART2_RTSN ->
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CFG_DISABLED, // UART2_CTSN ->
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CFG_DISABLED, // UART3_TXD ->
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CFG_DISABLED, // UART3_RXD ->
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CFG_DISABLED, // UART3_RTSN ->
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CFG_DISABLED, // UART3_CTSN ->
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CFG_DISABLED, // UART5_RTXD ->
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/* Port 7 */
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CFG_DISABLED, // UART6_TXD ->
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CFG_DISABLED, // UART6_RXD ->
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CFG_DISABLED, // UART6_RTSN ->
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CFG_DISABLED, // UART6_CTSN ->
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CFG_DISABLED, // UART4_TXD/SPI4_MOSI ->
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CFG_DISABLED, // UART4_RXD/SPI4_MISO ->
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CFG_DISABLED, // UART4_RTSN/SPI4_SCLK ->
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CFG_DISABLED, // UART4_CTSN/SPI4_SSIN ->
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/* Port 8 */
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CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN3 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN2 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN1 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN0 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_CLE ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_ALE ->
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI0_REN ->
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI0_WEN ->
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/* Port 9 */
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO7 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO6 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO5 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO4 ->
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI0_DQS ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO3 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO2 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO1 ->
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/* Port 10 */
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI0_IO0 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN3 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN2 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN1 ->
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CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN0 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_CLE ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_ALE ->
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI1_REN ->
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/* Port 11 */
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI1_WEN ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO7 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO6 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO5 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO4 ->
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CFG_DISABLED | PULL_UP | FMI_DRIVE_STR, // FMI1_DQS ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO3 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO2 ->
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/* Port 12 */
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO1 ->
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CFG_DISABLED | PULL_DOWN | FMI_DRIVE_STR, // FMI1_IO0 ->
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CFG_DISABLED, // FMI2_CEN3 ->
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CFG_DISABLED, // FMI2_CEN2 ->
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CFG_DISABLED, // FMI2_CEN1 ->
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CFG_DISABLED, // FMI2_CEN0 ->
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CFG_DISABLED, // FMI2_CLE ->
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CFG_DISABLED, // FMI2_ALE ->
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/* Port 13 */
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CFG_DISABLED, // FMI2_REN ->
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CFG_DISABLED, // FMI2_WEN ->
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CFG_DISABLED, // FMI2_IO7 ->
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CFG_DISABLED, // FMI2_IO6 ->
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CFG_DISABLED, // FMI2_IO5 ->
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CFG_DISABLED, // FMI2_IO4 ->
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CFG_DISABLED, // FMI2_DQS ->
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CFG_DISABLED, // FMI2_IO3 ->
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/* Port 14 */
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CFG_DISABLED, // FMI2_IO2 ->
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CFG_DISABLED, // FMI2_IO1 ->
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CFG_DISABLED, // FMI2_IO0 ->
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CFG_DISABLED, // FMI0_CEN7 ->
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CFG_DISABLED, // FMI0_CEN6 ->
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CFG_DISABLED, // FMI0_CEN5 ->
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CFG_DISABLED, // FMI0_CEN4 ->
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CFG_DISABLED, // FMI1_CEN7 ->
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/* Port 15 */
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CFG_DISABLED, // FMI1_CEN6 ->
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CFG_DISABLED, // FMI1_CEN5 ->
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CFG_DISABLED, // FMI1_CEN4 ->
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CFG_DISABLED, // FMI3_CEN3 ->
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CFG_DISABLED, // FMI3_CEN2 ->
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CFG_DISABLED, // FMI3_CEN1 ->
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CFG_DISABLED, // FMI3_CEN0 ->
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CFG_DISABLED, // FMI3_CLE ->
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/* Port 16 */
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CFG_DISABLED, // FMI3_ALE ->
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CFG_DISABLED, // FMI3_REN ->
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CFG_DISABLED, // FMI3_WEN ->
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CFG_DISABLED, // FMI3_IO7 ->
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CFG_DISABLED, // FMI3_IO6 ->
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CFG_DISABLED, // FMI3_IO5 ->
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CFG_DISABLED, // FMI3_IO4 ->
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CFG_DISABLED, // FMI3_DQS ->
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/* Port 17 */
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CFG_DISABLED, // FMI3_IO3 ->
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CFG_DISABLED, // FMI3_IO2 ->
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CFG_DISABLED, // FMI3_IO1 ->
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CFG_DISABLED, // FMI3_IO0 ->
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CFG_DISABLED, // FMI2_CEN7 ->
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CFG_DISABLED, // FMI2_CEN6 ->
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CFG_DISABLED, // FMI2_CEN5 ->
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CFG_DISABLED, // FMI2_CEN4 ->
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/* Port 18 */
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CFG_DISABLED, // FMI3_CEN7 ->
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CFG_DISABLED, // FMI3_CEN6 ->
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CFG_DISABLED, // FMI3_CEN5 ->
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CFG_DISABLED, // FMI3_CEN4 ->
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CFG_DISABLED, // SPI3_MOSI ->
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CFG_DISABLED, // SPI3_MISO ->
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CFG_DISABLED, // SPI3_SCLK ->
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CFG_DISABLED, // SPI3_SSIN ->
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/* Port 19 */
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CFG_DISABLED, // ISP0_PRE_FLASH ->
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CFG_DISABLED, // ISP0_FLASH ->
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CFG_DISABLED, // ISP1_PRE_FLASH ->
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CFG_DISABLED, // ISP1_FLASH ->
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CFG_DISABLED, // SPI1_SCLK ->
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CFG_DISABLED, // SPI1_MOSI ->
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CFG_DISABLED, // SPI1_MISO ->
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CFG_DISABLED, // SPI1_SSIN ->
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/* Port 20 */
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CFG_DISABLED, // I2C2_SDA ->
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CFG_DISABLED, // I2C2_SCL ->
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CFG_DISABLED, // SPI0_SCLK -> SPI0_SCLK/BOARD_ID[0]
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CFG_DISABLED, // SPI0_MOSI -> SPI0_MOSI/BOARD_ID[1]
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CFG_DISABLED, // SPI0_MISO -> SPI0_MISO/BOARD_ID[2]
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CFG_DISABLED | PULL_UP, // SPI0_SSIN -> SPI0_SSIN
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CFG_DISABLED, // SPI2_SCLK ->
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CFG_DISABLED, // SPI2_MOSI ->
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/* Port 21 */
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CFG_DISABLED, // SPI2_MISO ->
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CFG_DISABLED, // SPI2_SSIN ->
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CFG_DISABLED, // I2C0_SDA ->
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CFG_DISABLED, // I2C0_SCL ->
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CFG_DISABLED, // I2C1_SDA ->
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CFG_DISABLED, // I2C1_SCL ->
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CFG_DISABLED, // ISP0_SDA ->
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CFG_DISABLED, // ISP0_SCL ->
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/* Port 22 */
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CFG_DISABLED, // ISP1_SDA ->
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CFG_DISABLED, // ISP1_SCL ->
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CFG_DISABLED, // SDIO_CLK ->
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CFG_DISABLED, // SDIO_CMD ->
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CFG_DISABLED, // SDIO_DATA0 ->
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CFG_DISABLED, // SDIO_DATA1 ->
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CFG_DISABLED, // SDIO_DATA2 ->
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CFG_DISABLED, // SDIO_DATA3 ->
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/* Port 23 */
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CFG_DISABLED, // MIPI_VSYNC ->
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CFG_DISABLED, // TMR32_PWM0 ->
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CFG_DISABLED, // TMR32_PWM1 ->
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CFG_DISABLED, // TMR32_PWM2 ->
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CFG_DISABLED, // SWI_DATA ->
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CFG_DISABLED, // DWI_DI ->
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CFG_DISABLED, // DWI_DO ->
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CFG_DISABLED, // DWI_CLK ->
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/* Port 24 */
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CFG_DISABLED, // SENSOR0_RST ->
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CFG_DISABLED, // SENSOR0_CLK ->
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CFG_DISABLED, // SENSOR1_RST ->
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CFG_DISABLED, // SENSOR1_CLK ->
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CFG_DISABLED, // I2S0_MCK ->
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CFG_DISABLED, // I2S0_LRCK ->
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CFG_DISABLED, // I2S0_BCLK ->
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CFG_DISABLED, // I2S0_DOUT ->
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/* Port 25 */
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CFG_DISABLED, // I2S0_DIN ->
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CFG_DISABLED, // I2S1_MCK ->
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CFG_DISABLED, // I2S1_LRCK ->
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CFG_DISABLED, // I2S1_BCLK ->
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CFG_DISABLED, // I2S1_DOUT ->
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CFG_DISABLED, // I2S1_DIN ->
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CFG_DISABLED, // I2S2_MCK ->
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CFG_DISABLED, // I2S2_LRCK ->
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/* Port 26 */
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CFG_DISABLED, // I2S2_BCLK ->
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CFG_DISABLED, // I2S2_DOUT ->
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CFG_DISABLED, // I2S2_DIN ->
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CFG_DISABLED, // I2S3_MCK ->
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CFG_DISABLED, // I2S3_LRCK ->
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CFG_DISABLED, // I2S3_BCLK ->
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CFG_DISABLED, // I2S3_DOUT ->
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CFG_DISABLED, // I2S3_DIN ->
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/* Port 27 */
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CFG_DISABLED, // SPDIF ->
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CFG_DISABLED | PULL_DOWN, // GPIO217 ->
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CFG_DISABLED, // GPIO218 ->
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CFG_DISABLED, // DP_HPD ->
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CFG_DISABLED, // UART0_TXD ->
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CFG_DISABLED, // UART0_RXD ->
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CFG_DISABLED, // TST_CLKOUT ->
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CFG_DISABLED, // TST_STPCLK ->
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/* Port 28 */
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CFG_DISABLED, // WDOG ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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||
|
|
CFG_DISABLED, // ->
|
||
|
|
};
|
||
|
|
|
||
|
|
const uint32_t *platform_get_default_gpio_cfg(uint32_t gpioc)
|
||
|
|
{
|
||
|
|
return gpio_default_cfg;
|
||
|
|
}
|
||
|
|
#endif
|