65 lines
1.3 KiB
ArmAsm
65 lines
1.3 KiB
ArmAsm
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/*
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* Copyright (c) 2014 - 2015 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <arch/arm/assembler.h>
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#include <platform/trampoline.h>
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// iBSS & LLB trampoline
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#if APPLICATION_IBOOT && (PRODUCT_IBSS || PRODUCT_LLB)
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.text
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.arm
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.align 12
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.globl _boot_handoff_trampoline, _boot_handoff_trampoline_end
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_boot_handoff_trampoline:
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// Reset VBAR to 0
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mov r1, #0 // iBSS and LLB doesn't pass forward anything to next stage.
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mcr p15, 0, r1, c12, c0, 0
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isb
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bx r0
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_boot_handoff_trampoline_end:
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#endif
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// SecureROM trampoline
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#if WITH_ROM_TRAMPOLINE
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.text
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.arm
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.align 12
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.globl _boot_handoff_trampoline, _boot_handoff_trampoline_end
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_boot_handoff_trampoline:
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ldr r1, _trampoline_reg
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ldr r2, _trampoline_val
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ldr r3, [r1]
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orr r3, r2
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str r3, [r1]
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dsb sy
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ldr r3, [r1]
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tst r3, r2 // Verify ROM access is disabled
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beq 1f
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mov r4, r0
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mov r0, #0
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mov r1, #0
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mov r2, #0
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mov r3, #0
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bx r4
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1: // trampoline spin function
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wfi
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b .
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_trampoline_reg:
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.word SECURITY_REG
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_trampoline_val:
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.word ROM_READ_DISABLE
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.align CPU_CACHELINE_SHIFT
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_boot_handoff_trampoline_end:
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#endif
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