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/*
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* Copyright (C) 2006-2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __ARCH_TASK_H
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#define __ARCH_TASK_H
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/*
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* Note that this structure is known implicitly by code in context.S, and
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* must be kept in sync.
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*/
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#if defined(__arm__)
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#ifndef __ASSEMBLY__
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struct arch_task {
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/*
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* Core registers.
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*/
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uint32_t regs[10]; // r4-r11, r13, r14
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#if WITH_VFP
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/*
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* VFP/Neon registers.
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*
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* Note that layout must be kept in sync with offset defines below.
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*/
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uint32_t fpexc;
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uint32_t fpscr;
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uint64_t fpregs[32];
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#endif
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};
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#endif /* __ASSEMBLY__ */
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/*
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* Indices for useful core registers.
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*/
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#define ARM_ARCH_TASK_FP 3
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#define ARM_ARCH_TASK_SP 8
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#define ARM_ARCH_TASK_LR 9
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/*
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* VFP/Neon field offsets - it would be nice to generate these automatically.
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*/
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#define ARM_ARCH_TASK_FP_OFFSET 40
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#define ARM_ARCH_TASK_FPEXC (ARM_ARCH_TASK_FP_OFFSET + 0)
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#define ARM_ARCH_TASK_FPSCR (ARM_ARCH_TASK_FP_OFFSET + 4)
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#define ARM_ARCH_TASK_FPREGS (ARM_ARCH_TASK_FP_OFFSET + 8)
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#elif defined(__arm64__)
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#ifndef __ASSEMBLY__
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typedef __uint128_t uint128_t;
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struct arch_task {
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/* Core registers */
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uint64_t regs[29]; // x0-x28
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uint64_t fp;
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uint64_t lr;
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uint64_t sp;
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#if WITH_VFP
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/* Neon registers */
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union {
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uint128_t q;
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uint64_t d;
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uint32_t s;
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} vregs[32]; // v0-v31
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uint32_t fpsr;
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uint32_t fpcr;
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#endif
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __arm64__ */
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#endif /* ! __ARCH_TASK_H */
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