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/*
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* Copyright (C) 2011-2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <drivers/aes.h>
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#include <drivers/dma.h>
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#include <platform.h>
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#include <platform/soc/hwclocks.h>
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#include <platform/soc/hwdmachannels.h>
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#include <sys/task.h>
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#include "aes_s7002.h"
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void _load_input_block(const uint32_t *src);
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void _store_output_block(uint32_t *dst);
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#if AES_USE_DMA
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int
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aes_execute_cmd(uint32_t cmd, void *addr, uint32_t length, bool block)
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{
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struct task_event event;
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struct dma_segment seg;
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void *fifo;
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int32_t ret;
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int dma_channel;
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// build an SGL for the one segment
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switch (cmd & DMA_CMD_DIR_MASK) {
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case DMA_CMD_DIR_TX:
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seg.paddr = (uintptr_t)addr;
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fifo = (void*)0x47380040;
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dma_channel = DMA_AES_WR;
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break;
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case DMA_CMD_DIR_RX:
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seg.paddr = (uintptr_t)addr;
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fifo = (void*)0x47380080;
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dma_channel = DMA_AES_RD;
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break;
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default:
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return -1;
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}
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seg.length = length;
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if (block) {
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// run the operation
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event_init(&event, EVENT_FLAG_AUTO_UNSIGNAL, false);
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ret = dma_execute_async(cmd, dma_channel, &seg, fifo, length, 0, 0,
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(dma_completion_function)event_signal, (void *)&event);
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if (!ret)
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// and block waiting for it to complete
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event_wait(&event);
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} else {
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ret = dma_execute_async(cmd, dma_channel, &seg, fifo, length, 0, 0,
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NULL, NULL);
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}
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return ret;
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}
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#endif
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int
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aes_hw_crypto_cmd(u_int32_t cmd, void *src, void *dst, size_t len, u_int32_t opts, const void *key, void *iv)
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{
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uint32_t key_in_ctrl;
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uint32_t blocks;
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uint32_t *local_iv, *local_key;
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dprintf(DEBUG_SPEW, "aes_hw_crypto_cmd: cmd: %08x, src: %p, dst: %p, len: %zx, opts: %08x, key: %p, iv: %p \n",
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cmd, src, dst, len, opts, key, iv);
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clock_gate(CLK_AES0, true);
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ASSERT(src != NULL);
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ASSERT(dst != NULL);
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local_iv = (uint32_t *)iv;
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local_key = (uint32_t *)key;
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/* Make sure length is multiple of 16 bytes */
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ASSERT((len > 0) && ((len & 0xf) == 0));
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blocks = len / 16;
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key_in_ctrl = 0;
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switch (cmd & AES_CMD_MODE_MASK) {
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case AES_CMD_ECB : key_in_ctrl |= KEY_IN_CTRL_MOD_ECB; break;
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case AES_CMD_CBC : key_in_ctrl |= KEY_IN_CTRL_MOD_CBC; break;
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default : goto fail;
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}
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switch (cmd & AES_CMD_DIR_MASK) {
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case AES_CMD_ENC : key_in_ctrl |= KEY_IN_CTRL_DIR_ENC; break;
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case AES_CMD_DEC : key_in_ctrl |= KEY_IN_CTRL_DIR_DEC; break;
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default : goto fail;
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}
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/* Get the key length */
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switch (opts & AES_KEY_SIZE_MASK) {
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case AES_KEY_SIZE_128 : key_in_ctrl |= KEY_IN_CTRL_LEN_128; break;
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case AES_KEY_SIZE_192 : key_in_ctrl |= KEY_IN_CTRL_LEN_192; break;
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case AES_KEY_SIZE_256 : key_in_ctrl |= KEY_IN_CTRL_LEN_256; break;
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default : goto fail;
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}
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bool key_disabled = false;
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/* Set the key */
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switch (opts & AES_KEY_TYPE_MASK) {
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case AES_KEY_TYPE_USER :
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key_in_ctrl |= KEY_IN_CTRL_SEL_SW;
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switch (opts & AES_KEY_SIZE_MASK) {
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default:
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rAES_S7002_KEY_IN7 = local_key[7];
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rAES_S7002_KEY_IN6 = local_key[6];
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case AES_KEY_SIZE_192:
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rAES_S7002_KEY_IN5 = local_key[5];
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rAES_S7002_KEY_IN4 = local_key[4];
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case AES_KEY_SIZE_128:
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rAES_S7002_KEY_IN3 = local_key[3];
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rAES_S7002_KEY_IN2 = local_key[2];
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rAES_S7002_KEY_IN1 = local_key[1];
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rAES_S7002_KEY_IN0 = local_key[0];
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}
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break;
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case AES_KEY_TYPE_UID0 :
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key_in_ctrl |= KEY_IN_CTRL_SEL_UID1;
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key_disabled = platform_keys_disabled(0,1);
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break;
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case AES_KEY_TYPE_GID0 :
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key_in_ctrl |= KEY_IN_CTRL_SEL_GID0;
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key_disabled = platform_keys_disabled(1,0);
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break;
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case AES_KEY_TYPE_GID1 :
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key_in_ctrl |= KEY_IN_CTRL_SEL_GID1;
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key_disabled = platform_keys_disabled(1,0);
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break;
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}
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if (key_disabled) {
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dprintf(DEBUG_INFO, "SIO_AES: requested AES key has been disabled\n");
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return -1;
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}
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/* Make sure AES block is not busy */
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ASSERT(rAES_S7002_KEY_IN_STS & KEY_IN_STS_RDY);
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ASSERT(rAES_S7002_TXT_IN_STS & TXT_IN_FIFO_SPACE_AVAIL);
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ASSERT(!(rAES_S7002_TXT_OUT_STS & TXT_OUT_DATA_AVAIL));
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/* Setup Key configurator, and load the context */
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rAES_S7002_KEY_IN_CTRL = key_in_ctrl;
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rAES_S7002_KEY_IN_CTRL |= KEY_IN_CTRL_VAL_SET;
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dprintf(DEBUG_SPEW, "sio_aes: key_in_ctrl:0x%08x, rAES_S7002_KEY_IN_CTRL:0x%08x\n", key_in_ctrl, rAES_S7002_KEY_IN_CTRL);
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/* Load IV */
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if (iv != 0) {
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rAES_S7002_IV_IN0 = local_iv[0];
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rAES_S7002_IV_IN1 = local_iv[1];
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rAES_S7002_IV_IN2 = local_iv[2];
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rAES_S7002_IV_IN3 = local_iv[3];
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} else {
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rAES_S7002_IV_IN0 = 0;
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rAES_S7002_IV_IN1 = 0;
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rAES_S7002_IV_IN2 = 0;
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rAES_S7002_IV_IN3 = 0;
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}
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rAES_S7002_IV_IN_CTRL = (0 << IV_IN_CTRL_CTX_SHIFT);
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rAES_S7002_IV_IN_CTRL |= IV_IN_CTRL_VAL_SET;
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/* Perform AES operation */
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/* Load first block */
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rAES_S7002_TXT_IN_CTRL = ((0 << TXT_IN_CTRL_IV_CTX_SHIFT) | (0 << TXT_IN_CTRL_KEY_CTX_SHIFT));
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#if AES_USE_DMA
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/* Do cache operations */
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platform_cache_operation(CACHE_CLEAN | CACHE_INVALIDATE, (void *)((uint32_t)dst & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
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/* start the operation */
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aes_execute_cmd(DMA_CMD_DIR_RX, dst, len, false);
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/* Do cache operations */
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platform_cache_operation(CACHE_CLEAN, (void *)((uint32_t)src & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
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/* start the operation */
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aes_execute_cmd(DMA_CMD_DIR_TX, src, len, true);
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#else
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uint32_t *local_src = (uint32_t *)src;
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uint32_t *local_dst = (uint32_t *)dst;
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rAES_S7002_TXT_IN_CTRL = ((0 << TXT_IN_CTRL_IV_CTX_SHIFT) | (0 << TXT_IN_CTRL_KEY_CTX_SHIFT));
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_load_input_block(local_src);
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while(--blocks) {
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/* Wait until we can shove next block in */
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while ((rAES_S7002_TXT_IN_STS & TXT_IN_FIFO_SPACE_AVAIL) != TXT_IN_FIFO_SPACE_AVAIL);
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/* Load next block */
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local_src += 4;
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rAES_S7002_TXT_IN_CTRL = ((0 << TXT_IN_CTRL_IV_CTX_SHIFT) | (0 << TXT_IN_CTRL_KEY_CTX_SHIFT));
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_load_input_block(local_src);
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/* Store result of the previous operation */
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while ((rAES_S7002_TXT_OUT_STS & TXT_OUT_DATA_AVAIL) != TXT_OUT_DATA_AVAIL);
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_store_output_block(local_dst);
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local_dst += 4;
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}
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/* Store result of the last operation */
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while ((rAES_S7002_TXT_OUT_STS & TXT_OUT_DATA_AVAIL) != TXT_OUT_DATA_AVAIL);
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_store_output_block(local_dst);
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#endif
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/* Clear user key from the registers */
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if ((opts & AES_KEY_TYPE_MASK) == AES_KEY_TYPE_USER) {
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rAES_S7002_KEY_IN7 = 0;
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rAES_S7002_KEY_IN6 = 0;
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rAES_S7002_KEY_IN5 = 0;
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rAES_S7002_KEY_IN4 = 0;
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rAES_S7002_KEY_IN3 = 0;
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rAES_S7002_KEY_IN2 = 0;
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rAES_S7002_KEY_IN1 = 0;
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rAES_S7002_KEY_IN0 = 0;
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}
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clock_gate(CLK_AES0, false);
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return 0;
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fail:
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panic("AES_S7002: bad arguments\n");
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}
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void _load_input_block(const uint32_t *src)
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{
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dprintf(DEBUG_SPEW, "src: ");
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for(int i = 0; i < 4; i++) dprintf(DEBUG_SPEW, "%08x ", src[i]);
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dprintf(DEBUG_SPEW, "\n");
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rAES_S7002_TXT_IN = src[0];
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rAES_S7002_TXT_IN = src[1];
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rAES_S7002_TXT_IN = src[2];
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rAES_S7002_TXT_IN = src[3];
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}
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void _store_output_block(uint32_t *dst)
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{
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dst[0] = rAES_S7002_TXT_OUT;
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dst[1] = rAES_S7002_TXT_OUT;
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dst[2] = rAES_S7002_TXT_OUT;
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dst[3] = rAES_S7002_TXT_OUT;
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dprintf(DEBUG_SPEW, "dst: ");
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for(int i = 0; i < 4; i++) dprintf(DEBUG_SPEW, "%08x ", dst[i]);
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dprintf(DEBUG_SPEW, "\n");
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}
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@@ -0,0 +1,79 @@
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/*
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* Copyright (C) 2011-2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __APPLE_AES_S7002_H
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#define __APPLE_AES_S7002_H
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#include <platform/soc/hwregbase.h>
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/* AES-AP registers */
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#define rAES_S7002_STS (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0000))
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#define STS_BUSY (1U << 0)
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#define rAES_S7002_TXT_IN_CTRL (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0008))
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#define TXT_IN_CTRL_IV_CTX_SHIFT (2)
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#define TXT_IN_CTRL_KEY_CTX_SHIFT (1)
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#define rAES_S7002_TXT_IN_STS (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x000C))
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#define TXT_IN_FIFO_SPACE_AVAIL (1U << 0)
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#define rAES_S7002_TXT_IN (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0040))
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#define rAES_S7002_TXT_OUT_STS (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0050))
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#define TXT_OUT_STS_IV_CTX_SHIFT (2)
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#define TXT_OUT_STS_KEY_CTX_SHIFT (1)
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#define TXT_OUT_DATA_AVAIL (1U << 0)
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#define rAES_S7002_TXT_OUT (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0080))
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#define rAES_S7002_KEY_IN_CTRL (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0090))
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#define KEY_IN_CTRL_MOD_CBC (1U << 13)
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#define KEY_IN_CTRL_MOD_ECB (0U << 13)
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#define KEY_IN_CTRL_DIR_ENC (1U << 12)
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#define KEY_IN_CTRL_DIR_DEC (0U << 12)
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#define KEY_IN_CTRL_LEN_256 (2U << 6)
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#define KEY_IN_CTRL_LEN_192 (1U << 6)
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#define KEY_IN_CTRL_LEN_128 (0U << 6)
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#define KEY_IN_CTRL_SEL_GID1 (3U << 4)
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#define KEY_IN_CTRL_SEL_GID0 (2U << 4)
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#define KEY_IN_CTRL_SEL_UID1 (1U << 4)
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#define KEY_IN_CTRL_SEL_SW (0U << 4)
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#define KEY_IN_CTRL_CTX_SHIFT (1)
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#define KEY_IN_CTRL_VAL_SET (1U << 0)
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#define rAES_S7002_KEY_IN_STS (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0094))
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#define KEY_IN_STS_RDY (1U << 0)
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#define rAES_S7002_KEY_IN0 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00C0))
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#define rAES_S7002_KEY_IN1 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00C4))
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#define rAES_S7002_KEY_IN2 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00C8))
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#define rAES_S7002_KEY_IN3 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00CC))
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#define rAES_S7002_KEY_IN4 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00D0))
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#define rAES_S7002_KEY_IN5 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00D4))
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#define rAES_S7002_KEY_IN6 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00D8))
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#define rAES_S7002_KEY_IN7 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00DC))
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#define rAES_S7002_IV_IN_CTRL (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x00E0))
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#define IV_IN_CTRL_CTX_SHIFT (1)
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#define IV_IN_CTRL_VAL_SET (1U << 0)
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#define rAES_S7002_IV_IN0 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0100))
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#define rAES_S7002_IV_IN1 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0104))
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#define rAES_S7002_IV_IN2 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x0108))
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#define rAES_S7002_IV_IN3 (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x010C))
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/* rAES_S7002_IV_OUTxxxx to rAES_S7002_DSB_xxxx */
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#define rAES_S7002_ERR (*(volatile uint32_t *)(AES_S7002_BASE_ADDR + 0x01D0))
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#define AES_ERR_SET (1U << 0)
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#endif /* __APPLE_AES_S7002_H */
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@@ -0,0 +1,20 @@
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# Copyright (C) 2011-2013 Apple Inc. All rights reserved.
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#
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# This document is the property of Apple Inc.
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||||
# It is considered confidential and proprietary.
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||||
#
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||||
# This document may not be reproduced or transmitted in any form,
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||||
# in whole or in part, without the express written permission of
|
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# Apple Inc.
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#
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LOCAL_DIR := $(GET_LOCAL_DIR)
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OPTIONS += \
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WITH_HW_AES=1
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MODULES += \
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drivers/aes
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ALL_OBJS += \
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$(LOCAL_DIR)/aes_s7002.o
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