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/*
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* Copyright (C) 2011-2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <drivers/aes.h>
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#if WITH_HW_SEP
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#include <drivers/sep/sep_client.h>
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#endif
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#include <platform.h>
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#include <platform/soc/hwclocks.h>
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#include "aes_v2.h"
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#define COMMAND_FIFO_SIZE 128
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typedef enum {
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BLOCK_MODE_ECB = 0,
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BLOCK_MODE_CBC = 1,
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BLOCK_MODE_CTR = 2,
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} block_mode_t;
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typedef enum {
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KEY_LEN_128 = 0,
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KEY_LEN_192 = 1,
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KEY_LEN_256 = 2,
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} key_len_t;
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typedef enum {
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KEY_SELECT_SOFTWARE = 0,
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KEY_SELECT_UID1 = 1,
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KEY_SELECT_GID_AP_1 = 2,
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KEY_SELECT_GID_AP_2 = 3,
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KEY_SELECT_HDCP_0 = 4,
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KEY_SELECT_HDCP_1 = 5,
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KEY_SELECT_HDCP_2 = 6,
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KEY_SELECT_HDCP_3 = 7,
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} key_select_t;
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typedef enum {
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KEY_FUNC_NONE = 0,
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KEY_FUNC_LEGACY = 1,
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KEY_FUNC_FAIRPLAY_LEGACY = 2,
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KEY_FUNC_FAIRPLAY_H8F = 3,
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} key_func_t;
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typedef enum {
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OPCODE_KEY = 0x01,
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OPCODE_IV = 0x02,
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OPCODE_DSB = 0x03,
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OPCODE_SKG = 0x04,
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OPCODE_DATA = 0x05,
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OPCODE_STORE_IV = 0x06,
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OPCODE_WRITE_REG = 0x07,
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OPCODE_FLAG = 0x08,
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} command_opcodes_t;
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#define COMMAND_OPCODE_SHIFT (28)
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#define COMMAND_OPCODE_MASK (0xF)
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typedef struct command_key {
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#define COMMAND_KEY_COMMAND_KEY_CONTEXT_SHIFT (27)
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#define COMMAND_KEY_COMMAND_KEY_CONTEXT_MASK (0x1)
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#define COMMAND_KEY_COMMAND_KEY_SELECT_SHIFT (24)
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#define COMMAND_KEY_COMMAND_KEY_SELECT_MASK (0x7)
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#define COMMAND_KEY_COMMAND_KEY_LENGTH_SHIFT (22)
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#define COMMAND_KEY_COMMAND_KEY_LENGTH_MASK (0x3)
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#define COMMAND_KEY_COMMAND_WRAPPED_SHIFT (21)
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#define COMMAND_KEY_COMMAND_WRAPPED_MASK (0x1)
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#define COMMAND_KEY_COMMAND_ENCRYPT_SHIFT (20)
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#define COMMAND_KEY_COMMAND_ENCRYPT_MASK (0x1)
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#define COMMAND_KEY_COMMAND_KEY_FUNC_SHIFT (18)
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#define COMMAND_KEY_COMMAND_KEY_FUNC_MASK (0x3)
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#define COMMAND_KEY_COMMAND_BLOCK_MODE_SHIFT (16)
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#define COMMAND_KEY_COMMAND_BLOCK_MODE_MASK (0x3)
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#define COMMAND_KEY_COMMAND_COMMAND_ID_SHIFT (0)
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#define COMMAND_KEY_COMMAND_COMMAND_ID_MASK (0xFF)
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uint32_t command;
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uint32_t key[8];
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} command_key_t;
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typedef struct aes_command_iv {
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#define COMMAND_IV_COMMAND_IV_CONTEXT_SHIFT (26)
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#define COMMAND_IV_COMMAND_IV_CONTEXT_MASK (0x3)
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#define COMMAND_IV_COMMAND_HDCP_KEY_SHIFT (25)
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#define COMMAND_IV_COMMAND_HDCP_KEY_MASK (0x1)
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#define COMMAND_IV_COMMAND_IV_IN_HDCP_SHIFT (23)
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#define COMMAND_IV_COMMAND_IV_IN_HDCP_MASK (0x3)
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uint32_t command;
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uint32_t iv[4];
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} command_iv_t;
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typedef struct aes_command_data {
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#define COMMAND_DATA_COMMAND_KEY_CONTEXT_SHIFT (27)
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#define COMMAND_DATA_COMMAND_KEY_CONTEXT_MASK (0x1)
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#define COMMAND_DATA_COMMAND_IV_CONTEXT_SHIFT (25)
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#define COMMAND_DATA_COMMAND_IV_CONTEXT_MASK (0x3)
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#define COMMAND_DATA_COMMAND_LENGTH_SHIFT (0)
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#define COMMAND_DATA_COMMAND_LENGTH_MASK (0xFFFFFF)
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uint32_t command;
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#define COMMAND_DATA_UPPER_ADDR_SOURCE_SHIFT (16)
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#define COMMAND_DATA_UPPER_ADDR_SOURCE_MASK (0xFF)
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#define COMMAND_DATA_UPPER_ADDR_DEST_SHIFT (0)
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#define COMMAND_DATA_UPPER_ADDR_DEST_MASK (0xFF)
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uint32_t upper_addr;
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uint32_t source_addr;
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uint32_t dest_addr;
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} command_data_t;
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typedef struct aes_command_store_iv {
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#define COMMAND_STORE_IV_COMMAND_CONTEXT_SHIFT (26)
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#define COMMAND_STORE_IV_COMMAND_CONTEXT_MASK (0x3)
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#define COMMAND_STORE_IV_COMMAND_UPPER_ADDR_DEST_SHIFT (0)
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#define COMMAND_STORE_IV_COMMAND_UPPER_ADDR_DEST_MASK (0xFF)
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uint32_t command;
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uint32_t dest_addr;
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} command_store_iv_t;
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#define COMMAND_FLAG_ID_CODE_SHIFT (0)
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#define COMMAND_FLAG_ID_CODE_MASK (0xFF)
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#define COMMAND_FLAG_STOP_COMMANDS_SHIFT (26)
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#define COMMAND_FLAG_SEND_INTERRUPT_SHIFT (27)
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#if WITH_DPA
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static bool dpa_seeded(void) {
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if ((rAES_STATUS & AES_BLK_STATUS_TEXT_DPA_RANDOM_SEEDED_UMASK) == 0 ||
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(rAES_STATUS & AES_BLK_STATUS_KEY_UNWRAP_DPA_RANDOM_SEEDED_UMASK) == 0) {
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return false;
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} else {
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return true;
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}
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}
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#endif
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uint32_t command_fifo_level(void) {
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return ((rAES_COMMAND_FIFO_STATUS) & AES_BLK_COMMAND_FIFO_STATUS_LEVEL_UMASK) >> 8;
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}
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void push_commands(uint32_t *cmd, uint32_t size) {
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uint32_t words;
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ASSERT(size % sizeof(uint32_t) == 0);
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words = size / sizeof(uint32_t);
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ASSERT(command_fifo_level() + words <= COMMAND_FIFO_SIZE);
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for (uint32_t i = 0; i < words; i ++) {
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dprintf(DEBUG_SPEW, "sio_aes: cmd[%d]: 0x%08x\n", i, cmd[i]);
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rAES_COMMAND_FIFO = cmd[i];
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}
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}
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uint32_t key_size(uint8_t mode) {
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switch(mode) {
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case KEY_LEN_128: return 128;
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case KEY_LEN_192: return 192;
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case KEY_LEN_256: return 256;
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default: panic("Unknown key size: %d\n", mode);
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}
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return 0;
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}
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void push_command_key(uint32_t command, uint8_t *key)
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{
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command_key_t ckey;
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memset(&ckey, 0, sizeof(ckey));
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ckey.command = OPCODE_KEY << COMMAND_OPCODE_SHIFT | command;
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if(((command >> COMMAND_KEY_COMMAND_KEY_SELECT_SHIFT) & COMMAND_KEY_COMMAND_KEY_SELECT_MASK) == 0) {
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// software key (Key Select == 0)
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ASSERT(key != NULL);
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uint32_t key_len =
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key_size((command >> COMMAND_KEY_COMMAND_KEY_LENGTH_SHIFT) & COMMAND_KEY_COMMAND_KEY_LENGTH_MASK) / 8;
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memcpy(ckey.key, key, key_len);
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// Key is not wrapped
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push_commands((uint32_t*)&ckey.command, sizeof(ckey.command));
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push_commands((uint32_t*)&ckey.key[0], key_len);
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} else {
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// non-software keys just need the command word
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push_commands((uint32_t*)&ckey.command, sizeof(ckey.command));
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}
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}
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void push_command_iv(uint8_t context, uint8_t hdcp_key, bool iv_in_hdcp, uint8_t* iv)
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{
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command_iv_t civ;
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memset(&civ, 0, sizeof(civ));
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civ.command = (OPCODE_IV << COMMAND_OPCODE_SHIFT) |
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((context & COMMAND_IV_COMMAND_IV_CONTEXT_MASK) << COMMAND_IV_COMMAND_IV_CONTEXT_SHIFT) |
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((hdcp_key & COMMAND_IV_COMMAND_HDCP_KEY_MASK) << COMMAND_IV_COMMAND_HDCP_KEY_SHIFT) |
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((iv_in_hdcp & COMMAND_IV_COMMAND_IV_IN_HDCP_MASK) << COMMAND_IV_COMMAND_IV_IN_HDCP_SHIFT);
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if (iv) {
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memcpy(&civ.iv, iv, sizeof(civ.iv));
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}
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push_commands((uint32_t*)&civ, sizeof(command_iv_t));
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}
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void push_command_data(uint8_t key_ctx, uint8_t iv_ctx, uint64_t src, uint64_t dst, uint32_t len)
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{
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command_data_t data;
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memset(&data, 0, sizeof(data));
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data.command = (OPCODE_DATA << COMMAND_OPCODE_SHIFT) |
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((len & COMMAND_DATA_COMMAND_LENGTH_MASK) << COMMAND_DATA_COMMAND_LENGTH_SHIFT) |
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((key_ctx & COMMAND_DATA_COMMAND_KEY_CONTEXT_MASK) << COMMAND_DATA_COMMAND_KEY_CONTEXT_SHIFT) |
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((iv_ctx & COMMAND_DATA_COMMAND_IV_CONTEXT_MASK) << COMMAND_DATA_COMMAND_IV_CONTEXT_SHIFT);
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data.upper_addr =
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(((src >> 32) & COMMAND_DATA_UPPER_ADDR_SOURCE_MASK) << COMMAND_DATA_UPPER_ADDR_SOURCE_SHIFT) |
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(((dst >> 32) & COMMAND_DATA_UPPER_ADDR_DEST_MASK) << COMMAND_DATA_UPPER_ADDR_DEST_SHIFT);
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data.source_addr = (uint32_t)src;
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data.dest_addr = (uint32_t)dst;
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push_commands((uint32_t*)&data, sizeof(command_data_t));
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}
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void push_command_flag(uint16_t id_code, bool stop, bool interrupt)
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{
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uint32_t flag = 0;
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flag = (OPCODE_FLAG << COMMAND_OPCODE_SHIFT) |
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((id_code & COMMAND_FLAG_ID_CODE_MASK) << COMMAND_FLAG_ID_CODE_SHIFT);
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if (stop)
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flag |= 1 << COMMAND_FLAG_SEND_INTERRUPT_SHIFT;
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if (interrupt)
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flag |= 1 << COMMAND_FLAG_STOP_COMMANDS_SHIFT;
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push_commands(&flag, sizeof(flag));
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}
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uint32_t create_key_command(bool context, uint8_t select, uint8_t len, bool wrapped, bool encrypt, uint8_t func, uint8_t mode, uint8_t id) {
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return (OPCODE_KEY << COMMAND_OPCODE_SHIFT) |
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((context & COMMAND_KEY_COMMAND_KEY_CONTEXT_MASK) << COMMAND_KEY_COMMAND_KEY_CONTEXT_SHIFT) |
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((select & COMMAND_KEY_COMMAND_KEY_SELECT_MASK) << COMMAND_KEY_COMMAND_KEY_SELECT_SHIFT) |
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((len & COMMAND_KEY_COMMAND_KEY_LENGTH_MASK) << COMMAND_KEY_COMMAND_KEY_LENGTH_SHIFT) |
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((wrapped & COMMAND_KEY_COMMAND_WRAPPED_MASK) << COMMAND_KEY_COMMAND_WRAPPED_SHIFT) |
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((encrypt & COMMAND_KEY_COMMAND_ENCRYPT_MASK) << COMMAND_KEY_COMMAND_ENCRYPT_SHIFT) |
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((func & COMMAND_KEY_COMMAND_KEY_FUNC_MASK) << COMMAND_KEY_COMMAND_KEY_FUNC_SHIFT) |
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((mode & COMMAND_KEY_COMMAND_BLOCK_MODE_MASK) << COMMAND_KEY_COMMAND_BLOCK_MODE_SHIFT) |
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((id & COMMAND_KEY_COMMAND_COMMAND_ID_MASK) << COMMAND_KEY_COMMAND_COMMAND_ID_SHIFT);
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}
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void wait_for_command_flag(void)
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{
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while ((rAES_INT_STATUS & AES_BLK_INT_STATUS_FLAG_COMMAND_UMASK) == 0) {}
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rAES_INT_STATUS = AES_BLK_INT_STATUS_FLAG_COMMAND_UMASK;
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dprintf(DEBUG_SPEW, "sio_aes: AES_STATUS=0x%08x\n", rAES_STATUS);
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dprintf(DEBUG_SPEW, "sio_aes: AES_COMMAND_FIFO_STATUS=0x%08x\n", rAES_COMMAND_FIFO_STATUS);
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dprintf(DEBUG_SPEW, "sio_aes: INT_STATUS=0x%08x\n", rAES_INT_STATUS);
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ASSERT((rAES_COMMAND_FIFO_STATUS & AES_BLK_COMMAND_FIFO_STATUS_EMPTY_UMASK) != 0);
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if (rAES_INT_STATUS) {
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panic("AES command failed, AES_STATUS=0x%08x, AES_COMMAND_FIFO_STATUS=0x%08x, INT_STATUS=0x%08x", rAES_STATUS, rAES_COMMAND_FIFO_STATUS, rAES_INT_STATUS);
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}
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}
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int
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aes_hw_crypto_cmd(u_int32_t cmd, void *src, void *dst, size_t len, u_int32_t opts, const void *key, void *iv)
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{
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uintptr_t *local_src, *local_dst;
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uint8_t *local_iv, *local_key;
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dprintf(DEBUG_SPEW, "aes_hw_crypto_cmd: cmd: 0x%08x, src: %p, dst: %p, len: 0x%08zx, opts: 0x%08x, key: %p, iv: %p \n",
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cmd, src, dst, len, opts, key, iv);
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clock_gate(CLK_AES0, true);
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#if WITH_DPA
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if (!dpa_seeded()) {
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sep_client_seed_aes();
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if(!dpa_seeded()) {
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panic("AES DPA not Seeded");
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}
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}
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#endif
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ASSERT(src != NULL);
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ASSERT(dst != NULL);
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local_src = (uintptr_t *)src;
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local_dst = (uintptr_t *)dst;
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local_iv = (uint8_t *)iv;
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local_key = (uint8_t *)key;
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/* Make sure length is multiple of 16 bytes */
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ASSERT((len > 0) && ((len & 0xf) == 0));
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uint8_t key_select = KEY_SELECT_SOFTWARE;
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uint8_t key_len = KEY_LEN_128;
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uint8_t key_mode = BLOCK_MODE_ECB;
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bool encrypt = false;
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switch (cmd & AES_CMD_MODE_MASK) {
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case AES_CMD_ECB : key_mode = BLOCK_MODE_ECB; break;
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case AES_CMD_CBC : key_mode = BLOCK_MODE_CBC; break;
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default : goto fail;
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}
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switch (cmd & AES_CMD_DIR_MASK) {
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case AES_CMD_ENC : encrypt = true; break;
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case AES_CMD_DEC : encrypt = false; break;
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default : goto fail;
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}
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/* Get the key length */
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switch (opts & AES_KEY_SIZE_MASK) {
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case AES_KEY_SIZE_128 : key_len = KEY_LEN_128; break;
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case AES_KEY_SIZE_192 : key_len = KEY_LEN_192; break;
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case AES_KEY_SIZE_256 : key_len = KEY_LEN_256; break;
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default : goto fail;
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}
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bool key_disabled = false;
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/* Set the key */
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/* Make sure the requested key is not disabled */
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switch (opts & AES_KEY_TYPE_MASK) {
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case AES_KEY_TYPE_USER :
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key_select = KEY_SELECT_SOFTWARE;
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break;
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case AES_KEY_TYPE_UID0 :
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key_select = KEY_SELECT_UID1;
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key_disabled = platform_keys_disabled(0,1);
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break;
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case AES_KEY_TYPE_GID0 :
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key_select = KEY_SELECT_GID_AP_1;
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key_disabled = platform_keys_disabled(1,0);
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break;
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case AES_KEY_TYPE_GID1 :
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key_select = KEY_SELECT_GID_AP_2;
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key_disabled = platform_keys_disabled(2,0);
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break;
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default : goto fail;
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}
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if (key_disabled) {
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dprintf(DEBUG_INFO, "SIO_AES: requested AES key has been disabled\n");
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return -1;
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}
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uint32_t key_command =
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create_key_command(0, key_select, key_len, false, encrypt, KEY_FUNC_NONE, key_mode, 0);
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dprintf(DEBUG_SPEW, "sio_aes: key_command:0x%08x\n", key_command);
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/* Verify everything is flushed out of write buffers */
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platform_memory_barrier();
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// We're going to poll for the flag interrupt after the command finishes, so clear it now
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rAES_INT_STATUS = AES_BLK_INT_STATUS_FLAG_COMMAND_UMASK;
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/* Start the block consuming commands */
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dprintf(DEBUG_SPEW, "sio_aes: AES_CONTROL_START\n");
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rAES_CONTROL = AES_BLK_CONTROL_START_UMASK;
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#if WITH_NON_COHERENT_DMA
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platform_cache_operation(CACHE_CLEAN, (void *)((uint32_t)local_key & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
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#endif /*WITH_NON_COHERENT_DMA*/
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// Push the key command out to the block
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push_command_key(key_command, local_key);
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#if WITH_NON_COHERENT_DMA
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platform_cache_operation(CACHE_CLEAN, (void *)((uint32_t)local_iv & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
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#endif /* WITH_NON_COHERENT_DMA */
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/* Load IV */
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push_command_iv(0, 0, 0, local_iv);
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#if WITH_NON_COHERENT_DMA
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platform_cache_operation(CACHE_CLEAN, (void *)((uint32_t)local_src & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
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||||
#endif /*WITH_NON_COHERENT_DMA*/
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/* Perform AES operation */
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push_command_data(0, 0, (uint64_t)local_src, (uint64_t)local_dst, len);
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||||
// Raise an interrupt and stop executing commands once all AF responses are received
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||||
push_command_flag(0, true, true);
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||||
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||||
wait_for_command_flag();
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||||
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||||
platform_memory_barrier();
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||||
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||||
#if WITH_NON_COHERENT_DMA
|
||||
platform_cache_operation(CACHE_CLEAN | CACHE_INVALIDATE, (void *)((uint32_t)local_dst & ~(CPU_CACHELINE_SIZE-1)), ROUNDUP(len, CPU_CACHELINE_SIZE) + CPU_CACHELINE_SIZE);
|
||||
#endif /*WITH_NON_COHERENT_DMA*/
|
||||
|
||||
/* Stop the block consuming commands */
|
||||
dprintf(DEBUG_SPEW, "sio_aes: AES_CONTROL_STOP\n");
|
||||
rAES_CONTROL = AES_BLK_CONTROL_STOP_UMASK;
|
||||
|
||||
clock_gate(CLK_AES0, false);
|
||||
|
||||
return 0;
|
||||
|
||||
fail:
|
||||
panic("SIO_AES: bad arguments\n");
|
||||
}
|
||||
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2013-2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
#ifndef __APPLE_AES_V2_H
|
||||
#define __APPLE_AES_V2_H
|
||||
|
||||
#include <platform/soc/hwregbase.h>
|
||||
#include SUB_PLATFORM_SPDS_HEADER(aes)
|
||||
|
||||
/* AES-v2 registers */
|
||||
|
||||
#define rAES_VERSION (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_VERSION_OFFSET))
|
||||
|
||||
#define rAES_CONFIG (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_CONFIG_OFFSET))
|
||||
|
||||
#define rAES_CONTROL (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_CONTROL_OFFSET))
|
||||
|
||||
#define rAES_STATUS (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_STATUS_OFFSET))
|
||||
|
||||
#define rAES_INT_STATUS (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_INT_STATUS_OFFSET))
|
||||
|
||||
#define rAES_INT_ENABLE (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_INT_ENABLE_OFFSET))
|
||||
|
||||
#define rAES_WATERMARKS (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_WATERMARKS_OFFSET))
|
||||
|
||||
#define rAES_COMMAND_FIFO_STATUS (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_COMMAND_FIFO_STATUS_OFFSET))
|
||||
|
||||
#define rAES_HISTORY_FIFO_STATUS (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_HISTORY_FIFO_STATUS_OFFSET))
|
||||
|
||||
#define rAES_COMMAND_FIFO_COUNT (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_COMMAND_FIFO_COUNT_OFFSET))
|
||||
|
||||
#define rAES_FLAG_COMMAND (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_FLAG_COMMAND_OFFSET))
|
||||
|
||||
#define rAES_SKG_KEY (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_SKG_KEY_OFFSET))
|
||||
|
||||
#define rAES_COMMAND_FIFO (*(volatile uint32_t *)(AES_AP_BASE_ADDR + AES_BLK_COMMAND_FIFO_OFFSET))
|
||||
|
||||
#endif /* __APPLE_AES_V2_H */
|
||||
@@ -0,0 +1,21 @@
|
||||
# Copyright (C) 2011-2013 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
|
||||
OPTIONS += \
|
||||
WITH_HW_AES=1
|
||||
|
||||
MODULES += \
|
||||
drivers/aes
|
||||
|
||||
ALL_OBJS += \
|
||||
$(LOCAL_DIR)/aes_v2.o
|
||||
|
||||
Reference in new issue
Block a user