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/*
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* Copyright (C) 2010-2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <drivers/amc/amc.h>
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#include <drivers/amc/amc_phy.h>
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#include <drivers/amp/amp_v1.h>
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#include <drivers/dram.h>
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#include <drivers/miu.h>
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#include <platform.h>
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#include <platform/chipid.h>
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#include <sys.h>
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#define CA_PIVOTS_LIST_SIZE (9)
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#define DQ_PIVOTS_LIST_SIZE (5)
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static const int ca_pivot_ps[CA_PIVOTS_LIST_SIZE] = {-400, -300, -200, -100, 0, 100, 200, 300, 400};
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static const int dq_pivot_ps[DQ_PIVOTS_LIST_SIZE] = {-300, -150, 0, 150, 300};
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static const struct amc_phy_calibration_data amp_calibration_data = {
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.bit_time_ps = 1875,
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.min_ca_window_width_ps = 150,
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.min_dq_window_width_ps = 150,
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.ca_pivot_step_size_ps = 100,
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.dq_pivot_step_size_ps = 150,
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.max_offset_setting = 63,
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.min_offset_factor = 0,
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.dll_f2_delay_fs = 10,
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.ca_pivots_list_size = CA_PIVOTS_LIST_SIZE,
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.ca_pivot_ps = (int *)ca_pivot_ps,
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.dq_pivots_list_size = DQ_PIVOTS_LIST_SIZE,
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.dq_pivot_ps = (int *)dq_pivot_ps,
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.use_resume_boot_flow = true, // to use static CA but dynamic DQ calibration
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};
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static uint32_t amp_dllupdtctrl[AMC_NUM_CHANNELS];
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void amc_phy_init(bool resume)
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{
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int i, d, f;
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for (i = 0; i < AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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rAMP_AMPEN(ch) = 1;
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#if !SUPPORT_FPGA
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rAMP_DQDQSDS(ch) = 0x0a0a0a0a;
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rAMP_NONDQDS(ch) = 0x0a0a0a0a;
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#endif
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if (amc_phy_params.flags & FLAG_AMP_PARAM_FULLDIFFMODE) {
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for (f = 0; f < AMP_FREQUENCY_SLOTS; f++)
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rAMP_DIFFMODE_FREQ(ch, f) = 0x00000121;
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}
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for (f = 0; f < AMP_FREQUENCY_SLOTS; f++) {
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for (d = 0; d < AMP_NUM_DLL; d++) {
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rAMP_DQSINDLLSCL_FREQ(ch,d,f) = amc_phy_params.freq[f].scl;
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rAMP_DQOUTDLLSCL_FREQ(ch,d,f) = amc_phy_params.freq[f].scl;
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}
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rAMP_CAOUTDLLSCL_FREQ(ch,f) = amc_phy_params.freq[f].scl;
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rAMP_CTLOUTDLLSCL_FREQ(ch,f) = amc_phy_params.freq[f].scl;
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}
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#if !SUPPORT_FPGA
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for (f = 0; f < AMP_FREQUENCY_SLOTS; f++) {
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rAMP_RDCAPCFG_FREQ(ch,f) = amc_phy_params.freq[f].rdcapcfg;
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}
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rAMP_DLLEN(ch) = 0x100;
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// Reset the master DLL to make sure that master DLL locking happens from scratch
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rAMP_DLLEN(ch) |= 0x1;
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rAMP_DLLEN(ch) &= ~0x1;
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amc_phy_run_dll_update(ch);
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#endif
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rAMP_AMPINIT(ch) = 0x1;
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#if !SUPPORT_FPGA
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rAMP_IMPCALCMD(ch) = 0x101;
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while (rAMP_IMPCALCMD(ch) & 0x1) ;
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#endif
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}
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}
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void amc_phy_enable_dqs_pulldown(bool enable)
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{
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}
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void amc_phy_scale_dll(int freqsel, int factor)
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{
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int i;
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for (i=0; i<AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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rAMP_AMPCLK(ch) = freqsel << 16;
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amc_phy_run_dll_update(ch);
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}
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}
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bool amc_phy_rddq_cal()
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{
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// use static CA offset and calibrated & shifted DQ offsets
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return false;
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}
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void amc_phy_bypass_prep(int step)
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{
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int i;
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// Make sure AMP was inited.
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// Assumptions: all supported channels are inited together,
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// and channel 0 is always used.
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if ((rAMP_AMPINIT(0) & 1) == 0)
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return;
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switch (step) {
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case 0:
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for (i = 0; i < AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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// change the DllUpdtIntvl and DllFastUpdtIntvl to 0.
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// DllUpdtAlwaysOn and DllFastUpdtAlwaysOn should be enabled
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rAMP_DLLUPDTINTVL(ch) = (1 << 28) | (1 << 12);
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// disable DLLEn
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rAMP_DLLEN(ch) = 0;
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};
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break;
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case 1:
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for (i = 0; i < AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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// Turn off periodic DLL update
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// Taken care of in step(0)
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// Turn off periodic impedance auto-calibration
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rAMP_IMPAUTOCAL(ch) = 0;
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};
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break;
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}
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}
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void amc_phy_finalize()
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{
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uint8_t i;
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// Change Master DLL from Always-on mode to periodic-on mode
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for(i = 0; i < AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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rAMP_DLLUPDTINTVL(ch) = ((1 << 28) | (0 << 12) | (0x80 << 0));
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if (amc_phy_params.flags & FLAG_AMP_PARAM_SUPPORT_FMCLK_OFF)
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rAMP_AMPCLK(ch) |= (1 << 8);
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// Make sure the pmgr_ENABLE_CLK_GATE.MCU_CLK_FIXED_GATE_ENABLE is enabled in the PMGR
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// AMC should be enabled so that it can respond to phyupd_req from AMP
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rAMP_IMPAUTOCAL(ch) = 0x00010514;
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}
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}
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void amc_phy_reset_fifos()
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{
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}
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const struct amc_phy_calibration_data * amc_phy_get_calibration_data()
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{
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return &_calibration_data;
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}
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void amc_phy_calibration_init(uint32_t *fine_lock_ps)
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{
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uint8_t i;
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const struct amc_memory_device_info *dev_info;
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dev_info = amc_get_memory_device_info();
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ASSERT(fine_lock_ps != NULL);
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*fine_lock_ps = 0;
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for (i = 0; i < AMC_NUM_CHANNELS; i++) {
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int ch = AMP_INDEX_FOR_CHANNEL(i); // cope with hole in AMP address space
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amp_dllupdtctrl[ch] = rAMP_DLLUPDTCTRL(ch);
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rAMP_DLLUPDTCTRL(ch) &= ~((3 << 20) | (1 << 16)); // DLLUptMode = 0, DllUpdtPhyUpdtTyp = 0
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*fine_lock_ps += amp_calibration_data.bit_time_ps / (((rAMP_MDLLCODE(ch) & 0x7f) + amp_calibration_data.dll_f2_delay_fs) * 4);
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rAMP_CALPATCFG(ch) = (0x3 << 8);
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rAMP_DQTRNCFG(ch) = 0x3f;
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if ( ((dev_info->vendor_id == JEDEC_MANUF_ID_SAMSUNG) && (dev_info->rev_id == 0)) ||
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((dev_info->vendor_id == JEDEC_MANUF_ID_HYNIX) && (dev_info->density == JEDEC_DENSITY_1Gb)) )
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rAMP_CALDQMSK(ch) = 0xfefefefe;
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else
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rAMP_CALDQMSK(ch) = 0x00000000;
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}
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*fine_lock_ps = *fine_lock_ps / AMC_NUM_CHANNELS;
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}
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void amc_phy_run_dll_update(uint8_t ch)
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{
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ch = AMP_INDEX_FOR_CHANNEL(ch); // cope with hole in AMP address space
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rAMP_DLLUPDTCMD(ch) = 0x1;
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while ((rAMP_DLLUPDTCMD(ch) & 0x1) != 0) ;
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}
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void amc_phy_set_addr_offset(uint8_t ch, uint8_t value)
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{
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rAMP_CAOUTDLLOVRRD(AMP_INDEX_FOR_CHANNEL(ch)) = value;
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}
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void amc_phy_set_rd_offset(uint8_t ch, uint8_t byte, uint8_t value)
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{
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rAMP_DQSINDLLOVRRD(AMP_INDEX_FOR_CHANNEL(ch), byte) = value;
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}
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void amc_phy_set_wr_offset(uint8_t ch, uint8_t byte, uint8_t value)
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{
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rAMP_DQOUTDLLOVRRD(AMP_INDEX_FOR_CHANNEL(ch), byte) = value;
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}
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void amc_phy_run_dq_training(uint8_t ch)
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{
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ch = AMP_INDEX_FOR_CHANNEL(ch); // cope with hole in AMP address space
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amc_phy_run_dll_update(ch);
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rAMP_DQTRNCMD(ch) = 0x1; // execute DQ training sequence
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while ((rAMP_DQTRNCMD(ch) & 0x1) != 0) ; // wait for training to be finished
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}
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uint32_t amc_phy_get_dq_training_status(uint8_t ch, uint8_t byte, uint8_t num_bytes)
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{
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uint8_t byte_result;
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uint32_t status;
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status = rAMP_DQTRNSTS(AMP_INDEX_FOR_CHANNEL(ch));
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byte_result = (status & (1 << (byte + 16)));
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return byte_result;
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}
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void amc_phy_configure_dll_pulse_mode(uint8_t ch, bool enable)
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{
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ch = AMP_INDEX_FOR_CHANNEL(ch); // cope with hole in AMP address space
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if (!enable) {
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rAMP_DLLUPDTCTRL(ch) &= ~((3 << 20) | (1 << 16)); // DLLUptMode = 0, DllUpdtPhyUpdtTyp = 0
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}
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else {
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rAMP_DLLUPDTCTRL(ch) = amp_dllupdtctrl[ch];
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amc_phy_run_dll_update(ch);
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}
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}
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void amc_phy_shift_dq_offset(int8_t *dq_offset, uint8_t num_bytes) {
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amc_dram_shift_dq_offset(dq_offset, num_bytes);
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}
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File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,97 @@
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/*
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* Copyright (C) 2010-2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef _AMP_V1_H
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#define _AMP_V1_H
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#include <platform/soc/hwregbase.h>
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/* Apple Memory Phy */
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#define AMP_NUM_DLL (4)
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#define AMP_FREQUENCY_SLOTS (4)
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#define AMP_INDEX_FOR_CHANNEL(_c) (((_c) < 2) ? (_c) : ((_c) + 4))
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#define rAMP_AMPEN(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x000))
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#define rAMP_AMPCLK(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x004))
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#define rAMP_AMPINIT(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x008))
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#define rAMP_AMPVER(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x00C))
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#define rAMP_IMPCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x080))
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#define rAMP_IMPOVRRD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x084))
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#define rAMP_IMPAUTOCAL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x088))
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#define rAMP_IMPCALPHYUPDT(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x08C))
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#define rAMP_IMPCALCMD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x090))
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#define rAMP_DRAMSIGDLY(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x094))
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#define rAMP_DRAMSIGPH(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x098))
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#define rAMP_DQDQSDS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x09C))
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#define rAMP_NONDQDS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0A0))
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#define rAMP_DIFFMODE_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0A4 + ((_f) * 4)))
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#define rAMP_DQFLTCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0B4))
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#define rAMP_RDCAPCFG_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x100 + ((_f) * 4)))
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#define rAMP_DQSPDRES(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x110))
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#define rAMP_CALDQMSK(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x114))
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#define rAMP_CALPATCFG(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x118))
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#define rAMP_GATETRNCMD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x11C))
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#define rAMP_GATETRNRESLT(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x120))
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#define rAMP_DQTRNCFG(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x124))
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#define rAMP_DQTRNCMD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x128))
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#define rAMP_DQTRNSTS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x12C))
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#define rAMP_DLLEN(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x180))
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#define rAMP_DLLUPDTCMD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x184))
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#define rAMP_MDLLCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x188))
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#define rAMP_DLLLOCKTIM(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x18C))
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#define rAMP_DLLLOCKCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x190))
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#define rAMP_DLLUPDTINTVL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x194))
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#define rAMP_DLLUPDTCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x198))
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#define rAMP_DLLSTS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x19C))
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#define rAMP_DQSINDLLCODE(_c,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x1A0 + ((_d) * 0x18)))
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#define rAMP_DQSINDLLOVRRD(_c,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x1A4 + ((_d) * 0x18)))
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#define rAMP_DQSINDLLSCL_FREQ(_c,_d,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x1A8 + ((_d) * 0x18) + ((_f) * 4)))
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#define rAMP_DQOUTDLLCODE(_c,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x200 + ((_d) * 0x18)))
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#define rAMP_DQOUTDLLOVRRD(_c,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x204 + ((_d) * 0x18)))
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#define rAMP_DQOUTDLLSCL_FREQ(_c,_d,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x208 + ((_d) * 0x18) + ((_f) * 4)))
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#define rAMP_CAOUTDLLCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x260))
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#define rAMP_CAOUTDLLOVRRD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x264))
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#define rAMP_CAOUTDLLSCL_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x268 + ((_f) * 4)))
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#define rAMP_CTLOUTDLLCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x278))
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#define rAMP_CTLOUTDLLOVRRD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x27C))
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#define rAMP_CTLOUTDLLSCL_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x280 + ((_f) * 4)))
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#define rAMP_CAPSTDLLCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x290))
|
||||
#define rAMP_CAPSTDLLOVRRD(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x294))
|
||||
#define rAMP_CAPSTDLLSCL_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x298 + ((_f) * 4)))
|
||||
|
||||
#define rAMP_INTEN(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x400))
|
||||
#define rAMP_INSTS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x404))
|
||||
|
||||
struct amp_per_freq {
|
||||
uint32_t scl;
|
||||
uint32_t rdcapcfg;
|
||||
};
|
||||
|
||||
struct amp_params {
|
||||
uint32_t flags;
|
||||
struct amp_per_freq freq[AMP_FREQUENCY_SLOTS];
|
||||
};
|
||||
|
||||
#define FLAG_AMP_PARAM_SUPPORT_FMCLK_OFF 0x0001
|
||||
#define FLAG_AMP_PARAM_FULLDIFFMODE 0x0002
|
||||
|
||||
#include <platform/ampconfig.h>
|
||||
|
||||
#endif /* ! _AMP_V1_H */
|
||||
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2013 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef _AMP_V2_H
|
||||
#define _AMP_V2_H
|
||||
|
||||
#include <platform/soc/hwregbase.h>
|
||||
|
||||
#define AMP_FREQUENCY_SLOTS (4)
|
||||
|
||||
/* _t: type, CA or DQ */
|
||||
/* _c: channel, 0 or 1 */
|
||||
#define AMP_DQ (0)
|
||||
#define AMP_CA (1)
|
||||
|
||||
#ifndef AMP_REG_OFFSET
|
||||
# define AMP_REG_OFFSET (0)
|
||||
#endif
|
||||
|
||||
#define rAMP_AMPEN(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x000))
|
||||
#define rAMP_AMPCLK(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x004))
|
||||
#define rAMP_AMPINIT(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x008))
|
||||
#define rAMP_AMPVER(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x00C))
|
||||
|
||||
#define rAMP_IMPCODE(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x080))
|
||||
#define rAMP_IMPOVRRD(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x084))
|
||||
#define rAMP_IMPAUTOCAL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x088))
|
||||
#define rAMP_IMPCALPHYUPDT(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x08C))
|
||||
#define rAMP_IMPCALCMD(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x090))
|
||||
#define rAMP_DRAMSIGDLY(_t,_c,_n) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x094 + ((_n) * 4)))
|
||||
#define rAMP_NONDQDS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x098))
|
||||
#define rAMP_DQDQSDS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0A4))
|
||||
#define rAMP_DIFFMODE_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0A8 + ((_f) * 4)))
|
||||
#define rAMP_DQFLTCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x0B8))
|
||||
|
||||
#define rAMP_RDCAPCFG_FREQ(_t,_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x100 + ((_f) * 4)))
|
||||
#define rAMP_DQSPDENALWYSON(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x110))
|
||||
#define rAMP_DQSPDRES(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x114))
|
||||
#define rAMP_RDFIFOPTRSTS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x118))
|
||||
#define rAMP_CALDQMSK(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x11C))
|
||||
#define rAMP_CALPATCFG(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x120) - ((_t)*0xC))
|
||||
#define rAMP_DQTRNCFG(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x124) - ((_t)*0xC))
|
||||
#define rAMP_DQTRNCMD(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x128) - ((_t)*0xC))
|
||||
#define rAMP_DQTRNSTS(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x12C) - ((_t)*0xC))
|
||||
|
||||
#define rAMP_DLLEN(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x180))
|
||||
#if SUB_PLATFORM_S7002
|
||||
#define rAMP_MDLLFREQBINDISABLE(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x184))
|
||||
#endif
|
||||
#define rAMP_DLLUPDTCMD(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x184 + AMP_REG_OFFSET))
|
||||
#define rAMP_MDLLOVRRD(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x04) + 0x188 + AMP_REG_OFFSET))
|
||||
#define rAMP_MDLLCODE(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) - ((_t)*0x04) + 0x18C + AMP_REG_OFFSET))
|
||||
#define rAMP_DLLLOCKTIM(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x190 + AMP_REG_OFFSET))
|
||||
#define rAMP_DLLLOCKCTRL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x194 + AMP_REG_OFFSET))
|
||||
#define rAMP_DLLUPDTINTVL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x198 + AMP_REG_OFFSET))
|
||||
#define rAMP_DLLUPDTCTRL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x19C + AMP_REG_OFFSET))
|
||||
#define rAMP_DLLSTS(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + 0x1A0 + AMP_REG_OFFSET))
|
||||
#define rAMP_DQSINDLLSCL_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x1B8 + ((_f) * 4) + AMP_REG_OFFSET))
|
||||
#define rAMP_CAOUTDLLSCL_FREQ(_c,_f) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x1B8 + ((_f) * 4) + AMP_REG_OFFSET))
|
||||
|
||||
#define rAMP_TESTMODE(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x180) + 0x200))
|
||||
|
||||
#define rAMP_WRDQDESKEW_CTRL(_c,_r,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x400 + ((_r)*0x28) + ((_d)*4)))
|
||||
#define rAMP_WRDQSDESKEW_CTRL(_c,_r) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x420 + ((_r)*0x28)))
|
||||
#define rAMP_WRDMDESKEW_CTRL(_c,_b) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x424 + ((_b)*0x28)))
|
||||
#define rAMP_RDDQDESKEW_CTRL(_c,_r,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x4A0 + ((_r)*0x28) + ((_d)*4)))
|
||||
#define rAMP_RDDQSDESKEW_CTRL(_c,_r) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x4C0 + ((_r)*0x28)))
|
||||
#define rAMP_RDDMDESKEW_CTRL(_c,_r) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x4C4 + ((_r)*0x28)))
|
||||
|
||||
#define rAMP_CADESKEW_CTRL(_c,_d) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + ((_d)*4) + 0x500))
|
||||
#define rAMP_CSDESKEW_CTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x528))
|
||||
#define rAMP_CKEDESKEW_CTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x52C))
|
||||
#define rAMP_CKDESKEW_CTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x530))
|
||||
|
||||
#define rAMP_DQSDLLCTRL_WR(_c, _b) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_b)*0x08) + 0x600))
|
||||
#define rAMP_DQSDLLCTRL_RD(_c, _b) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_b)*0x08) + 0x620))
|
||||
#define rAMP_DQWRLVLTIM(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x700))
|
||||
#define rAMP_DQWRLVLDLYCHAINCTRL(_c, _b) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_b)*0x04) + 0x704))
|
||||
#define rAMP_DQWRLVLSDLLCODE(_c, _b) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_b)*0x04) + 0x714))
|
||||
#define rAMP_DQWRLVLRUN(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x724))
|
||||
#define rAMP_DQWRLVLDATA(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x728))
|
||||
|
||||
#define rAMP_CASDLLCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x700))
|
||||
#define rAMP_CAWRLVLSDLLCODE(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x800))
|
||||
#define rAMP_CAWRLVLCLKDLYSEL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0x804))
|
||||
|
||||
#define rAMP_CACALCTRL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + 0x800))
|
||||
#define rAMP_CACALMASK(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + 0x804))
|
||||
#define rAMP_CACALBYTESEL(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + 0x808))
|
||||
#define rAMP_CACALBITSELMAP(_t,_c,_n) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + ((_n)*0x04) + 0x80C))
|
||||
#define rAMP_CACALPAT(_t,_c, _p) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + ((_p)*0x04) + 0x818))
|
||||
#define rAMP_CACALRUN(_t,_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + ((_t)*AMP_CA_SPACING) + ((_t)*0x100) + 0x838))
|
||||
#define rAMP_CACALRESULT(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x83C))
|
||||
|
||||
#define rAMP_DQCALCTRL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x900))
|
||||
#define rAMP_DQCALRUN(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x908))
|
||||
#define rAMP_DQCALRESULT(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + 0x90C))
|
||||
|
||||
#define rAMP_CAPHYUPDTCRTL(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0xb00))
|
||||
#define rAMP_CAPHYUPDTSTATUS(_c) (*(volatile u_int32_t *)(AMP_BASE_ADDR + ((_c)*AMP_SPACING) + AMP_CA_SPACING + 0xb04))
|
||||
|
||||
// Some bit definitions
|
||||
#define CACALRUN_CACALMODE (1 << 16)
|
||||
#define CACALRUN_RUNCACAL (1 << 0)
|
||||
#define TESTMODE_FORCECKELOW (1 << 8)
|
||||
|
||||
#define SIGN_BIT_POS (6)
|
||||
|
||||
#define AMP_MAX_RD (4)
|
||||
#define AMP_MAX_DQ (8)
|
||||
#define AMP_MAX_RANKS_PER_CHAN (2)
|
||||
|
||||
struct amp_per_freq {
|
||||
uint32_t caoutdllscl;
|
||||
uint32_t dqsindllscl;
|
||||
uint32_t rdcapcfg;
|
||||
};
|
||||
|
||||
struct amp_params {
|
||||
struct amp_per_freq freq[AMP_FREQUENCY_SLOTS];
|
||||
uint32_t drive_strength;
|
||||
uint32_t cacalib_hw_loops;
|
||||
uint32_t cacalib_sw_loops;
|
||||
bool wrlvl_togglephyupdt;
|
||||
uint32_t imp_auto_cal;
|
||||
};
|
||||
|
||||
#include <platform/ampconfig.h>
|
||||
|
||||
#endif /* _AMP_V2_H */
|
||||
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* Copyright (C) 2012-2013 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
#ifndef __AMP_V2_CALIBRATION_H
|
||||
#define __AMP_V2_CALIBRATION_H
|
||||
|
||||
#define AMP_MAX_PATTERNS 8
|
||||
|
||||
#define CALIB_SAVE 0
|
||||
#define CALIB_RESTORE 1
|
||||
#define CALIB_PMU_BYTES 64
|
||||
// 10 CA bit offsets (8 bits * 10), CK/CKE/CS deskew (8 bits), 5 WrLvl SDLLs (8 bits * 5)
|
||||
#define CALIB_NUM_BYTES_TO_SAVE (AMC_NUM_CHANNELS * (16))
|
||||
|
||||
#define CA_NUM_BITS 10
|
||||
#define CA_ALL_BITS ((1 << CA_NUM_BITS) - 1)
|
||||
#define CA_NUM_PATTERNS 64
|
||||
#define DELIMIT_POS_ADJ_CASDLL 5
|
||||
#define DELIMIT_POS_ADJ_WRDQSDLL 5
|
||||
|
||||
#define CA_MAX_SW_LOOPS CA_NUM_PATTERNS
|
||||
#define CA_MAX_LOOP_CHN_RNK (CA_MAX_SW_LOOPS * AMC_NUM_CHANNELS * AMC_NUM_RANKS)
|
||||
|
||||
#define MR2 0x02
|
||||
#define MR5 0x05
|
||||
#define MR41 0x29
|
||||
#define MR42 0x2A
|
||||
#define MR48 0x30
|
||||
|
||||
#define MIN_ENDPT 0
|
||||
#define MAX_ENDPT 1
|
||||
|
||||
#define MAX_DESKEW_OFFSET 24
|
||||
#define MAX_DESKEW_PROGRAMMED 31
|
||||
#define MAX_SDLL_VAL 63
|
||||
#define MIN_SDLL_VAL 24
|
||||
#define FINER_STEP_SZ 1
|
||||
#define COARSE_STEP_SZ 4
|
||||
#define SOLID_PASS_DETECT 8
|
||||
#define DLLVAL_BITS 0x7F
|
||||
#define DESKEW_CTRL_BITS 0x1F
|
||||
#define SDLL_NUM_BITS 7
|
||||
#define DESKEW_NUM_BITS 5
|
||||
|
||||
#if SUB_PLATFORM_S7002
|
||||
#define RD_LATENCY_ENCODE 6
|
||||
#else
|
||||
#define RD_LATENCY_ENCODE 26
|
||||
#endif
|
||||
|
||||
// maximum possible loops in the hw
|
||||
#define RDDQ_LOOPCNT 63
|
||||
#define DQ_NUM_BYTES 4
|
||||
#define DQ_NUM_BITS_PER_BYTE 8
|
||||
#define DQ_TOTAL_BITS (DQ_NUM_BYTES * DQ_NUM_BITS_PER_BYTE)
|
||||
#define DQ_MAX_DESKEW_PER_BIT 24
|
||||
#define MAX_CAWRLVL_CODE 47
|
||||
#define MAX_DQWRLVL_CODE 127
|
||||
#define DQ_NUM_PATTERNS 128
|
||||
// The number of bytes below is consecutive for a given ch, rnk, bank, and row (interleaving starts after these bytes)
|
||||
#define DQ_CONSECUTIVE_BYTES_PER_CHRNK 64
|
||||
#define DQ_BYTES_PER_COL 4 // That makes for 16 consecutive columns (or words)
|
||||
// the bank and row numbers where patterns will be written
|
||||
#define DQ_ROW 0
|
||||
#define DQ_BANK 0
|
||||
#define DQ_ADDR_RANK_BIT 16 // RIBI2 addressing for dual rank devices
|
||||
|
||||
// Macros to change format between signed integer value and offset with sign and magnitude
|
||||
#define INT_TO_OFFSET(val) ((((val < 0) ? 1 : 0) << SIGN_BIT_POS) | __abs(val))
|
||||
#define OFFSET_TO_INT(val) ((val & ~(1 << SIGN_BIT_POS)) * ((val & (1 << SIGN_BIT_POS)) ? -1 : 1))
|
||||
|
||||
#endif /* ! __AMP_V2_CALIBRATION_H */
|
||||
@@ -0,0 +1,20 @@
|
||||
# Copyright (C) 2010-2014 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
|
||||
OPTIONS += WITH_HW_AMP=1
|
||||
|
||||
ifeq ($(AMP_FILE_VERSION),)
|
||||
ALL_OBJS += $(LOCAL_DIR)/amp_v1.o
|
||||
else
|
||||
ALL_OBJS += $(LOCAL_DIR)/amp_v2.o
|
||||
endif
|
||||
|
||||
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
|
||||
Reference in new issue
Block a user