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/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <platform.h>
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#include <platform/clocks.h>
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#include <platform/soc/hwclocks.h>
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#include "dwi.h"
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#ifndef TARGET_DWI_FREQUENCY
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#error TARGET_DWI_FREQUENCY not defined by the target
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#endif
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#ifndef TARGET_DWI_TRANSFER_GAP_US
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#error TARGET_DWI_TRANSFER_GAP_US not defined by the target
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#endif
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int dwi_init(void)
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{
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u_int32_t dwi_divider, dwi_transfer_gap;
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clock_gate(CLK_DWI, true);
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dwi_divider = (clock_get_frequency(CLK_NCLK) + TARGET_DWI_FREQUENCY - 1) / TARGET_DWI_FREQUENCY;
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dwi_transfer_gap = (clock_get_frequency(CLK_NCLK) * TARGET_DWI_TRANSFER_GAP_US) / 1000000;
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rDWI_CLOCK_CONFIG = DWI_CLOCK_CONFIG_CLOCK_SCALER(dwi_divider) | DWI_CLOCK_CONFIG_TX_CPHA_1;
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rDWI_TRANSFER_GAP = dwi_transfer_gap;
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return 0;
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}
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int dwi_send_backlight_command(uint32_t backlight_command, uint32_t backlight_level)
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{
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rDWI_ITR0_TX_DATA = (backlight_command << 28) | (backlight_level & 0x7FF);
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rDWI_ITR0_CONTROL = DWI_TR_CTRL_BYTE_SWAP | DWI_TR_CTRL_BYTE_CNT(4) | DWI_TR_CTRL_TRAN_EN | DWI_TR_CTRL_SLAVE_DWI;
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return 0;
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}
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@@ -0,0 +1,36 @@
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/*
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* Copyright (C) 2014-2015 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __APPLE_DWI_H
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#define __APPLE_DWI_H
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#include <platform/soc/hwregbase.h>
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#include SUB_PLATFORM_SPDS_HEADER(dwi)
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#define rDWI_CLOCK_CONFIG (*(volatile u_int32_t *)(DWI_BASE_ADDR + DWI_BLK_CLOCK_CONFIG_OFFSET))
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#define DWI_CLOCK_CONFIG_TX_CPHA_1 (DWI_BLK_CLOCK_CONFIG_TX_CPHA_INSRT(1) << 0)
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#define DWI_CLOCK_CONFIG_TX_CPHA_2 (DWI_BLK_CLOCK_CONFIG_TX_CPHA_INSRT(0) << 0)
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#define DWI_CLOCK_CONFIG_RX_CPHA_1 (DWI_BLK_CLOCK_CONFIG_TX_CPHA_INSRT(1) << 1)
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#define DWI_CLOCK_CONFIG_RX_CPHA_2 (DWI_BLK_CLOCK_CONFIG_TX_CPHA_INSRT(0) << 1)
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#define DWI_CLOCK_CONFIG_CPOL_LOW (DWI_BLK_CLOCK_CONFIG_CPOL_INSRT(0) << 2)
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#define DWI_CLOCK_CONFIG_CPOL_HIGH (DWI_BLK_CLOCK_CONFIG_CPOL_INSRT(1) << 2)
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#define DWI_CLOCK_CONFIG_CLOCK_SCALER(_x) (DWI_BLK_CLOCK_CONFIG_CLOCK_SCALER_INSRT(_x - 1))
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#define rDWI_TRANSFER_GAP (*(volatile u_int32_t *)(DWI_BASE_ADDR + DWI_BLK_TRANSFER_GAP_OFFSET))
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#define rDWI_ITR0_CONTROL (*(volatile u_int32_t *)(DWI_BASE_ADDR + DWI_BLK_ITR0_CONTROL_OFFSET))
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#define DWI_TR_CTRL_TRAN_EN (1 << DWI_BLK_ITR0_CONTROL_ITR0_TRAN_EN_SHIFT)
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#define DWI_TR_CTRL_BYTE_CNT(_c) (DWI_BLK_ITR0_CONTROL_ITR0_BYTE_COUNT_INSRT(_c - 1))
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#define DWI_TR_CTRL_BYTE_SWAP (1 << DWI_BLK_ITR0_CONTROL_ITR0_BYTE_SWAP_SHIFT)
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#define DWI_TR_CTRL_BIT_ORDER (1 << DWI_BLK_ITR0_CONTROL_ITR0_BIT_ORDER_SHIFT)
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#define DWI_TR_CTRL_SLAVE_PSPI (DWI_BLK_ITR0_CONTROL_SLAVE_SEL_INSRT(0))
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#define DWI_TR_CTRL_SLAVE_DWI (DWI_BLK_ITR0_CONTROL_SLAVE_SEL_INSRT(1))
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#define rDWI_ITR0_TX_DATA (*(volatile u_int32_t *)(DWI_BASE_ADDR + DWI_BLK_ITR0_TX_DATA_OFFSET))
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#endif /* ! __APPLE_DWI_H */
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@@ -0,0 +1,15 @@
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# Copyright (C) 2011 Apple Inc. All rights reserved.
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#
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# This document is the property of Apple Inc.
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# It is considered confidential and proprietary.
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#
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# This document may not be reproduced or transmitted in any form,
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# in whole or in part, without the express written permission of
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# Apple Inc.
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#
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LOCAL_DIR := $(GET_LOCAL_DIR)
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OPTIONS += \
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WITH_HW_DWI=1
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ALL_OBJS += $(LOCAL_DIR)/dwi.o
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