first and last commit

This commit is contained in:
Chris Nutter committed 2023-07-08 13:03:17 -07:00
commit 1bf4efd552
2612 files changed
+636500

No files matched your search

+209
View File
@@ -0,0 +1,209 @@
/*
* Copyright (C) 2007 Apple Inc. All rights reserved.
* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#include <debug.h>
#include <drivers/spi.h>
#include <platform.h>
#include <platform/gpio.h>
#include <platform/soc/hwregbase.h>
#include "gpio.h"
#if WITH_TARGET_CONFIG
# include <target/pinconfig.h>
#else
# include <platform/pinconfig.h>
#endif
u_int32_t gpio_read(gpio_t gpio)
{
int pad = GPIO2PAD(gpio);
int pin = GPIO2PIN(gpio);
#if WITH_HW_SPI && defined(GPIO_PAD_SPI)
if (pad == GPIO_PAD_SPI) return spi_gpio_read(pin);
#endif
return (rPDATn(pad) & (1<<pin)) ? 1UL : 0UL;
}
void gpio_write(gpio_t gpio, u_int32_t val)
{
int pad = GPIO2PAD(gpio);
int pin = GPIO2PIN(gpio);
#if WITH_HW_SPI && defined(GPIO_PAD_SPI)
if (pad == GPIO_PAD_SPI) {
spi_gpio_write(pin, val);
return;
}
#endif
rFSEL = (pad << 16) | (pin << 8) | (val ? PCON_OUT_1 : PCON_OUT_0);
}
static const int gpio_config_map[GPIO_CFG_MAX] = {
[GPIO_CFG_IN] = PCON_IN,
[GPIO_CFG_OUT] = PCON_OUT,
[GPIO_CFG_OUT_0] = PCON_OUT_0,
[GPIO_CFG_OUT_1] = PCON_OUT_1,
[GPIO_CFG_FUNC(0)] = PCON_FUNC2,
[GPIO_CFG_FUNC(1)] = PCON_FUNC3,
[GPIO_CFG_FUNC(2)] = PCON_FUNC4,
[GPIO_CFG_FUNC(3)] = PCON_FUNC5
};
void gpio_configure(gpio_t gpio, u_int32_t config)
{
int pad = GPIO2PAD(gpio);
int pin = GPIO2PIN(gpio);
int func;
#if WITH_HW_SPI && defined(GPIO_PAD_SPI)
if (pad == GPIO_PAD_SPI) {
spi_gpio_configure(pin, config);
return;
}
#endif
if (config > GPIO_CFG_MAX) return;
if (config == GPIO_CFG_DFLT) {
func = (gpio_default_config[pad].pcon >> (pin * 4)) & 0xF;
} else {
func = gpio_config_map[config];
}
if (func == PCON_DISABLE) {
rPPIEn(pad) &= ~(1 << pin);
rFSEL = (pad << 16) | (pin << 8) | PCON_IN;
} else {
rFSEL = (pad << 16) | (pin << 8) | func;
rPPIEn(pad) |= (1 << pin);
}
/* Once we reconfigure, reset the pullup/pulldown to default. This could cause
a glitch on outputs, but will avoid spurious transitions on inputs. We're
between a rock and a hard place because of the GPIO block's design. */
if (config == GPIO_CFG_DFLT) {
uint16_t pupdn = gpio_default_config[pad].pupdn;
uint16_t pullup = pupdn & (1 << pin);
uint16_t pulldown = (pupdn >> 8) & (1 << pin);
if ((pullup != 0) && (pulldown != 0)) {
panic("Pullup and pulldown at same time on GPIO 0x%x", gpio);
} else if (pullup != 0) {
rPPURn(pad) |= (1 << pin);
rPPDRn(pad) &= ~(1 << pin);
} else if (pulldown != 0) {
rPPURn(pad) &= ~(1 << pin);
rPPDRn(pad) |= (1 << pin);
} else {
rPPURn(pad) &= ~(1 << pin);
rPPDRn(pad) &= ~(1 << pin);
}
}
}
void gpio_configure_pupdn(gpio_t gpio, int32_t pupdn)
{
int pad = GPIO2PAD(gpio);
int pin = 1 << GPIO2PIN(gpio);
if (pupdn < GPIO_NO_PUPDN) {
/* GPIO_PDN */
rPPURn(pad) &= ~pin;
rPPDRn(pad) |= pin;
} else if (pupdn > GPIO_NO_PUPDN) {
/* GPIO_PUP */
rPPURn(pad) |= pin;
rPPDRn(pad) &= ~pin;
} else {
/* GPIO_NO_PUPDN */
rPPURn(pad) &= ~pin;
rPPDRn(pad) &= ~pin;
}
}
int gpio_init_pinconfig(void)
{
int pad;
int pin;
dprintf(DEBUG_SPEW, "gpio_init_pinconfig()\n");
/* XXX is there a safe way to set the pullup/pulldown config and set the pin modes? */
/*
* since most of these pins are probably going to default to input coming out of the
* boot rom, we'll set the pullup/pulldown first
*/
/* load the default pullup/pulldown configuration, disallowing
the pullup and pulldown to be set at the same time */
for (pad = 0; pad < GPIO_GROUP_COUNT; pad++) {
uint32_t pullup;
uint32_t pulldown;
uint16_t pupdn;
pupdn = gpio_default_config[pad].pupdn;
pullup = pupdn & 0xFF;
pulldown = (pupdn >> 8) & 0xFF;
if ((pullup & pulldown) != 0)
panic("Pullup and pulldown conflict on pins 0x%x of pad %d", pullup & pulldown, pad);
rPPURn(pad) = pullup;
rPPDRn(pad) = pulldown;
}
/* load the default PCON values, which should also set initial PDATs for gpio out */
for (pad = 0; pad < GPIO_GROUP_COUNT; pad++)
{
uint32_t pcon;
uint32_t ppie;
ppie = 0xFF;
pcon = gpio_default_config[pad].pcon;
for (pin = 0; pin < 8; pin++) {
if (((pcon >> (pin * 4)) & 0xF) == PCON_DISABLE) {
pcon &= ~(0xF << (pin * 4));
ppie &= ~(1 << pin);
}
}
rPCONn(pad) = pcon;
rPPIEn(pad) = ppie;
}
#ifdef DEFAULT_ODEN
/* set port configuration for I2Cx and TWC */
rODEN = DEFAULT_ODEN;
#endif
#if defined(DEFAULT_DSTR0)
/* set the chip default drive strength */
rDSTR0 = DEFAULT_DSTR0;
#endif
#ifdef DEFAULT_OSC_DSTR
/* set oscillator drive strength */
rOSC_DSTR = DEFAULT_OSC_DSTR;
#endif
return 0;
}
#if APPLICATION_IBOOT
int gpio_diag_pinconfig(void)
{
return 0;
}
#endif /* APPLICATION_IBOOT */
+85
View File
@@ -0,0 +1,85 @@
/*
* Copyright (C) 2007 Apple Inc. All rights reserved.
* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __SAMSUNG_GPIO_H
#define __SAMSUNG_GPIO_H
#include <platform/soc/hwregbase.h>
/* Register Offsets for Samsung GPIOs */
#define rPCONn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x000 + (n) * 0x20))
#define rPDATn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x004 + (n) * 0x20))
#define rPCTLn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x008 + (n) * 0x20))
#define rPPURn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x00C + (n) * 0x20))
#define rPPDRn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x010 + (n) * 0x20))
#define rPPIEn(n) (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x014 + (n) * 0x20))
#define rFSEL (*(volatile u_int32_t *)(GPIO_BASE_ADDR + GPIO_FSEL_OFFSET))
#define rDSTR0 (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x380))
#define rOSC_DSTR (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x388))
#define rODEN (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x3C0))
#define rEMAC0 (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x3C4))
#define rEMAC1 (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x3C8))
#define rEMAC2 (*(volatile u_int32_t *)(GPIO_BASE_ADDR + 0x3CC))
/* Base Pin Defines for Samsung GPIOs */
#define PORT(port, pin) ((u_int32_t)((port) << 8) | pin)
#define GPIO2PIN(gpio) ((gpio) & 0x7)
#define GPIO2PAD(gpio) (((gpio) >> 8) & 0x1f)
/* Precomputes the PCON register's value */
#define PCON(pinfunc0, pinfunc1, pinfunc2, pinfunc3, pinfunc4, pinfunc5, pinfunc6, pinfunc7) \
((u_int32_t)(((pinfunc0) << 0) | ((pinfunc1) << 4) | ((pinfunc2) << 8) | ((pinfunc3) << 12) | \
((pinfunc4) << 16) | ((pinfunc5) << 20) | ((pinfunc6) << 24) | ((pinfunc7) << 28)))
/* some PCON constants */
enum {
PCON_IN = 0,
PCON_OUT = 1,
PCON_FUNC2 = 2,
PCON_FUNC3 = 3,
PCON_FUNC4 = 4,
PCON_FUNC5 = 5,
PCON_FUNC6 = 6,
PCON_DISABLE = 0xd, /* not actually supported by the hardware, implies PCON_IN
and input enable disabled */
PCON_OUT_0 = 0xe, /* same as PCON_OUT, but also sets PDAT to zero */
PCON_OUT_1 = 0xf /* same as PCON_OUT, but also sets PDAT to one */
};
/* pull up/down configuration */
enum {
NO_PUPDN = 0,
PUP = (1 << 0),
PDN = (1 << 8)
};
#define PUPDN(pinupdn0, pinupdn1, pinupdn2, pinupdn3, pinupdn4, pinupdn5, pinupdn6, pinupdn7) \
((uint16_t)(((pinupdn0) << 0) | ((pinupdn1) << 1) | ((pinupdn2) << 2) | ((pinupdn3) << 3) | \
((pinupdn4) << 4) | ((pinupdn5) << 5) | ((pinupdn6) << 6) | ((pinupdn7) << 7)))
struct gpio_default_config {
uint32_t pcon;
uint16_t pupdn;
};
#define PINCONFIG(pcon0, pupdn0, pcon1, pupdn1, pcon2, pupdn2, pcon3, pupdn3, \
pcon4, pupdn4, pcon5, pupdn5, pcon6, pupdn6, pcon7, pupdn7) \
{ .pcon = PCON(pcon0, pcon1, pcon2, pcon3, pcon4, pcon5, pcon6, pcon7), \
.pupdn = PUPDN(pupdn0, pupdn1, pupdn2, pupdn3, pupdn4, pupdn5, pupdn6, pupdn7) \
}
#endif /* __SAMSUNG_GPIO_H */
+16
View File
@@ -0,0 +1,16 @@
# Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
#
# This document is the property of Apple Computer, Inc.
# It is considered confidential and proprietary.
#
# This document may not be reproduced or transmitted in any form,
# in whole or in part, without the express written permission of
# Apple Computer, Inc.
#
LOCAL_DIR := $(GET_LOCAL_DIR)
OPTIONS += \
WITH_HW_GPIO=1
ALL_OBJS += \
$(LOCAL_DIR)/gpio.o