first and last commit

target/b238/include/target/aspnandconfig.h

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+/*
+ * Copyright (C) 2014 Apple Inc. All rights reserved.
+ *
+ * This document is the property of Apple Computer, Inc.
+ * It is considered confidential and proprietary.
+ *
+ * This document may not be reproduced or transmitted in any form,
+ * in whole or in part, without the express written permission of
+ * Apple Inc.
+ */
+#ifndef __TARGET_ASPNANDCONFIG_H
+#define __TARGET_ASPNANDCONFIG_H
+
+//MLC devices
+#define ASPNAND_MLC_WRITE_DIES_IN_PARALLEL 4
+#define ASPNAND_SLC_WRITE_DIES_IN_PARALLEL 2
+#define ASPNAND_ERASE_DIES_IN_PARALLEL 4
+#define ASPNAND_READ_DIES_IN_PARALLEL 4
+#define ASPNAND_MLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_READ_LOW_POWER_DIES_IN_PARALLEL 2
+
+//TLC devices
+#define ASPNAND_TLC_TLC_WRITE_DIES_IN_PARALLEL 8
+#define ASPNAND_TLC_SLC_WRITE_DIES_IN_PARALLEL 8
+#define ASPNAND_TLC_ERASE_DIES_IN_PARALLEL 4
+#define ASPNAND_TLC_READ_DIES_IN_PARALLEL 4
+#define ASPNAND_TLC_TLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_TLC_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_TLC_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
+#define ASPNAND_TLC_READ_LOW_POWER_DIES_IN_PARALLEL 2
+
+// rdar://problem/18371949 - these values should be the same for post-OkemoTaos targets
+#define ASPNAND_INDIRECTION_MEMORY (4*1024*1024)
+#define ASPNAND_LEGACY_INDIRECTION_MEMORY ASPNAND_INDIRECTION_MEMORY
+
+#endif

target/b238/include/target/gpiodef.h

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+/*
+ * Copyright (C) 2011 Apple Inc. All rights reserved.
+ *
+ * This document is the property of Apple Inc.
+ * It is considered confidential and proprietary.
+ *
+ * This document may not be reproduced or transmitted in any form,
+ * in whole or in part, without the express written permission of
+ * Apple Inc.
+ */
+#ifndef __TARGET_GPIODEF_H
+#define __TARGET_GPIODEF_H
+
+/* B238 specific gpio -> pin mappings */
+
+#include <platform/gpio.h>
+
+/* define target-specific gpios in a generic fashion here. */
+
+#define GPIO_BOARD_REV0		GPIO( 9, 2)	//  74 : GPIO[34]
+#define GPIO_BOARD_REV1		GPIO( 9, 1)	//  73 : GPIO[35]
+#define GPIO_BOARD_REV2		GPIO( 9, 0)	//  72 : GPIO[36]
+#define GPIO_BOARD_REV3		GPIO( 8, 7)	//  71 : GPIO[37]
+
+/* D2186 watchdog tickle, 'KEEPACT' */
+#define GPIO_WDOG_TICKLE	GPIO(13, 3)	// 107 : GPIO[19] -> AP_TO_PMU_KEEPACT
+
+/* which IICs to initialize */
+// for t7000/fiji IICS_COUNT is 4.   
+// if IICS_MASK is not defined it is set to 0xF
+// iic0 - ADI PMU
+// iic1 - Accel
+// iic2 - Mic Codec
+// iic3 - Nitrogen
+#define IICS_MASK		(0xF)
+
+#endif /* ! __TARGET_GPIODEF_H */

target/b238/include/target/powerconfig.h

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+/*
+ * Copyright (C) 2015 Apple Inc. All rights reserved.
+ *
+ * This document is the property of Apple Inc.
+ * It is considered confidential and proprietary.
+ *
+ * This document may not be reproduced or transmitted in any form,
+ * in whole or in part, without the express written permission of
+ * Apple Inc.
+ */
+#ifndef __TARGET_POWERCONFIG_H
+#define __TARGET_POWERCONFIG_H
+
+/* configuration per target */
+
+#define PMU_IIC_BUS		0
+
+
+/* this configuration is very PMU specific and must be included exactly once in power.c */
+#ifdef POWERCONFIG_PMU_SETUP
+
+static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
+{
+};
+
+static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
+{
+};
+
+static const struct pmu_setup_struct pmu_warm_init[] =
+{
+};
+
+// XXX: review setup for each GPIO and add back decoded description of each config
+// rdar://problem/19654165 B238: IO Spreadsheet Tracker
+
+static const struct pmu_setup_struct pmu_cold_init[] =
+{
+	{ PMU_IIC_BUS, kD2186_BUCK_DWI_CTRL0,	0x07 },			// <rdar://problem/20401454> B238: Multiple panics when entering single user mode - need to enable DWI comm between PMU and bucks
+	{ PMU_IIC_BUS, kD2186_GPIO9_CONF1,	    0x93 },		    // <rdar://problem/21039044> B238: GPIO17 wake on rising edge	
+};
+
+
+static const struct core_rails_struct cpu_rails[] =
+{
+	{ PMU_IIC_BUS, 0, kD2186_BUCK0_VSEL }
+};
+
+static const struct core_rails_struct ram_rails[] =
+{
+	{ PMU_IIC_BUS, 0, kD2186_BUCK5_VSEL }
+};
+
+static const struct core_rails_struct soc_rails[] =
+{
+    { PMU_IIC_BUS, 0, kD2186_BUCK2_VSEL }
+};
+
+#endif /* POWERCONFIG_PMU_SETUP */
+
+#define TARGET_POWER_NO_BATTERY		1
+//#define TARGET_POWER_USB_MASK		STATUS_FLAG_MAKE(0, kD1815_STATUS_A_VBUS_EXT)
+#define ALWAYS_BOOT_BATTERY_VOLTAGE	(3000)
+#define PRECHARGE_BACKLIGHT_LEVEL	103
+
+#define ACC_PWR_LDO			(6)
+
+#endif

target/b238/include/target/uartconfig.h

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+/*
+ * Copyright (C) 2009 Apple Inc. All rights reserved.
+ *
+ * This document is the property of Apple Inc.
+ * It is considered confidential and proprietary.
+ *
+ * This document may not be reproduced or transmitted in any form,
+ * in whole or in part, without the express written permission of
+ * Apple Inc.
+ */
+#ifndef __TARGET_UARTCONFIG_H
+#define __TARGET_UARTCONFIG_H
+
+/* define one debug serial ports */
+#define DEBUG_SERIAL_PORT		(0)
+
+#define UART_FLOWCONTROL_MASK		(0x08)
+
+#endif