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@@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2012 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __TARGET_ADBE_SETTINGS_H
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#define __TARGET_ADBE_SETTINGS_H
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static struct adbe_v1_tuneable adbe_tuneables[] = {
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{
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.name = "default",
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.adbe0_vblank_pos_vbi_pulse = 0x0000,
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.adbe0_vblank_clk_gate_wakeup = 0x0000,
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.adbe0_vblank_clk_gate_idle = 0x0001,
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.adbe0_vblank_blk_idle_dpb = 0x0000,
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.adbe0_vblank_blk_idle_aap = 0x0000,
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.adbe0_tunable_mode_ctrl = (DBEMODECNTL_DYN_CLK_GATE_ENABLE | DBEMODECNTL_AFC_TEARDOWN_ENABLE | DBEMODECNTL_PMGR_CLK_GATE_ENABL| DBEMODECNTL_BLK_CLK_GATE_ENABLE),
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.adbe0_aap_support = 1,
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},
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};
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#endif
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@@ -0,0 +1,155 @@
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/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/*
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* The amc_param struct is defined in drivers/apple/amc/amc.h, and this
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* file should only by included from amc.c.
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*/
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#define AMC_PARAMS_AP_DEV (1)
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static const struct amc_param amc_params_dev = {
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.flags = (FLAG_AMC_PARAM_BUSTAT23),
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.tREFi = 0x11,
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.longsrcnt = 0x2008,
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.srextrarefcnt = 0x00020000,
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.rdlat = 4,
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.wrlat = 2,
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.phyrdlat = 10,
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.phywrlat = 1,
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.pdn = 0x22000203,
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.read = 0x00000101,
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.bustat = 0x0022221b,
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.bustat2 = 0x0022221b,
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.derate = 0x04110111,
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.mcphyupdate = 0x05030000,
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.autoref_params = 0x00000021,
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.pwrmngtparam_small = 0x00011000,
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.pwrmngtparam_guided = 0x01801000,
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.chnldec = 0x00050000,
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.arefparam = 0x0c00a000,
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.aref_freq0 = 0x00000110,
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.schen_default = 0x00000110,
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.mr1 = 0x44,
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.mr2 = 0x1a,
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.pwrmngten_default = 0x00100000,
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.freq = {
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{ // 522MHz
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.cas = 0x00000203,
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.pch = 0x00020303,
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.act = 0x08020303,
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.autoref = 0x01020000,
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.selfref = 0x00002030,
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.modereg = 0x00010772,
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.mifcassch = 0x001f0110,
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},
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{ // 400MHz
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.cas = 0x00000003,
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.pch = 0x00000003,
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.act = 0x08020303,
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.autoref = 0x01020000,
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.selfref = 0x00002000,
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.modereg = 0x00010000,
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.mifcassch = 0x00000000,
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},
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{ // 200MHz
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.cas = 0x00000003,
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.pch = 0x00000003,
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.act = 0x08020303,
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.autoref = 0x01020000,
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.selfref = 0x00002000,
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.modereg = 0x00010000,
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.mifcassch = 0x00000000,
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},
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{ // 50 & 24MHz
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.cas = 0x00000003,
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.pch = 0x00000003,
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.act = 0x08020303,
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.autoref = 0x01020000,
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.selfref = 0x00002000,
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.modereg = 0x00010000,
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.mifcassch = 0x00000000,
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}
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}
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};
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static const struct amc_param amc_params_ap = {
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.flags = (FLAG_AMC_PARAM_BUSTAT23 | FLAG_AMC_PARAM_SLOW_BOOT),
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.tREFi = 0x5d,
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.longsrcnt = 0x2008,
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.srextrarefcnt = 0x00020000,
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.rdlat = 6,
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.wrlat = 3,
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.phyrdlat = 10,
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.phywrlat = 2,
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.pdn = 0x22000403,
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.read = 0x00000203,
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.bustat = 0x0022221b,
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.bustat2 = 0x0022221b,
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.derate = 0x2483135b,
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.mcphyupdate = 0x05030000,
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.autoref_params = 0x00000021,
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.pwrmngtparam_small = 0x00011000,
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.pwrmngtparam_guided = 0x01801000,
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.chnldec = 0x00050000,
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.arefparam = 0x0c00a000,
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.aref_freq0 = 0x00000110,
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.schen_default = 0x00000110,
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.mr1 = 0x44,
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.mr2 = 0x1a,
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.pwrmngten_default = 0x00100000,
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.freq = {
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{ // 522MHz
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.cas = 0x00000308,
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.pch = 0x00030612,
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.act = 0x14040908,
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.autoref = 0x19350000,
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.selfref = 0x00039060,
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.modereg = 0x40250772,
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.mifcassch = 0x001f0110,
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},
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{ // 400MHz
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.cas = 0x00000005,
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.pch = 0x00000009,
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.act = 0x0a020505,
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.autoref = 0x0d1b0000,
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.selfref = 0x0001d000,
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.modereg = 0x00130000,
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.mifcassch = 0x00000000,
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},
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{ // 200MHz
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.cas = 0x00000003,
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.pch = 0x00000005,
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.act = 0x08020303,
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.autoref = 0x070e0000,
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.selfref = 0x0000f000,
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.modereg = 0x000a0000,
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.mifcassch = 0x00000000,
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},
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{ // 50
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.cas = 0x00000003,
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.pch = 0x00000003,
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.act = 0x08020303,
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.autoref = 0x02040000,
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.selfref = 0x00004000,
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.modereg = 0x00030000,
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.mifcassch = 0x00000000,
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}
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}
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};
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static const struct amc_tunable amc_tunables[] = {
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{ 0, 0 }
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};
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@@ -0,0 +1,40 @@
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/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/*
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* The amc_param struct is defined in drivers/apple/amp/amp.h, and this
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* file should only by included from that amp.c.
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*/
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static struct amp_params amc_phy_params = {
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.freq = {
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{
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.caoutdllscl = 0x00000008,
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.dqsindllscl = 0x00000008,
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.rdcapcfg = 0x0002040a
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},
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{
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.caoutdllscl = 0x00000010,
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.dqsindllscl = 0x00000010,
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.rdcapcfg = 0x20020308
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},
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{
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.caoutdllscl = 0x00000020,
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.dqsindllscl = 0x00000020,
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.rdcapcfg = 0x40020308
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},
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{
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.caoutdllscl = 0x0000003f,
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.dqsindllscl = 0x0000003f,
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.rdcapcfg = 0x60020308
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}
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}
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};
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@@ -0,0 +1,38 @@
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/*
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* Copyright (C) 2012 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __TARGET_ASPNANDCONFIG_H
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#define __TARGET_ASPNANDCONFIG_H
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//MLC devices
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#define ASPNAND_MLC_WRITE_DIES_IN_PARALLEL 4
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#define ASPNAND_SLC_WRITE_DIES_IN_PARALLEL 2
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#define ASPNAND_ERASE_DIES_IN_PARALLEL 4
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#define ASPNAND_READ_DIES_IN_PARALLEL 4
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#define ASPNAND_MLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_READ_LOW_POWER_DIES_IN_PARALLEL 2
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//TLC devices
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#define ASPNAND_TLC_TLC_WRITE_DIES_IN_PARALLEL 8
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#define ASPNAND_TLC_SLC_WRITE_DIES_IN_PARALLEL 8
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#define ASPNAND_TLC_ERASE_DIES_IN_PARALLEL 2
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#define ASPNAND_TLC_READ_DIES_IN_PARALLEL 8
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#define ASPNAND_TLC_TLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_TLC_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_TLC_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
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#define ASPNAND_TLC_READ_LOW_POWER_DIES_IN_PARALLEL 2
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// rdar://problem/18371949 - these values should be the same for post-OkemoTaos targets
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#define ASPNAND_INDIRECTION_MEMORY (2*1024*1024)
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#define ASPNAND_LEGACY_INDIRECTION_MEMORY (2*1024*1024)
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#endif
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@@ -0,0 +1,20 @@
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/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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||||
* It is considered confidential and proprietary.
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||||
*
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||||
* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
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*/
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#ifndef __TARGET_GPIODEF_H
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#define __TARGET_GPIODEF_H
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/* Cyclonic specific gpio -> pin mappings */
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#include <platform/gpio.h>
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/* define target-specific gpios in a generic fashion here. */
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#endif /* ! __TARGET_GPIODEF_H */
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@@ -0,0 +1,153 @@
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// Copyright (C) 2008-2010 Apple, Inc. All rights reserved.
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//
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// This document is the property of Apple, Inc.
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// It is considered confidential and proprietary.
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//
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// This document may not be reproduced or transmitted in any form,
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||||
// in whole or in part, without the express written permission of
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// Apple, Inc.
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//
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// NOTE: This is a generated file and should not be hand-edited!
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//
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// =============================================================================
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// Nand Geometry Table
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static NandGeometry _nandGeometryTable[] =
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{
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{
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/* chipId */ { 0x98, 0xE7, 0x94, 0x32 },
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/* blocksPerCS */ 4100,
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/* pagesPerBlock */ 128,
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/* dataBytesPerPage */ 8192,
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/* spareBytesPerPage */ 448,
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/* eccPer512Bytes */ 16,
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/* initialBBType */ INIT_BBT_TOSHIBA_MLC,
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/* diesPerCS */ 1
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}
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};
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// =============================================================================
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// Nand Timing Table
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static NandTiming _nandTimingTable[] =
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{
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{
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/* configId */
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{
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/* connectedBusCnt */ 2,
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/* packageCnt */ 1,
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/* packageIds[] */
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{
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{
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/* chipId */ { 0x98, 0xE7, 0x94, 0x32 },
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/* ceCnt */ 2
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}
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}
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},
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/* writeCycleNanosecs */ 25,
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/* writeSetupNanosecs */ 12,
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/* writeHoldNanosecs */ 10,
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/* readCycleNanosecs */ 25,
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/* readSetupNanosecs */ 12,
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/* readHoldNanosecs */ 10,
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/* readDelayNanosecs */ 20,
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/* readValidNanosecs */ 25
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}
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};
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#if (defined (AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// NandChipId Description
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const NandChipIdDescription _nandChipIdDescriptionTable[] =
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{
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{
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/* chipId */ { 0x98, 0xE7, 0x94, 0x32 },
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/* die */ "32nm",
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/* vendor_name */ "Toshiba"
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}
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};
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// =============================================================================
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// Nand Description Table
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static const NandDescription _nandDescriptionTable[] =
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{
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{
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/* packageId */
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{
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/* chipId */ { 0x98, 0xE7, 0x94, 0x32 },
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/* ceCnt */ 2
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},
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/* appleName */ "335S0700",
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/* vendor_part_num */ "TH58NVG6D2FLA49",
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/* package_type */ "DDP",
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/* package_size */ "1.00mm LGA"
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}
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||||
};
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const UInt32 _nandDescriptionTableSize = sizeof(_nandDescriptionTable) / sizeof(NandDescription);
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#endif // (defined(AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// Nand Board Support Table
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static NandBoardSupport _nandBoardSupportTable[] =
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{
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||||
{
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/* configId */
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{
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||||
/* connectedBusCnt */ 2,
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||||
/* packageCnt */ 1,
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||||
/* packageIds[] */
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||||
{
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||||
{
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||||
/* deviceId */ { 0x98, 0xE7, 0x94, 0x32 },
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||||
/* ceCnt */ 2
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||||
}
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||||
}
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||||
},
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||||
/* vsType */ FIL_VS_TOSHIBA_2P_EXT
|
||||
}
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||||
};
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||||
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||||
// =============================================================================
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||||
// Nand Board Timing Table
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||||
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||||
static NandBoardInfo _nandBoardInfo =
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{
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||||
/* controlDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
/* dataDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
/* chipEnableDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
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||||
/* socToNandRiseNanosecs */ 10,
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||||
/* socToNandFallNanosecs */ 10,
|
||||
/* nandToSocRiseNanosecs */ 10,
|
||||
/* nandToSocFallNanosecs */ 10,
|
||||
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||||
/* landing map */
|
||||
{
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||||
0x00000303
|
||||
},
|
||||
|
||||
/* useToggleMode */ 0,
|
||||
/* useDiffDQSMode */ 0,
|
||||
/* useDiffREMode */ 0,
|
||||
/* useVref */ 0
|
||||
};
|
||||
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||||
static NandFormat _nandFormatPpn =
|
||||
{
|
||||
/* metaPerLogicalPage */ 16,
|
||||
/* validMetaPerLogicalPage */ 16,
|
||||
/* logicalPageSize */ 0
|
||||
};
|
||||
|
||||
static NandFormat _nandFormatRaw =
|
||||
{
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||||
/* metaPerLogicalPage */ 12,
|
||||
/* validMetaPerLogicalPage */ 10,
|
||||
/* logicalPageSize */ 0
|
||||
};
|
||||
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||||
@@ -0,0 +1,23 @@
|
||||
/*
|
||||
* Copyright (C) 2013 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Computer, Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
// Minimal definitions to make lib/power.c happy
|
||||
#define TARGET_POWER_NO_BATTERY 1
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 824
|
||||
#define ALWAYS_BOOT_BATTERY_VOLTAGE (5000)
|
||||
|
||||
// This fake SoC block takes the place of the external PMU in Fastsim
|
||||
#define SWIFTER_PMU_BASE 0x20F050000
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,17 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define two debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (0)
|
||||
|
||||
#endif
|
||||
Reference in new issue
Block a user