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@@ -0,0 +1,22 @@
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/*
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* Copyright (C) 2010 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/*
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* The amg_param struct is defined in drivers/apple/amg/amg.h, and this
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* file should only by included from amg.c.
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*/
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static const struct amg_params amc_phy_params = {
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.flags = FLAG_AMG_PARAM_CAL_STATIC,
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.core_config = 0x00001053,
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.read_latency = 0x0000669b,
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.gate_offset = 0x08080808,
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};
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@@ -0,0 +1,251 @@
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/*
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* Copyright (C) 2010,2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __TARGET_DISPLAY_GAMMA_TABLES_H
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#define __TARGET_DISPLAY_GAMMA_TABLES_H
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/* K9x display gamma tables */
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static const display_gamma_table ipad2_display_gamma_tables[] =
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{
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{
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0x00960C49, 0x00FFFF7F, // LGD P5 table V0
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{
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0x62, 0xca, 0x1d, 0xd0, 0x1d, 0x00, 0x00, 0x0d,
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0x0d, 0x00, 0xc0, 0x1d, 0x77, 0xd3, 0x1d, 0x1c,
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0xc7, 0x71, 0x1c, 0x00, 0x70, 0x00, 0x00, 0x00,
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0x00, 0x00, 0xd0, 0x40, 0x03, 0x0d, 0x34, 0x34,
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0x0d, 0x0d, 0x00, 0x1c, 0x77, 0xdc, 0x71, 0x1c,
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0xc7, 0x71, 0xc7, 0xc1, 0x01, 0x70, 0xc0, 0x01,
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0x07, 0xc0, 0x01, 0x40, 0x00, 0x1c, 0x00, 0x1c,
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0x1c, 0xc7, 0xdd, 0x4d, 0xd3, 0x4d, 0x00, 0x00,
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0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x04, 0x40, 0xc7, 0x01, 0xd0, 0xd0,
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0x00, 0x00, 0x70, 0x77, 0x37, 0xdd, 0x74, 0xdc,
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0x71, 0xdc, 0x1d, 0x07, 0x00, 0x1c, 0x00, 0x00,
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0x00, 0x00, 0x00, 0xd0, 0xd0, 0x40, 0x03, 0x0d,
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0x4d, 0x43, 0x03, 0x1c, 0xc7, 0x1d, 0x77, 0x1c,
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0x07, 0xc7, 0xc1, 0x71, 0x00, 0x70, 0x00, 0x70,
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0x00, 0x00, 0x1c, 0xd0, 0x01, 0x00, 0x00, 0xc0,
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0x01, 0x07, 0x77, 0x77, 0x77, 0x13, 0x07, 0x00,
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0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x04, 0x40, 0x77, 0x00, 0x40, 0x43,
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0x03, 0x0d, 0x07, 0x07, 0xc7, 0x1d, 0x07, 0x07,
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0x70, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0,
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0x00, 0x0d, 0xd0, 0x34, 0x34, 0x0d, 0x4d, 0xd3,
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0x0d, 0x0d, 0xc0, 0x71, 0x1c, 0xc7, 0x71, 0x70,
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0x70, 0x1c, 0x1c, 0x00, 0x07, 0xc0, 0x01, 0x70,
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0x00, 0x1c, 0x00, 0x01, 0x1c, 0x00, 0x1c, 0x77,
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0xdc, 0x4d, 0x03, 0x0d, 0x00, 0x34, 0x4d, 0xd3,
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0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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}
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},
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{
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0x00950C49, 0x00FFFF7F, // LGD P6 table V0 (same as P5)
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{
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0x62, 0xca, 0x1d, 0xd0, 0x1d, 0x00, 0x00, 0x0d,
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0x0d, 0x00, 0xc0, 0x1d, 0x77, 0xd3, 0x1d, 0x1c,
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0xc7, 0x71, 0x1c, 0x00, 0x70, 0x00, 0x00, 0x00,
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0x00, 0x00, 0xd0, 0x40, 0x03, 0x0d, 0x34, 0x34,
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0x0d, 0x0d, 0x00, 0x1c, 0x77, 0xdc, 0x71, 0x1c,
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0xc7, 0x71, 0xc7, 0xc1, 0x01, 0x70, 0xc0, 0x01,
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0x07, 0xc0, 0x01, 0x40, 0x00, 0x1c, 0x00, 0x1c,
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0x1c, 0xc7, 0xdd, 0x4d, 0xd3, 0x4d, 0x00, 0x00,
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0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x04, 0x40, 0xc7, 0x01, 0xd0, 0xd0,
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0x00, 0x00, 0x70, 0x77, 0x37, 0xdd, 0x74, 0xdc,
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0x71, 0xdc, 0x1d, 0x07, 0x00, 0x1c, 0x00, 0x00,
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0x00, 0x00, 0x00, 0xd0, 0xd0, 0x40, 0x03, 0x0d,
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0x4d, 0x43, 0x03, 0x1c, 0xc7, 0x1d, 0x77, 0x1c,
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0x07, 0xc7, 0xc1, 0x71, 0x00, 0x70, 0x00, 0x70,
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0x00, 0x00, 0x1c, 0xd0, 0x01, 0x00, 0x00, 0xc0,
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0x01, 0x07, 0x77, 0x77, 0x77, 0x13, 0x07, 0x00,
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0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x04, 0x40, 0x77, 0x00, 0x40, 0x43,
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0x03, 0x0d, 0x07, 0x07, 0xc7, 0x1d, 0x07, 0x07,
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0x70, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0,
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0x00, 0x0d, 0xd0, 0x34, 0x34, 0x0d, 0x4d, 0xd3,
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0x0d, 0x0d, 0xc0, 0x71, 0x1c, 0xc7, 0x71, 0x70,
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0x70, 0x1c, 0x1c, 0x00, 0x07, 0xc0, 0x01, 0x70,
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0x00, 0x1c, 0x00, 0x01, 0x1c, 0x00, 0x1c, 0x77,
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0xdc, 0x4d, 0x03, 0x0d, 0x00, 0x34, 0x4d, 0xd3,
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0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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}
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},
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{
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0x00970C49, 0x00FFFF7F, // LGD P3 table V0
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{
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0x62, 0xca, 0x04, 0x00, 0x71, 0x00, 0x40, 0x03,
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0x0d, 0x00, 0x70, 0xdc, 0xdd, 0xdd, 0x1d, 0x07,
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0x07, 0xc7, 0x01, 0xd7, 0x00, 0x00, 0x00, 0xd0,
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0xd0, 0x40, 0x43, 0x37, 0xdd, 0x34, 0xdd, 0x74,
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0x37, 0x0d, 0x00, 0xc7, 0x1d, 0x77, 0x1c, 0x1c,
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0x1c, 0xc7, 0xc1, 0x01, 0x70, 0xc0, 0x01, 0x07,
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0xc0, 0x01, 0x47, 0x07, 0x00, 0x1c, 0xc0, 0x1d,
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0xc7, 0xdd, 0x40, 0x03, 0xd0, 0x40, 0x77, 0x77,
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0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x74, 0xd0, 0x04, 0x07, 0x00, 0x0d,
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0x00, 0x00, 0x70, 0x77, 0x77, 0xd3, 0xdd, 0x71,
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0x70, 0x1c, 0xc7, 0x01, 0x00, 0x00, 0x00, 0x40,
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0x03, 0x0d, 0x34, 0x74, 0xd3, 0x34, 0xdd, 0x74,
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0x77, 0xd3, 0x00, 0xc7, 0x71, 0xc7, 0x71, 0x70,
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0x70, 0x1c, 0x1c, 0x70, 0x00, 0x70, 0x00, 0x70,
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0x00, 0x70, 0x00, 0x04, 0x00, 0x00, 0x70, 0x70,
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0x1c, 0x77, 0x37, 0x34, 0xd0, 0xd0, 0xdd, 0xdd,
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0xdd, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x74, 0x0d, 0x1d, 0x07, 0xd0, 0x40,
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0x03, 0x00, 0x00, 0x07, 0x1c, 0xc7, 0x01, 0xc0,
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0x01, 0xc0, 0x01, 0x0d, 0x34, 0x00, 0x34, 0x4d,
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0x37, 0x4d, 0xd3, 0xdd, 0xdd, 0xdd, 0x1d, 0x77,
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0x37, 0x7d, 0x70, 0x1c, 0x1c, 0xc7, 0x01, 0x07,
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0x1c, 0x1c, 0x00, 0x1c, 0xc0, 0x01, 0x1c, 0xc0,
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0x01, 0x1c, 0x1d, 0x00, 0x70, 0x70, 0xdc, 0x4d,
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0x37, 0x00, 0x00, 0x1c, 0x00, 0x1c, 0x00, 0x1c,
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0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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}
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},
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{
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0x00E40C49, 0x00FFFF7F, // Samsung 6mask table V0
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{
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0x62, 0xca, 0x74, 0xd0, 0x04, 0x07, 0x00, 0x0d,
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0xd0, 0x00, 0x1c, 0x1c, 0x1c, 0x77, 0x70, 0x00,
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0x00, 0x00, 0x00, 0x4d, 0x43, 0x43, 0x43, 0xd3,
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0x40, 0x03, 0x0d, 0x34, 0x00, 0x0d, 0x00, 0x34,
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0x00, 0x00, 0x34, 0x00, 0x34, 0x00, 0x1c, 0x70,
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0x70, 0x1c, 0x1c, 0x07, 0xc7, 0x71, 0x77, 0x77,
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0xd3, 0x74, 0xd3, 0x01, 0x00, 0x00, 0x40, 0x43,
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0x77, 0x77, 0x77, 0x07, 0xc7, 0xc1, 0x41, 0x43,
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0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x04, 0x00, 0x1d, 0xb0, 0x32, 0x00,
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0x0d, 0x40, 0x1f, 0x70, 0xdc, 0x71, 0xc7, 0x01,
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0x1c, 0x00, 0x07, 0x40, 0x43, 0x03, 0x34, 0x40,
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0x03, 0x0d, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x70,
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0x70, 0x1c, 0xc7, 0x71, 0x1c, 0xc7, 0x71, 0x77,
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0x77, 0xd3, 0x4d, 0x77, 0x07, 0x00, 0x00, 0xd0,
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0x74, 0x77, 0x1c, 0x07, 0x1c, 0x00, 0xd0, 0xdd,
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0x71, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x62, 0xca, 0x74, 0x00, 0xdd, 0x01, 0x00, 0x00,
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0x34, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x34,
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0x40, 0x03, 0x74, 0x37, 0xdd, 0x74, 0x37, 0xdd,
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0x34, 0x4d, 0xd3, 0xd0, 0x40, 0x43, 0x03, 0x0d,
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0xd0, 0x40, 0x03, 0x0d, 0x34, 0x1c, 0xc0, 0x01,
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0x07, 0x1c, 0x1c, 0x1c, 0x1c, 0x77, 0x37, 0xdd,
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0x4d, 0x77, 0x07, 0x00, 0x00, 0x00, 0x40, 0xd3,
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0x34, 0x34, 0xdd, 0x34, 0x4d, 0xd3, 0x34, 0xdd,
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0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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}
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},
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{
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0x00E30C49, 0x00FFFF7F, // Samsung 5mask table V0
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{
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0x22, 0xce, 0x4d, 0x07, 0xd0, 0x74, 0x1c, 0x1c,
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0x1c, 0x1c, 0xd3, 0xdd, 0xdd, 0x34, 0xdd, 0x74,
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0x07, 0x1c, 0x1c, 0x1c, 0x00, 0x0d, 0xd0, 0x00,
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0x34, 0x0d, 0x0d, 0x34, 0xd0, 0x40, 0x03, 0x34,
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0xd0, 0x40, 0x03, 0x34, 0x34, 0x0d, 0x0d, 0x00,
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0x00, 0x07, 0x00, 0x07, 0x00, 0x07, 0xc0, 0x71,
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0x1c, 0x77, 0xc7, 0x1d, 0x00, 0xd0, 0x00, 0x4d,
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0x07, 0x07, 0x1c, 0x00, 0x00, 0x00, 0xd0, 0x1d,
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0xc7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x22, 0xce, 0x4d, 0x07, 0x40, 0x77, 0x07, 0x07,
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0xc7, 0x71, 0x37, 0xdd, 0x74, 0xd3, 0x34, 0x74,
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0xc7, 0xc1, 0x71, 0x07, 0x07, 0x0d, 0x00, 0x40,
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0x03, 0x34, 0x40, 0x03, 0xd0, 0x00, 0x0d, 0x00,
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0x0d, 0xd0, 0x00, 0x34, 0xd0, 0xd0, 0x40, 0x03,
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0x00, 0x07, 0xc0, 0x01, 0x00, 0x1c, 0x00, 0x07,
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0xc7, 0x1d, 0x77, 0xdc, 0x41, 0x43, 0x43, 0xd3,
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0x71, 0x00, 0x1c, 0x00, 0x0d, 0xd0, 0xc4, 0x01,
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0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x22, 0xce, 0x0d, 0x01, 0x40, 0x13, 0x77, 0x70,
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0xc0, 0xc1, 0x1d, 0xc7, 0x71, 0xc7, 0xdd, 0x71,
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0x00, 0x00, 0x07, 0x00, 0x4d, 0xd3, 0xd0, 0x34,
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0x4d, 0x37, 0x4d, 0xd3, 0x34, 0x34, 0x34, 0x4d,
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0x43, 0xd3, 0xd0, 0x74, 0xd3, 0x34, 0x00, 0x00,
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0x00, 0x70, 0x00, 0x00, 0x00, 0x07, 0x70, 0xdc,
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0x1d, 0x77, 0x07, 0x00, 0x00, 0x0d, 0xd0, 0x74,
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0xdc, 0xdd, 0x1d, 0x77, 0xdc, 0x71, 0x1c, 0x77,
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0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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||||
|
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}
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},
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{
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0x00890C49, 0x00FFFF7F, // CMI T1 table V0
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||||
{
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||||
0x62, 0xca, 0x01, 0x74, 0x00, 0xd0, 0xdd, 0x1d,
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0x77, 0x4c, 0x43, 0x03, 0x40, 0xd3, 0xdd, 0xdd,
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0x1d, 0xc7, 0xc1, 0x1d, 0xc7, 0x71, 0x77, 0x77,
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0x77, 0xd3, 0x34, 0x0d, 0x0d, 0x0d, 0x34, 0xd0,
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||||
0x00, 0x34, 0x00, 0x70, 0x70, 0xc7, 0x71, 0xdc,
|
||||
0x1d, 0x77, 0x77, 0x77, 0x43, 0x03, 0xd0, 0x00,
|
||||
0xd0, 0x74, 0x1c, 0x77, 0xdc, 0xc1, 0x01, 0x00,
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||||
0x00, 0x00, 0x00, 0x00, 0x40, 0x03, 0x4d, 0xd3,
|
||||
0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x62, 0xca, 0x01, 0x74, 0x00, 0xd0, 0x74, 0xdc,
|
||||
0x71, 0xd3, 0x34, 0x00, 0xd0, 0xd0, 0xdd, 0xdd,
|
||||
0xdd, 0x1d, 0x1c, 0xc7, 0x1d, 0xc7, 0xdd, 0xdd,
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0xdd, 0x74, 0x43, 0xd3, 0x34, 0x34, 0x34, 0x40,
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||||
0x03, 0x34, 0x00, 0xc0, 0x71, 0x1c, 0xc7, 0x71,
|
||||
0xc7, 0xdd, 0x1d, 0x37, 0x0d, 0x34, 0x40, 0x03,
|
||||
0xd0, 0x74, 0x1c, 0x77, 0x1c, 0x07, 0x00, 0x07,
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||||
0x00, 0x00, 0x00, 0x34, 0x00, 0x40, 0xd3, 0x34,
|
||||
0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x62, 0xca, 0x01, 0x74, 0x00, 0xd0, 0x74, 0xdc,
|
||||
0x71, 0x77, 0xd3, 0xd0, 0xd0, 0x74, 0xdc, 0x1d,
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||||
0x77, 0x70, 0x70, 0x70, 0x1c, 0x1c, 0x77, 0xdc,
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0xdd, 0x4d, 0x37, 0x4d, 0xd3, 0x34, 0x34, 0x0d,
|
||||
0x0d, 0x34, 0x00, 0x70, 0x1c, 0x07, 0xc7, 0x1d,
|
||||
0xc7, 0x1d, 0x77, 0x37, 0x34, 0xd0, 0x00, 0x0d,
|
||||
0x74, 0xc7, 0x71, 0xc7, 0x71, 0x00, 0x07, 0x00,
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||||
0x1c, 0x00, 0x70, 0x00, 0x1c, 0x00, 0xc0, 0x01,
|
||||
0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
|
||||
}
|
||||
},
|
||||
{
|
||||
0x00900C49, 0x00FFFF7F, // CMI T1x table V0
|
||||
{
|
||||
0x26, 0x11, 0x07, 0xd0, 0x1d, 0x00, 0x00, 0xdd,
|
||||
0xdd, 0xc1, 0x01, 0x07, 0x1c, 0x1c, 0xc7, 0xdd,
|
||||
0x34, 0x34, 0xd0, 0x00, 0x0d, 0x34, 0x00, 0x0d,
|
||||
0x00, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00,
|
||||
0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x1c,
|
||||
0x00, 0x00, 0x00, 0x70, 0xc0, 0xc1, 0xc1, 0xc1,
|
||||
0xc1, 0x71, 0x1c, 0x77, 0xdc, 0x71, 0x1c, 0x07,
|
||||
0xc7, 0x71, 0x70, 0x1c, 0x1c, 0x40, 0x1c, 0x70,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x26, 0xd1, 0x1d, 0xd0, 0x74, 0x1c, 0x00, 0x34,
|
||||
0x4d, 0xc7, 0x1d, 0xc7, 0x1d, 0x77, 0x77, 0xd3,
|
||||
0xd0, 0x00, 0x40, 0x03, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x07, 0x70,
|
||||
0xc0, 0x01, 0x00, 0x07, 0x70, 0x00, 0x07, 0xc0,
|
||||
0x01, 0x1c, 0xc0, 0x01, 0x07, 0x1c, 0xc7, 0x71,
|
||||
0x1c, 0x77, 0xdc, 0x1d, 0x77, 0x77, 0x77, 0xc7,
|
||||
0xdd, 0x71, 0x77, 0xdc, 0x71, 0xc7, 0x1d, 0x00,
|
||||
0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x26, 0x41, 0x77, 0x00, 0x74, 0x77, 0x00, 0x00,
|
||||
0x40, 0xd3, 0x4d, 0x77, 0x37, 0xdd, 0x34, 0x0d,
|
||||
0x40, 0x03, 0x00, 0x00, 0x00, 0x1c, 0x00, 0xc0,
|
||||
0x01, 0x70, 0x00, 0x1c, 0x70, 0xc0, 0xc1, 0x71,
|
||||
0x1c, 0xc7, 0xc1, 0xc1, 0x71, 0x1c, 0xc7, 0xc1,
|
||||
0x71, 0x1c, 0x1c, 0x77, 0x1c, 0x77, 0xdc, 0xdd,
|
||||
0x31, 0xdd, 0xdd, 0x4d, 0x37, 0x4d, 0x43, 0xd3,
|
||||
0x34, 0x4d, 0xd3, 0xd0, 0x34, 0x34, 0x34, 0x34,
|
||||
0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_GPIODEF_H
|
||||
#define __TARGET_GPIODEF_H
|
||||
|
||||
/* K93 specific gpio -> pin mappings */
|
||||
|
||||
#include <platform/gpio.h>
|
||||
|
||||
/* define target-specific gpios in a generic fashion here. */
|
||||
#define GPIO_LCD_RST GPIO(17, 7)
|
||||
#define GPIO_LCD_RST_POLARITY (0)
|
||||
#define GPIO_LCD_PWR_EN GPIO(18, 1)
|
||||
|
||||
#define GPIO_RINGER_AB GPIO( 6, 2)
|
||||
|
||||
#define POWER_GPIO_BATTERY_SWI (5)
|
||||
#define POWER_GPIO_BATTERY_SWI_CONFIG_OUTPUT 0x03
|
||||
#define POWER_GPIO_BATTERY_SWI_CONFIG_INPUT 0xD8
|
||||
|
||||
/* Board Revision */
|
||||
#define GPIO_BOARD_REV0 GPIO( 5, 0)
|
||||
#define GPIO_BOARD_REV1 GPIO( 5, 1)
|
||||
#define GPIO_BOARD_REV2 GPIO( 5, 2)
|
||||
|
||||
/* which IICs to initialize */
|
||||
#define IICS_MASK (7)
|
||||
|
||||
/* D1946 watchdog tickle, 'KEEPACT' */
|
||||
#define GPIO_WDOG_TICKLE GPIO(2, 3)
|
||||
|
||||
#endif /* ! __TARGET_GPIODEF_H */
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,414 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2013 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
/* Default K93/K94 SoC Pin Configuration, v1.2 */
|
||||
|
||||
#if PIN_CFG_AP
|
||||
#define HI_DRIVE_STR DRIVE_X3
|
||||
#define GPIO_DRIVE_STR DRIVE_X2
|
||||
#elif PIN_CFG_DEV
|
||||
#define HI_DRIVE_STR DRIVE_X4
|
||||
#define GPIO_DRIVE_STR DRIVE_X2
|
||||
#endif
|
||||
|
||||
#define BB_DRIVE_STR HI_DRIVE_STR
|
||||
#define BT_DRIVE_STR HI_DRIVE_STR
|
||||
#define SWI_DRIVE_STR HI_DRIVE_STR
|
||||
#define GPS_DRIVE_STR HI_DRIVE_STR
|
||||
#define FMI_DRIVE_STR HI_DRIVE_STR
|
||||
#define SPI_DRIVE_STR HI_DRIVE_STR
|
||||
#define SPI_CS_DRIVE_STR GPIO_DRIVE_STR
|
||||
#define I2C_DRIVE_STR HI_DRIVE_STR
|
||||
#define DWI_DRIVE_STR HI_DRIVE_STR
|
||||
#define I2S_DRIVE_STR HI_DRIVE_STR
|
||||
#define SDIO_DRIVE_STR HI_DRIVE_STR
|
||||
#define CAM_DRIVE_STR HI_DRIVE_STR
|
||||
#define UART_DRIVE_STR HI_DRIVE_STR
|
||||
|
||||
#if PIN_CFG_AP
|
||||
static const u_int32_t gpio_default_cfg_ap[GPIO_GROUP_COUNT * GPIOPADPINS] = {
|
||||
#elif PIN_CFG_DEV
|
||||
static const u_int32_t gpio_default_cfg_dev[GPIO_GROUP_COUNT * GPIOPADPINS] = {
|
||||
#endif
|
||||
/* Port 0 */
|
||||
CFG_IN, // GPIO0 -> MENU_KEY (REQUEST_DFU2)
|
||||
CFG_IN, // GPIO1 -> HOLD_KEY (REQUEST_DFU1)
|
||||
CFG_DISABLED, // GPIO2 ->
|
||||
CFG_DISABLED, // GPIO3 ->
|
||||
CFG_DISABLED, // GPIO4 ->
|
||||
CFG_DISABLED, // GPIO5 ->
|
||||
CFG_DISABLED, // GPIO6 ->
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO7 -> PM_BT_WAKE
|
||||
|
||||
/* Port 1 */
|
||||
CFG_DISABLED, // GPIO8 ->
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // GPIO9 ->
|
||||
CFG_DISABLED, // GPIO10 ->
|
||||
CFG_DISABLED, // GPIO11 ->
|
||||
CFG_DISABLED, // GPIO12 ->
|
||||
#else
|
||||
#if SUB_TARGET_K94
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO9 -> PM_RADIO_ON
|
||||
#else
|
||||
CFG_IN, // GPIO9 -> PM_RADIO_ON
|
||||
#endif
|
||||
CFG_DISABLED, // GPIO10 ->
|
||||
CFG_IN, // GPIO11 -> RST_DET_L
|
||||
CFG_IN, // GPIO12 -> SPI_IPC_SRDY
|
||||
#endif
|
||||
CFG_IN | PULL_UP, // GPIO13 -> IRQ_PMU_L
|
||||
CFG_DISABLED, // GPIO14 ->
|
||||
CFG_IN | PULL_UP, // GPIO15 -> IRQ_CODEC_L
|
||||
|
||||
/* Port 2 */
|
||||
CFG_DISABLED, // GPIO16 -> BOARD_ID[3]
|
||||
CFG_IN | PULL_DOWN, // GPIO17 -> IRQ_GYRO_INT2
|
||||
CFG_DISABLED, // GPIO18 -> BOOT_CONFIG[0]
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO19 -> PM_KEEPACT
|
||||
CFG_DISABLED, // GPIO20 ->
|
||||
CFG_IN | PULL_UP, // GPIO21 -> IRQ_GRAPE_HOST_INT_L
|
||||
CFG_DISABLED, // GPIO22 ->
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // GPIO23 ->
|
||||
#else
|
||||
CFG_IN, // GPIO23 -> GPS_SYNC
|
||||
#endif
|
||||
|
||||
/* Port 3 */
|
||||
CFG_DISABLED, // GPIO24 -> GSM_TXBURST_IND
|
||||
CFG_DISABLED, // GPIO25 -> BOOT_CONFIG[1]
|
||||
CFG_IN, // GPIO26 -> FORCE_DFU
|
||||
CFG_OUT_0, // GPIO27 -> DFU_STATUS
|
||||
CFG_DISABLED, // GPIO28 -> BOOT_CONFIG[2]
|
||||
CFG_DISABLED, // GPIO29 -> BOOT_CONFIG[3]
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // GPIO30 ->
|
||||
CFG_DISABLED, // GPIO31 ->
|
||||
#else
|
||||
CFG_OUT_1 | GPIO_DRIVE_STR, // GPIO30 -> RST_GPS_L
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO31 -> PM_GPS_STANDBY
|
||||
#endif
|
||||
|
||||
/* Port 4 */
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // GPIO32 ->
|
||||
#else
|
||||
CFG_IN, // GPIO32 -> IRQ_PROX_INT_L
|
||||
#endif
|
||||
CFG_IN | PULL_DOWN, // GPIO33 -> IRQ_GYRO_INT1
|
||||
CFG_DISABLED, // GPIO34 -> IRQ_GPS_INT_L
|
||||
CFG_DISABLED, // GPIO35 ->
|
||||
CFG_IN | PULL_UP, // GPIO36 -> IRQ_ACCEL_INT1_L
|
||||
CFG_IN | PULL_UP, // GPIO37 -> IRQ_ALS_INT_L
|
||||
CFG_IN | PULL_UP, // GPIO38 -> IRQ_ACCEL_INT2_L
|
||||
CFG_OUT_0, // GPIO39 -> AUD_SPKRAMP_MUTE_L
|
||||
|
||||
/* Port 5 */
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[0] -> BOARD_REV0
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[1] -> BOARD_REV1
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[2] -> BOARD_REV2
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // UART1_TXD ->
|
||||
CFG_DISABLED, // UART1_RXD ->
|
||||
CFG_DISABLED, // UART1_RTSN ->
|
||||
CFG_DISABLED, // UART1_CTSN ->
|
||||
CFG_DISABLED, // UART2_TXD ->
|
||||
#else
|
||||
#if SUB_TARGET_K94
|
||||
CFG_FUNC0 | BB_DRIVE_STR, // UART1_TXD -> UART_AP_1_TXD (BB USART)
|
||||
// <rdar://problem/11526274> Add pullup to BB UART RX pin to work around glitch during baseband updates (Sundance)
|
||||
CFG_FUNC0 | PULL_UP, // UART1_RXD -> UART_AP_1_RXD
|
||||
#else
|
||||
CFG_OUT_0 | BB_DRIVE_STR, // UART1_TXD -> UART_AP_1_TXD (BB USART)
|
||||
CFG_FUNC0, // UART1_RXD -> UART_AP_1_RXD
|
||||
#endif
|
||||
CFG_FUNC0 | BB_DRIVE_STR, // UART1_RTSN -> UART_AP_1_RTS_L
|
||||
CFG_FUNC0, // UART1_CTSN -> UART_AP_1_CTS_L
|
||||
CFG_FUNC0 | BB_DRIVE_STR, // UART2_TXD -> UART_AP_2_TXD (BB UMTS)
|
||||
#endif
|
||||
|
||||
/* Port 6 */
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // UART2_RXD ->
|
||||
CFG_DISABLED, // UART2_RTSN ->
|
||||
#else
|
||||
CFG_FUNC0, // UART2_RXD -> UART_AP_2_RXD
|
||||
#if SUB_TARGET_K94
|
||||
CFG_OUT_1 | GPIO_DRIVE_STR, // UART2_RTSN -> RST_BB_L
|
||||
#else
|
||||
CFG_IN, // UART2_RTSN -> RST_BB_L
|
||||
#endif
|
||||
#endif
|
||||
CFG_IN, // UART2_CTSN -> SRL_L
|
||||
CFG_FUNC0 | BT_DRIVE_STR, // UART3_TXD -> UART_AP_3_TXD (BT)
|
||||
CFG_FUNC0, // UART3_RXD -> UART_AP_3_RXD
|
||||
CFG_OUT_1 | BT_DRIVE_STR, // UART3_RTSN -> UART_AP_3_RTS_L
|
||||
CFG_FUNC0, // UART3_CTSN -> UART_AP_3_CTS_L
|
||||
CFG_FUNC0 | SWI_DRIVE_STR, // UART5_RTXD -> BATTERY_SWI
|
||||
|
||||
/* Port 7 */
|
||||
CFG_DISABLED, // UART6_TXD ->
|
||||
CFG_IN | PULL_UP, // UART6_RXD -> AUD_VOL_UP_L
|
||||
#if SUB_TARGET_K95
|
||||
CFG_OUT_0, // UART6_RTSN -> IPC_GPIO
|
||||
#else
|
||||
CFG_DISABLED, // UART6_RTSN ->
|
||||
#endif
|
||||
CFG_IN | PULL_UP, // UART6_CTSN -> AUD_VOL_DOWN_L
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // UART4_TXD -> UART_AP_4_TXD (GPS)
|
||||
CFG_DISABLED, // UART4_RXD -> UART_AP_4_RXD
|
||||
CFG_DISABLED, // UART4_RTSN -> UART_AP_4_RTS_L
|
||||
CFG_DISABLED, // UART4_CTSN -> UART_AP_4_CTS_L
|
||||
#else
|
||||
CFG_FUNC0 | GPS_DRIVE_STR, // UART4_TXD -> UART_AP_4_TXD (GPS)
|
||||
CFG_FUNC0, // UART4_RXD -> UART_AP_4_RXD
|
||||
CFG_FUNC0 | GPS_DRIVE_STR, // UART4_RTSN -> UART_AP_4_RTS_L
|
||||
CFG_FUNC0, // UART4_CTSN -> UART_AP_4_CTS_L
|
||||
#endif
|
||||
|
||||
/* Port 8 */
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN3 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN2 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN1 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN0 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CLE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_ALE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_REN ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_WEN ->
|
||||
|
||||
/* Port 9 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO7 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO6 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO5 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO4 ->
|
||||
CFG_DISABLED, // FMI0_DQS ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO3 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO2 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO1 ->
|
||||
|
||||
/* Port 10 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO0 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN3 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN2 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN1 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN0 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CLE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_ALE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_REN ->
|
||||
|
||||
/* Port 11 */
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_WEN ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO7 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO6 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO5 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO4 ->
|
||||
CFG_DISABLED, // FMI1_DQS ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO3 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO2 ->
|
||||
|
||||
/* Port 12 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO1 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO0 ->
|
||||
CFG_DISABLED, // FMI2_CEN3 ->
|
||||
CFG_DISABLED, // FMI2_CEN2 ->
|
||||
CFG_DISABLED, // FMI2_CEN1 ->
|
||||
CFG_DISABLED, // FMI2_CEN0 ->
|
||||
CFG_DISABLED, // FMI2_CLE ->
|
||||
CFG_DISABLED, // FMI2_ALE ->
|
||||
|
||||
/* Port 13 */
|
||||
CFG_DISABLED, // FMI2_REN ->
|
||||
CFG_DISABLED, // FMI2_WEN ->
|
||||
CFG_DISABLED, // FMI2_IO7 ->
|
||||
CFG_DISABLED, // FMI2_IO6 ->
|
||||
CFG_DISABLED, // FMI2_IO5 ->
|
||||
CFG_DISABLED, // FMI2_IO4 ->
|
||||
CFG_DISABLED, // FMI2_DQS ->
|
||||
CFG_DISABLED, // FMI2_IO3 ->
|
||||
|
||||
/* Port 14 */
|
||||
CFG_DISABLED, // FMI2_IO2 ->
|
||||
CFG_DISABLED, // FMI2_IO1 ->
|
||||
CFG_DISABLED, // FMI2_IO0 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN7 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN6 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN5 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN4 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN7 ->
|
||||
|
||||
/* Port 15 */
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN6 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN5 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN4 ->
|
||||
CFG_DISABLED, // FMI3_CEN3 ->
|
||||
CFG_DISABLED, // FMI3_CEN2 ->
|
||||
CFG_DISABLED, // FMI3_CEN1 ->
|
||||
CFG_DISABLED, // FMI3_CEN0 ->
|
||||
CFG_DISABLED, // FMI3_CLE ->
|
||||
|
||||
/* Port 16 */
|
||||
CFG_DISABLED, // FMI3_ALE ->
|
||||
CFG_DISABLED, // FMI3_REN ->
|
||||
CFG_DISABLED, // FMI3_WEN ->
|
||||
CFG_DISABLED, // FMI3_IO7 ->
|
||||
CFG_DISABLED, // FMI3_IO6 ->
|
||||
CFG_DISABLED, // FMI3_IO5 ->
|
||||
CFG_DISABLED, // FMI3_IO4 ->
|
||||
CFG_DISABLED, // FMI3_DQS ->
|
||||
|
||||
/* Port 17 */
|
||||
CFG_DISABLED, // FMI3_IO3 ->
|
||||
CFG_DISABLED, // FMI3_IO2 ->
|
||||
CFG_DISABLED, // FMI3_IO1 ->
|
||||
CFG_DISABLED, // FMI3_IO0 ->
|
||||
CFG_OUT_1 | GPIO_DRIVE_STR, // FMI2_CEN7 -> GRAPE_FW_DNLD_EN_L
|
||||
CFG_DISABLED, // FMI2_CEN6 -> RST_GRAPE_L
|
||||
CFG_DISABLED, // FMI2_CEN5 ->
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // FMI2_CEN4 -> RST_MLC_L
|
||||
|
||||
/* Port 18 */
|
||||
CFG_DISABLED, // FMI3_CEN7 ->
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // FMI3_CEN6 -> PM_MLC_PWR_EN
|
||||
CFG_OUT_0, // FMI3_CEN5 -> SD_RESET_L
|
||||
CFG_DISABLED, // FMI3_CEN4 ->
|
||||
CFG_DISABLED, // SPI3_MOSI ->
|
||||
CFG_DISABLED, // SPI3_MISO ->
|
||||
CFG_DISABLED, // SPI3_SCLK ->
|
||||
CFG_DISABLED, // SPI3_SSIN ->
|
||||
|
||||
/* Port 19 */
|
||||
CFG_FUNC0, // ISP0_PRE_FLASH ->
|
||||
CFG_FUNC0, // ISP0_FLASH ->
|
||||
CFG_FUNC0, // ISP1_PRE_FLASH ->
|
||||
CFG_FUNC0, // ISP1_FLASH ->
|
||||
CFG_FUNC0 | SPI_DRIVE_STR, // SPI1_SCLK -> SPI_GRAPE_SCLK
|
||||
CFG_FUNC0 | SPI_DRIVE_STR, // SPI1_MOSI -> SPI_GRAPE_MOSI
|
||||
CFG_FUNC0, // SPI1_MISO -> SPI_GRAPE_MISO
|
||||
CFG_OUT_1 | SPI_CS_DRIVE_STR, // SPI1_SSIN -> SPI_GRAPE_CS_L
|
||||
|
||||
/* Port 20 */
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C2_SDA -> I2C2_SDA_3V0
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C2_SCL -> I2C2_SCL_3V0
|
||||
CFG_DISABLED, // SPI0_SCLK -> SPI0_SCLK/BOARD_ID[0]
|
||||
CFG_DISABLED, // SPI0_MOSI -> SPI0_MOSI/BOARD_ID[1]
|
||||
CFG_DISABLED, // SPI0_MISO -> SPI0_MISO/BOARD_ID[2]
|
||||
CFG_DISABLED, // SPI0_SSIN -> SPI0_SSIN
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // SPI2_SCLK ->
|
||||
CFG_DISABLED, // SPI2_MOSI ->
|
||||
#else
|
||||
CFG_FUNC0 | SPI_DRIVE_STR, // SPI2_SCLK -> SPI_IPC_SCLK
|
||||
CFG_FUNC0 | SPI_DRIVE_STR, // SPI2_MOSI -> SPI_IPC_MOSI
|
||||
#endif
|
||||
|
||||
/* Port 21 */
|
||||
#if SUB_TARGET_K93
|
||||
CFG_DISABLED, // SPI2_MISO ->
|
||||
CFG_DISABLED, // SPI2_SSIN ->
|
||||
#else
|
||||
CFG_FUNC0, // SPI2_MISO -> SPI_IPC_MISO
|
||||
CFG_OUT_0 | SPI_CS_DRIVE_STR, // SPI2_SSIN -> SPI_IPC_MRDY
|
||||
#endif
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SDA -> I2C0_SDA_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SCL -> I2C0_SCL_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SDA -> I2C1_SDA_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SCL -> I2C1_SCL_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // ISP0_SDA -> ISP_AP_0_SDA
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // ISP0_SCL -> ISP_AP_0_SCL
|
||||
|
||||
/* Port 22 */
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // ISP1_SDA -> ISP_AP_1_SDA
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // ISP1_SCL -> ISP_AP_1_SCL
|
||||
CFG_FUNC0 | SDIO_DRIVE_STR, // SDIO_CLK ->
|
||||
CFG_FUNC0 | PULL_UP | SDIO_DRIVE_STR, // SDIO_CMD ->
|
||||
CFG_FUNC0 | PULL_UP | SDIO_DRIVE_STR, // SDIO_DATA0 ->
|
||||
CFG_FUNC0 | PULL_UP | SDIO_DRIVE_STR, // SDIO_DATA1 ->
|
||||
CFG_FUNC0 | PULL_UP | SDIO_DRIVE_STR, // SDIO_DATA2 ->
|
||||
CFG_FUNC0 | PULL_UP | SDIO_DRIVE_STR, // SDIO_DATA3 ->
|
||||
|
||||
/* Port 23 */
|
||||
CFG_DISABLED, // MIPI_VSYNC ->
|
||||
CFG_DISABLED, // TMR32_PWM0 ->
|
||||
CFG_DISABLED, // TMR32_PWM1 ->
|
||||
CFG_DISABLED, // TMR32_PWM2 ->
|
||||
CFG_DISABLED, // SWI_DATA ->
|
||||
CFG_FUNC0 | PULL_DOWN, // DWI_DI ->
|
||||
CFG_FUNC0 | DWI_DRIVE_STR, // DWI_DO ->
|
||||
CFG_FUNC0 | DWI_DRIVE_STR, // DWI_CLK ->
|
||||
|
||||
/* Port 24 */
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // SENSOR0_RST -> PM_REAR_CAM_SHUTDOWN
|
||||
CFG_OUT_0 | CAM_DRIVE_STR, // SENSOR0_CLK -> CLK_CAM_RF
|
||||
CFG_OUT_1 | GPIO_DRIVE_STR, // SENSOR1_RST -> PM_FRONT_CAM_SHUTDOWN
|
||||
CFG_OUT_0 | CAM_DRIVE_STR, // SENSOR1_CLK -> CLK_CAM_FF
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_MCK -> I2S_AP_0_MCL (codec ASP)
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_LRCK -> I2S_AP_0_LRCK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_BCLK -> I2S_AP_0_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_DOUT -> I2S_AP_0_DOUT
|
||||
|
||||
/* Port 25 */
|
||||
CFG_FUNC0, // I2S0_DIN -> I2S_AP_0_DIN
|
||||
CFG_DISABLED, // I2S1_MCK ->
|
||||
CFG_DISABLED, // I2S1_LRCK ->
|
||||
CFG_DISABLED, // I2S1_BCLK ->
|
||||
CFG_DISABLED, // I2S1_DOUT ->
|
||||
CFG_DISABLED, // I2S1_DIN ->
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_MCK -> I2S_AP_2_MCK (codec VSP)
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_LRCK -> I2S_AP_2_LRCK
|
||||
|
||||
/* Port 26 */
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_BCLK -> I2S_AP_2_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_DOUT -> I2S_AP_2_DOUT
|
||||
CFG_FUNC0, // I2S2_DIN -> I2S_AP_2_DIN
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_MCK -> I2S_AP_3_MCK (codec XSP)
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_LRCK -> I2S_AP_3_LRCK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_BCLK -> I2S_AP_3_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_DOUT -> I2S_AP_3_DOUT
|
||||
CFG_FUNC0, // I2S3_DIN -> I2S_AP_3_DIN
|
||||
|
||||
/* Port 27 */
|
||||
CFG_DISABLED, // SPDIF ->
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO217 -> PORT_DOCK_VIDEO_AMP_EN
|
||||
CFG_DISABLED, // GPIO218 ->
|
||||
CFG_FUNC0, // DP_HPD -> DP_AP_HPD
|
||||
CFG_FUNC0 | UART_DRIVE_STR, // UART0_TXD -> UART_AP_0_TXD
|
||||
CFG_FUNC0, // UART0_RXD -> UART_AP_0_RXD
|
||||
CFG_DISABLED, // TST_CLKOUT ->
|
||||
CFG_DISABLED, // TST_STPCLK ->
|
||||
|
||||
/* Port 28 */
|
||||
CFG_FUNC0, // WDOG -> AP_WDOG
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
};
|
||||
|
||||
#undef BB_DRIVE_STR
|
||||
#undef BT_DRIVE_STR
|
||||
#undef SWI_DRIVE_STR
|
||||
#undef GPS_DRIVE_STR
|
||||
#undef FMI_DRIVE_STR
|
||||
#undef SPI_DRIVE_STR
|
||||
#undef SPI_CS_DRIVE_STR
|
||||
#undef I2C_DRIVE_STR
|
||||
#undef DWI_DRIVE_STR
|
||||
#undef I2S_DRIVE_STR
|
||||
#undef SDIO_DRIVE_STR
|
||||
#undef CAM_DRIVE_STR
|
||||
#undef UART_DRIVE_STR
|
||||
#undef HI_DRIVE_STR
|
||||
#undef GPIO_DRIVE_STR
|
||||
@@ -0,0 +1,183 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
#include <drivers/gasgauge.h>
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define PMU_IIC_BUS 0
|
||||
|
||||
/* this configuration is very PMU specific and must be included exactly once in power.c */
|
||||
#ifdef POWERCONFIG_PMU_SETUP
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // Force bypass off
|
||||
{ PMU_IIC_BUS, kD1946_LDO1, 0x0A }, // PP3V0_GRAPE 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO2, 0x0A }, // PP1V7_VA_VCP 1.70V
|
||||
{ PMU_IIC_BUS, kD1946_LDO3, 0x0A }, // PP3V0_VIDEO 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO4, 0x18 }, // PP3V0_OPTICAL 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO5, 0x0E }, // PP3V2_SD 3.20V
|
||||
{ PMU_IIC_BUS, kD1946_LDO6, 0x10 }, // PP3V3_ACC 3.30V
|
||||
{ PMU_IIC_BUS, kD1946_LDO7, 0x0F }, // PP3V0_VIDEO_BUF 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO8, 0x18 }, // PP3V2_S2R_USBMUX 3.20V
|
||||
{ PMU_IIC_BUS, kD1946_LDO9, 0x12 }, // PP3V0_IO 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO10, 0x0A }, // PP3V2_SD_CTRL 3.00V
|
||||
{ PMU_IIC_BUS, kD1946_LDO11, 0x17 }, // PP2V85_CAM 2.85V
|
||||
{ PMU_IIC_BUS, kD1946_LDO12, 0x14 }, // PP1V1 1.10V
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // Leave bypass off
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1946_ACTIVE1, 0xDD }, // Everything but BUCK1 and LDO1
|
||||
{ PMU_IIC_BUS, kD1946_ACTIVE2, 0xF9 }, // Everything but SD and ACC
|
||||
{ PMU_IIC_BUS, kD1946_ACTIVE3, 0x61 }, // BUCK5, VBOOST_LCM, PP1V1
|
||||
{ PMU_IIC_BUS, kD1946_ACTIVE4, 0xA0 }, // CPU1V8_SW and CPU1V2_SW
|
||||
{ PMU_IIC_BUS, kD1946_LCM_CONTROL1, 0x02 }, // unused 5.10V
|
||||
{ PMU_IIC_BUS, kD1946_LCM_CONTROL2, 0x0E }, // unused 5.70V
|
||||
{ PMU_IIC_BUS, kD1946_LCM_CONTROL3, 0x00 }, // BB_VBUS_DET 5.00V
|
||||
{ PMU_IIC_BUS, kD1946_LCM_BST_CONTROL, 0x14 }, // VBOOST_LCM 6.00V
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_warm_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_SYS_CONTROL2, 0x10 }, // HIB_32K on, DWI off
|
||||
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_A, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_B, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_C, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_D, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_E, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_F, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_G, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_H, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_K, 0x00 },
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_cold_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1946_BUCK4, 0x9B }, // BUCK4 1.21V
|
||||
{ PMU_IIC_BUS, kD1946_BUCK4_HIB, 0x9B }, // BUCK4_HIB 1.21V
|
||||
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_1, 0x11 }, // CLK_32K_PMU Out 0, Push-Pull, CPU_1V8
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_2, 0x49 }, // CLK_32K_WLAN CLK32K, Pull Down, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_3, 0x09 }, // RST_BT_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_4, 0x09 }, // RST_WLAN_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_5, 0x09 }, // RST_BB_PMU_L Out 0, Push-pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_6, 0xDA }, // BATTERY_SWI In, F Edge, Wake, Pull Up, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_7, 0xBB }, // PM_BT_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_8, 0xBB }, // PM_WLAN_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_9, 0xBB }, // PM_BB_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_10, 0xEA }, // AUD_MIK_HS1_INT_L In, Change, Wake, Pull Up, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_11, 0x09 }, // DOCK_BB_EN Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_12, 0x49 }, // CLK_32K_GPS CLK32K, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_13, 0xB9 }, // SD_CON_CD In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_14, 0xC8 }, // RST_L63_L In, F Edge, No Wake, Pull Up, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_15, 0xFA }, // HALL_IRQ In, E Edge, Wake, Pull Up, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_16, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_17, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_18, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB1, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB2, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB3, 0x02 }, // no debounce on GPIO6
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB4, 0x10 }, // no debounce on GPIO7
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB5, 0x02 }, // no debounce on GPIO10
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB6, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB7, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB8, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1946_SYS_GPIO_DEB9, 0x12 }, // 10ms debounce
|
||||
|
||||
// <rdar://problem/8932682>
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x02 },
|
||||
{ PMU_IIC_BUS, kD1946_TEST_MODE, 0x01 }, // Enable test mode
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x01 },
|
||||
{ PMU_IIC_BUS, kD1946_WLED_CONTROL5, 0x00 }, // set WLED to IDAC always
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x02 },
|
||||
{ PMU_IIC_BUS, kD1946_TEST_MODE, 0x00 }, // Disable test mode
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x00 },
|
||||
|
||||
// <rdar://problem/8784560>
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x01 }, // Select Bank 1
|
||||
{ PMU_IIC_BUS, kD1946_BUCK_CONTROL1, 0x0e }, // Force Buck0 into PWM Mode
|
||||
{ PMU_IIC_BUS, kD1946_BUCK_CONTROL3, 0x0e }, // Force Buck2 into PWM Mode
|
||||
{ PMU_IIC_BUS, kDIALOG_BANKSEL, 0x00 }, // Select Bank 0
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_enable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET, 0xD4 }, // 50% value from OS
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET2, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, // enable all LED strings
|
||||
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL2, // enable LED Power
|
||||
(kDIALOG_WLED_CONTROL2_WLED_RAMP_EN |
|
||||
kDIALOG_WLED_CONTROL2_WLED_DITH_EN) }
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_disable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, 0x0 } // disable LED power
|
||||
};
|
||||
|
||||
static const struct core_rails_struct soc_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK2 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct cpu_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK0 }
|
||||
};
|
||||
|
||||
#endif /* POWERCONFIG_PMU_SETUP */
|
||||
|
||||
#define TARGET_USE_CHARGE_TABLE 1
|
||||
static const struct power_charge_limits pmu_charge_table[16] = { // gas gauge can have up to 16 entries
|
||||
{ 4000, 1000, 1600, 3000 }, // 10 - 16C 0.44C
|
||||
{ 4100, 1000, 1600, 1375 }, // 0.2C
|
||||
{ USHRT_MAX, 1000, 1600, 750 }, // 0.11C
|
||||
{ 4000, 1500, 2100, 3000 }, // 15 - 21C 0.44C
|
||||
{ 4100, 1500, 2100, 2000 }, // 0.29C
|
||||
{ USHRT_MAX, 1500, 2100, 1375 }, // 0.2C
|
||||
{ 4000, 2000, 3500, 3000 }, // 20 - 35C 0.44C
|
||||
{ 4100, 2000, 3500, 3000 }, // 0.44C
|
||||
{ USHRT_MAX, 2000, 3500, 2000 }, // 0.29C
|
||||
{ 4000, 3400, 4500, 3000 }, // 34 - 45C 0.44C
|
||||
{ 4100, 3400, 4500, 3000 }, // 0.44C
|
||||
{ USHRT_MAX, 3400, 4500, 3000 }, // 0.44C
|
||||
};
|
||||
|
||||
// matches OTP for ICHG_TBAT_x
|
||||
#define TARGET_ICHG_TBAT_MAX { 0x00, 0x00, 0x3f, 0x3f, 0x3f }
|
||||
|
||||
#define NO_BATTERY_VOLTAGE 2700
|
||||
#define MIN_BOOT_BATTERY_VOLTAGE 3600
|
||||
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
|
||||
#define TARGET_BOOT_BATTERY_CAPACITY 50
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 1287 /* 10% brightness */
|
||||
#define TARGET_PRECHARGE_ALWAYS_DISPLAY_IDLE 1
|
||||
#define TARGET_MAX_USB_INPUT_CURRENT 2100
|
||||
|
||||
#define GASGAUGE_BATTERYID_BLOCK 1
|
||||
#define GASGAUGE_CHARGETABLE_BLOCK 3
|
||||
static const unsigned int atv_voltage_limit[16] = { 3600, 3650, 3700, 3750, 3800, 3850, 3900, 3950, 4000, 4050, 4100, 4150, 4200, 4250, 4300, 4350 };
|
||||
static const unsigned int atv_current_limit[16] = { 0, 0, 625, 750, 875, 1000, 1125, 1250, 1375, 1500, 1750, 2000, 2250, 2500, 2750, 3000 };
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2009 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_RADIOCONFIG_H
|
||||
#define __TARGET_RADIOCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define RADIO_VERIFY_BASEBAND_EXISTS 1
|
||||
|
||||
static const gpio_t target_radio_quiesce_pins[] =
|
||||
{
|
||||
GPIO_UART1_TXD
|
||||
};
|
||||
|
||||
#define RADIO_ENABLE_IMEI_OVERRIDE 0
|
||||
|
||||
#endif /* ! __TARGET_RADIOCONFIG_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define two debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (0)
|
||||
|
||||
/* define radio serial port */
|
||||
#define RADIO_SERIAL_PORT (1)
|
||||
#define RADIO_MAX_READ_ERRORS (10)
|
||||
|
||||
/* define HDQ serial port */
|
||||
#define HDQGAUGE_SERIAL_PORT (5)
|
||||
|
||||
#define UART_FLOWCONTROL_MASK (0x08)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,299 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <drivers/display.h>
|
||||
#include <drivers/flash_nor.h>
|
||||
#include <drivers/iic.h>
|
||||
#include <drivers/power.h>
|
||||
#include <lib/devicetree.h>
|
||||
#include <lib/env.h>
|
||||
#include <lib/mib.h>
|
||||
#include <lib/syscfg.h>
|
||||
#include <platform.h>
|
||||
#include <platform/gpio.h>
|
||||
#include <platform/gpiodef.h>
|
||||
#include <platform/memmap.h>
|
||||
#include <sys.h>
|
||||
#include <sys/boot.h>
|
||||
#include <sys/menu.h>
|
||||
#include <sys/task.h>
|
||||
#include <target.h>
|
||||
#include <target/powerconfig.h>
|
||||
#include <target/display_gamma_tables.h>
|
||||
|
||||
#define K93_PROTO1_BOARD (0) // And DEV1
|
||||
#define K93_PROTO2_BOARD (1)
|
||||
#define K93_EVT_BOARD (2) // And DEV3
|
||||
#define K93_EVT2_BOARD (3)
|
||||
#define K93_DVT_BOARD (4)
|
||||
|
||||
static u_int32_t k93_get_board_rev(void);
|
||||
static uint32_t display_config;
|
||||
|
||||
MIB_CONSTANT_PTR(kMIBTargetDisplayGammaTablePtr,kOIDTypeStruct, (void *)ipad2_display_gamma_tables);
|
||||
MIB_CONSTANT(kMIBTargetDisplayGammaTableCount, kOIDTypeUInt32, ARRAY_SIZE(ipad2_display_gamma_tables));
|
||||
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 1);
|
||||
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 90);
|
||||
|
||||
|
||||
void target_early_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_late_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_init(void)
|
||||
{
|
||||
#if WITH_HW_FLASH_NOR
|
||||
flash_nor_init(SPI_NOR0);
|
||||
#endif
|
||||
}
|
||||
|
||||
void target_quiesce_hardware(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_poweroff(void)
|
||||
{
|
||||
}
|
||||
|
||||
int target_bootprep(enum boot_target target)
|
||||
{
|
||||
switch (target) {
|
||||
case BOOT_DARWIN:
|
||||
case BOOT_DARWIN_RESTORE:
|
||||
case BOOT_DIAGS:
|
||||
break;
|
||||
|
||||
default:
|
||||
; // do nothing
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool target_should_recover(void)
|
||||
{
|
||||
return platform_get_request_dfu2() && power_has_usb();
|
||||
}
|
||||
|
||||
bool target_should_poweron(bool *cold_button_boot)
|
||||
{
|
||||
#if WITH_HW_POWER
|
||||
if (power_get_boot_flag() == kPowerBootFlagColdButton) *cold_button_boot = true;
|
||||
#else
|
||||
*cold_button_boot = false;
|
||||
#endif
|
||||
|
||||
return !*cold_button_boot || platform_get_request_dfu1();
|
||||
}
|
||||
|
||||
bool target_should_poweroff(bool at_boot)
|
||||
{
|
||||
return platform_get_request_dfu1() && (!at_boot || !power_has_usb());
|
||||
}
|
||||
|
||||
#if APPLICATION_IBOOT
|
||||
void target_watchdog_tickle(void)
|
||||
{
|
||||
u_int32_t value = gpio_read(GPIO_WDOG_TICKLE);
|
||||
gpio_write(GPIO_WDOG_TICKLE, value ^ 1);
|
||||
}
|
||||
#endif // APPLICATION_IBOOT
|
||||
|
||||
void * target_get_display_configuration(void)
|
||||
{
|
||||
display_config = 0x00000644;
|
||||
return ((void *)(&display_config));
|
||||
}
|
||||
|
||||
#if WITH_ENV
|
||||
|
||||
void target_setup_default_environment(void)
|
||||
{
|
||||
env_set("boot-device", "nand0", 0);
|
||||
env_set("display-color-space","RGB888", 0);
|
||||
env_set("display-timing", "k48", 0);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
int target_update_device_tree(void)
|
||||
{
|
||||
DTNode *node, *clcd_node, *backlight_node;
|
||||
uint32_t propSize, propCnt;
|
||||
char *propName;
|
||||
void *propData;
|
||||
|
||||
// Update the DWI node with the actual voltages
|
||||
if (FindNode(0, "arm-io/dwi", &node)) {
|
||||
propName = "voltages-buck0";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propCnt = propSize / sizeof(u_int32_t);
|
||||
platform_get_cpu_voltages(propCnt, propData);
|
||||
platform_convert_voltages(0, propCnt, propData);
|
||||
}
|
||||
propName = "voltages-buck2";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propCnt = propSize / sizeof(u_int32_t);
|
||||
platform_get_soc_voltages(propCnt, propData);
|
||||
platform_convert_voltages(2, propCnt, propData);
|
||||
}
|
||||
}
|
||||
|
||||
// Find the CLCD node
|
||||
FindNode(0, "arm-io/clcd", &clcd_node);
|
||||
|
||||
#if WITH_HW_DISPLAY_PINOT
|
||||
if (FindNode(0, "arm-io/mipi-dsim/lcd", &node)) {
|
||||
extern int pinot_update_device_tree(DTNode *pinot_node, DTNode *clcd_node, DTNode *backlight_node);
|
||||
|
||||
FindNode(0, "backlight", &backlight_node);
|
||||
pinot_update_device_tree(node, clcd_node, backlight_node);
|
||||
}
|
||||
#endif
|
||||
|
||||
// Update the bottom prox calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/prox", &node)) {
|
||||
propName = "prox-bottom-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('PBCl', propData, propSize);
|
||||
}
|
||||
propName = "prox-temp-base";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('PBTb', propData, propSize);
|
||||
}
|
||||
propName = "prox-centerpoint-base";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('PBCb', propData, propSize);
|
||||
}
|
||||
propName = "prox-calibration-blob";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update als node with calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/als", &node)) {
|
||||
propName = "backlight-leakage-channel0";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ALC0', propData, propSize);
|
||||
}
|
||||
propName = "backlight-leakage-channel1";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ALC1', propData, propSize);
|
||||
}
|
||||
propName = "alsCalibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AlsC', propData, propSize);
|
||||
}
|
||||
propName = "als-colorCfg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ClrC', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the gyro calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/gyro", &node)) {
|
||||
propName = "low-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTGO', propData, propSize);
|
||||
}
|
||||
propName = "high-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('HTGO', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCl', propData, propSize);
|
||||
}
|
||||
propName = "gyro-temp-table";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GYTT', propData, propSize);
|
||||
}
|
||||
propName = "gyro-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update accelerometer calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/accelerometer", &node)) {
|
||||
propName = "low-temp-accel-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTAO', propData, propSize);
|
||||
}
|
||||
propName = "accel-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ASCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update camera calibration data
|
||||
if (FindNode(0, "arm-io/isp", &node)) {
|
||||
propName = "camera-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CmCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update USB input current limit
|
||||
if (FindNode(0, "charger", &node)) {
|
||||
propName = "usb-input-limit-max";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
*(uint32_t *)propData = TARGET_MAX_USB_INPUT_CURRENT;
|
||||
}
|
||||
}
|
||||
|
||||
// K94 EVT does not support Charleston slow-ramp
|
||||
if (k93_get_board_rev() < K93_DVT_BOARD) {
|
||||
if (FindNode(0, "arm-io/i2c0/headset-switch", &node)) {
|
||||
propName = "slow-ramp-delay";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
*(uint32_t *)propData = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static u_int32_t k93_get_board_rev(void)
|
||||
{
|
||||
u_int32_t gpio_board_rev;
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
|
||||
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PUP);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PUP);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PUP);
|
||||
|
||||
spin(100); // Wait 100us
|
||||
|
||||
gpio_board_rev =
|
||||
(gpio_read(GPIO_BOARD_REV2) << 2) |
|
||||
(gpio_read(GPIO_BOARD_REV1) << 1) |
|
||||
(gpio_read(GPIO_BOARD_REV0) << 0);
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
|
||||
|
||||
return (gpio_board_rev & 0x7);
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2014 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <drivers/apple/gpio.h>
|
||||
#include <platform/soc/hwregbase.h>
|
||||
#include <target.h>
|
||||
|
||||
#define PIN_CFG_AP 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_AP
|
||||
|
||||
#define PIN_CFG_DEV 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_DEV
|
||||
|
||||
const uint32_t *target_get_default_gpio_cfg(uint32_t gpioc)
|
||||
{
|
||||
if (target_config_ap())
|
||||
return gpio_default_cfg_ap;
|
||||
else
|
||||
return gpio_default_cfg_dev;
|
||||
}
|
||||
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2012 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <target.h>
|
||||
#include <target/powerconfig.h>
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
bool
|
||||
target_get_property(enum target_property prop, void *data, int maxdata, int *retlen)
|
||||
{
|
||||
int length = 0;
|
||||
bool result = false;
|
||||
|
||||
if ((result = target_get_property_base(prop, data, maxdata, retlen)) == false) {
|
||||
switch(prop) {
|
||||
case TARGET_PROPERTY_RESTORE_BACKLIGHT_LEVEL:
|
||||
// fix the restore backlight level at the precharge level,
|
||||
// to make sure the backlight does not cause the battery to
|
||||
// drain during restore
|
||||
if (maxdata >= (ssize_t)sizeof(uint32_t)) {
|
||||
result = true;
|
||||
length = sizeof(uint32_t);
|
||||
*(uint32_t *)data = PRECHARGE_BACKLIGHT_LEVEL;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (retlen != NULL) *retlen = length;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,49 @@
|
||||
# Copyright (C) 2010-2012 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
TARGET_DIR := $(LOCAL_DIR)
|
||||
|
||||
OPTIONS += \
|
||||
DIALOG_D1946=1 \
|
||||
TARGET_HIGH_SOC_VOLTAGE=CHIPID_SOC_VOLTAGE_HIGH \
|
||||
TARGET_HIGH_CPU_VOLTAGE=CHIPID_CPU_VOLTAGE_HIGH \
|
||||
TARGET_CPU_VOLTAGE_MASK=5 \
|
||||
TARGET_CPU_SOURCE=1 \
|
||||
TARGET_MIPI_DSI_SOURCE=2 \
|
||||
TARGET_MANAGED2H_SOURCE=1 \
|
||||
TARGET_MANAGED2L_SOURCE=2 \
|
||||
TARGET_MANAGED2H_DIV=2 \
|
||||
TARGET_MANAGED2L_DIV=3 \
|
||||
TARGET_PCLK1_SOURCE=2 \
|
||||
TARGET_PCLK1_DIV=6 \
|
||||
TARGET_GFX_SOURCE=2 \
|
||||
TARGET_GFX_SLC_SOURCE=2 \
|
||||
TARGET_SPI2_SOURCE=0 \
|
||||
TARGET_IOP_SOURCE=3 \
|
||||
TARGET_LPERFS_SOURCE=3 \
|
||||
TARGET_HPERFNRT_SOURCE=0 \
|
||||
TARGET_CLCD_VSPP=0 \
|
||||
TARGET_DSIM_CONFIG=0x00800000 \
|
||||
AMC_NUM_CHANNELS=2 \
|
||||
AMC_NUM_RANKS=1 \
|
||||
AMC_CHANNEL_WIDTH=4 \
|
||||
MULTITOUCH_DTPATH=\"arm-io/spi1/multi-touch\" \
|
||||
BASEBAND_DTPATH=\"baseband\" \
|
||||
WITH_TARGET_AMG_PARAMS=1
|
||||
|
||||
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
|
||||
|
||||
ALL_OBJS += $(LOCAL_DIR)/init.o \
|
||||
$(LOCAL_DIR)/pinconfig.o
|
||||
|
||||
ifneq ($(PRODUCT),LLB)
|
||||
ALL_OBJS += \
|
||||
$(LOCAL_DIR)/properties.o
|
||||
endif
|
||||
Reference in new issue
Block a user