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@@ -0,0 +1,38 @@
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/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __TARGET_GPIODEF_H
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#define __TARGET_GPIODEF_H
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/* K93 specific gpio -> pin mappings */
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#include <platform/gpio.h>
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/* define target-specific gpios in a generic fashion here. */
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#define GPIO_LCD_PWR_EN GPIO(21, 1)
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#define GPIO_RINGER_AB GPIO( 0, 3)
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#define POWER_GPIO_BATTERY_SWI (5)
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#define POWER_GPIO_BATTERY_SWI_CONFIG_OUTPUT 0x03
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#define POWER_GPIO_BATTERY_SWI_CONFIG_INPUT 0xD8
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/* Board Revision */
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#define GPIO_BOARD_REV0 GPIO(17, 3)
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#define GPIO_BOARD_REV1 GPIO(17, 4)
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#define GPIO_BOARD_REV2 GPIO(17, 5)
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/* which IICs to initialize */
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#define IICS_MASK (7)
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/* D1974 watchdog tickle, 'KEEPACT' */
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#define GPIO_WDOG_TICKLE GPIO(7, 2)
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#endif /* ! __TARGET_GPIODEF_H */
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@@ -0,0 +1,93 @@
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// Copyright (C) 2008-2010 Apple, Inc. All rights reserved.
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//
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// This document is the property of Apple, Inc.
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// It is considered confidential and proprietary.
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//
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// This document may not be reproduced or transmitted in any form,
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// in whole or in part, without the express written permission of
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// Apple, Inc.
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//
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// NOTE: This is a generated file and should not be hand-edited!
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//
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// =============================================================================
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// Nand Geometry Table
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static NandGeometry _nandGeometryTable[] =
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{
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};
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// =============================================================================
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// Nand Timing Table
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static NandTiming _nandTimingTable[] =
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{
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};
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#if (defined (AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// NandChipId Description
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const NandChipIdDescription _nandChipIdDescriptionTable[] =
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{
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};
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// =============================================================================
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// Nand Description Table
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static const NandDescription _nandDescriptionTable[] =
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{
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};
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const UInt32 _nandDescriptionTableSize = sizeof(_nandDescriptionTable) / sizeof(NandDescription);
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#endif // (defined(AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// Nand Board Support Table
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static NandBoardSupport _nandBoardSupportTable[] =
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{
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};
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// =============================================================================
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// Nand Board Timing Table
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static NandBoardInfo _nandBoardInfo =
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{
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/* controlDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* dataDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* chipEnableDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* socToNandRiseNanosecs */ 10,
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/* socToNandFallNanosecs */ 10,
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/* nandToSocRiseNanosecs */ 10,
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/* nandToSocFallNanosecs */ 10,
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/* landing map */
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{
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0x00003333,
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0x0000CCCC
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},
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/* useToggleMode */ FALSE32,
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/* useDiffDQSMode */ FALSE32,
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/* useDiffREMode */ FALSE32,
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/* useVref */ FALSE32,
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/* useSingleHostChannel */ FALSE32,
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/* allowSingleChipEnable */ FALSE32
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};
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static NandFormat _nandFormatPpn =
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{
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/* metaPerLogicalPage */ 16,
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/* validMetaPerLogicalPage */ 16,
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/* logicalPageSize */ 4096
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};
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static NandFormat _nandFormatRaw =
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{
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/* metaPerLogicalPage */ 12,
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/* validMetaPerLogicalPage */ 10,
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/* logicalPageSize */ 0
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};
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@@ -0,0 +1,391 @@
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/*
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* Copyright (C) 2011-2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/* Default J1/J2/J2A SoC Pin Configuration, IO spreadsheet v0.11 */
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#if PIN_CFG_AP
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#define GPIO_DRIVE_STR DRIVE_X2
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#define FMI_DRIVE_STR DRIVE_X3
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#define SPI_DRIVE_STR DRIVE_X3
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#define SPI_CS_DRIVE_STR DRIVE_X2
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#define I2C_DRIVE_STR DRIVE_X3
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#define I2S_DRIVE_STR DRIVE_X3
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#define CAM_DRIVE_STR DRIVE_X3
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#define CAM_RF_DRIVE_STR DRIVE_X4
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#define UART_DRIVE_STR DRIVE_X3
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#define DWI_DRIVE_STR DRIVE_X3
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#define BATTERY_SWI_DRIVE_STR DRIVE_X3
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#define ISP_DRIVE_STR DRIVE_X3
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#elif PIN_CFG_DEV
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#define GPIO_DRIVE_STR DRIVE_X2
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#define FMI_DRIVE_STR DRIVE_X4
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#define SPI_DRIVE_STR DRIVE_X4
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#define SPI_CS_DRIVE_STR DRIVE_X3
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#define I2C_DRIVE_STR DRIVE_X4
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#define I2S_DRIVE_STR DRIVE_X4
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#define CAM_DRIVE_STR DRIVE_X3
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#define CAM_RF_DRIVE_STR DRIVE_X4
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#define UART_DRIVE_STR DRIVE_X4
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#define DWI_DRIVE_STR DRIVE_X4
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#define BATTERY_SWI_DRIVE_STR DRIVE_X4
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#define ISP_DRIVE_STR DRIVE_X3
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#endif
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#if PIN_CFG_AP
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static const u_int32_t gpio_default_cfg_ap[GPIO_GROUP_COUNT * GPIOPADPINS] = {
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#elif PIN_CFG_DEV
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static const u_int32_t gpio_default_cfg_dev[GPIO_GROUP_COUNT * GPIOPADPINS] = {
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#endif
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/* Port 0 */
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CFG_DISABLED, // UART2_TXD ->
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CFG_DISABLED, // UART2_RXD ->
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CFG_IN | GPIO_DRIVE_STR, // UART2_RTSN -> RST_BB_L
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CFG_IN, // UART2_CTSN -> SRL_L
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CFG_FUNC0 | UART_DRIVE_STR, // UART6_TXD -> UART6_WLAN_TXD
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CFG_FUNC0, // UART6_RXD -> UART6_WLAN_RXD
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CFG_DISABLED, // UART6_RTSN ->
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CFG_DISABLED, // UART6_CTSN ->
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/* Port 1 */
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CFG_DISABLED, // SPI0_SCLK -> BOARD_ID[0]
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CFG_DISABLED, // SPI0_MOSI -> BOARD_ID[1]
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CFG_DISABLED, // SPI0_MISO -> BOARD_ID[2]
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CFG_DISABLED, // SPI0_SSIN ->
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CFG_DISABLED, // UART4_TXD ->
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CFG_DISABLED, // UART4_RXD ->
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CFG_DISABLED, // UART4_RTSN ->
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CFG_DISABLED, // UART4_CTSN ->
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/* Port 2 */
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 3 */
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 4 */
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CFG_FUNC0, // DP_HPD -> DP_AP_HPD
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CFG_FUNC0, // EDP_HPD -> EDP_AP_HPD
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CFG_FUNC0 | UART_DRIVE_STR, // UART0_TXD -> UART0_MUX_TXD
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CFG_FUNC0, // UART0_RXD -> UART0_MUX_RXD
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CFG_IN, // GPIO0 -> HOME_L
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CFG_IN, // GPIO1 -> ONOFF_L
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#if SUB_TARGET_J2 || SUB_TARGET_J2A
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CFG_IN | PULL_DOWN, // GPIO2 -> HSIC_BB_RDY
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#elif SUB_TARGET_J1
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CFG_DISABLED, // GPIO2 -> HSIC_BB_RDY
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#endif
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CFG_DISABLED, // GPIO3 ->
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/* Port 5 */
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CFG_IN | PULL_UP, // GPIO4 -> IRQ_PMU_L
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CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO5 -> PM_BT_WAKE
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CFG_IN | PULL_UP, // GPIO6 -> IRQ_CODEC_L
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CFG_DISABLED, // GPIO7 ->
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CFG_DISABLED, // GPIO8 ->
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CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO9 -> PM_RADIO_ON
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#if SUB_TARGET_J2 || SUB_TARGET_J2A
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CFG_IN | PULL_DOWN, // GPIO10 -> RST_DET_L
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#elif SUB_TARGET_J1
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CFG_DISABLED, // GPIO10 -> RST_DET_L
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#endif
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CFG_DISABLED, // GPIO11 ->
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/* Port 6 */
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#if SUB_TARGET_J2 || SUB_TARGET_J2A
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CFG_IN, // GPIO12 -> SPI2_IPC_SRDY
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#elif SUB_TARGET_J1
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CFG_DISABLED, // GPIO12 -> SPI2_IPC_SRDY
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#endif
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CFG_DISABLED, // GPIO13 ->
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CFG_IN | PULL_UP, // GPIO14 -> AUD_VOL_DOWN_L
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CFG_IN | PULL_DOWN, // GPIO15 -> GSM_TXBURST_IND
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CFG_DISABLED | PULL_DOWN, // GPIO16 -> BOARD_ID[3]
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CFG_IN, // GPIO17 -> IRQ_GYRO_INT2
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CFG_DISABLED, // GPIO18 -> BOOT_CONFIG[0]
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CFG_DISABLED, // GPIO19 ->
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/* Port 7 */
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CFG_IN | PULL_UP, // GPIO20 -> AUD_VOL_UP_L
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CFG_IN | PULL_UP, // GPIO21 -> IRQ_GRAPE_HOST_INT_L
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CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO22 -> PM_KEEPACT
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CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO23 -> BB_EMERGENCY_DWLD
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CFG_OUT_0, // GPIO24 -> IPC_GPIO_X26
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CFG_DISABLED, // GPIO25 -> BOOT_CONFIG[1]
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CFG_IN, // GPIO26 -> FORCE_DFU
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CFG_OUT_0 | DRIVE_X1, // GPIO27 -> DFU_STATUS
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/* Port 8 */
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CFG_DISABLED, // GPIO28 -> BOOT_CONFIG[2]
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CFG_DISABLED, // GPIO29 -> BOOT_CONFIG[3]
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CFG_IN, // GPIO30 -> HSIC_WLAN_RDY
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CFG_DISABLED, // GPIO31 ->
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CFG_IN, // GPIO32 -> IRQ_PROX_INT_L
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CFG_IN | PULL_DOWN, // GPIO33 -> IRQ_GYRO_INT1
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CFG_OUT_0, // GPIO34 -> HSIC_HOST_READY_WL
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CFG_DISABLED, // GPIO35 ->
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/* Port 9 */
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CFG_IN | PULL_UP, // GPIO36 -> IRQ_ACCEL_INT1_L
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CFG_IN | PULL_UP, // GPIO37 -> IRQ_ALS_INT_L
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CFG_IN | PULL_UP, // GPIO38 -> IRQ_ACCEL_INT2_L
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CFG_OUT_0 | GPIO_DRIVE_STR, // GPIO39 -> AUD_SPKRAMP_MUTE_L
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CFG_FUNC0 | SPI_DRIVE_STR, // SPI1_SCLK -> SPI1_GRAPE_SCLK
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CFG_FUNC0 | SPI_DRIVE_STR, // SPI1_MOSI -> SPI1_GRAPE_MOSI
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CFG_FUNC0, // SPI1_MISO -> SPI1_GRAPE_MISO
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CFG_OUT_1 | SPI_CS_DRIVE_STR, // SPI1_SSIN -> SPI1_GRAPE_CS_L
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/* Port 10 */
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C2_SDA -> I2C2_SDA_3V0
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C2_SCL -> I2C2_SCL_3V0
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CFG_IN | UART_DRIVE_STR, // UART1_TXD -> UART1_BB_TXD
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CFG_FUNC0, // UART1_RXD -> UART1_BB_RXD
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CFG_FUNC0 | UART_DRIVE_STR, // UART1_RTSN -> UART1_BB_RTS_L
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CFG_FUNC0, // UART1_CTSN -> UART1_BB_CTS_L
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CFG_FUNC0 | UART_DRIVE_STR, // UART3_TXD -> UART3_BT_TXD
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CFG_FUNC0, // UART3_RXD -> UART3_BT_RXD
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/* Port 11 */
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CFG_OUT_1 | UART_DRIVE_STR, // UART3_RTSN -> UART3_BT_RTS_L
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CFG_FUNC0, // UART3_CTSN -> UART3_BT_CTS_L
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CFG_FUNC0 | BATTERY_SWI_DRIVE_STR, // UART5_RTXD -> BATTERY_SWI
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CFG_FUNC0 | ISP_DRIVE_STR, // ISP0_SDA -> ISP_AP_0_SDA
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CFG_FUNC0 | ISP_DRIVE_STR, // ISP0_SCL -> ISP_AP_0_SCL
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CFG_FUNC0 | ISP_DRIVE_STR, // ISP1_SDA -> ISP_AP_1_SDA
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CFG_FUNC0 | ISP_DRIVE_STR, // ISP1_SCL -> ISP_AP_1_SCL
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CFG_DISABLED, // SPI2_SCLK ->
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/* Port 12 */
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CFG_DISABLED, // SPI2_MOSI ->
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CFG_DISABLED,
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#if SUB_TARGET_J2 || SUB_TARGET_J2A
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CFG_OUT_0 | SPI_CS_DRIVE_STR, // SPI2_SSIN -> HSIC_HOST_RDY
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#elif SUB_TARGET_J1
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CFG_DISABLED | SPI_CS_DRIVE_STR, // SPI2_SSIN -> HSIC_HOST_RDY
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#endif
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SDA -> I2C0_SDA_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SCL -> I2C0_SCL_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SDA -> I2C1_SDA_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SCL -> I2C1_SCL_1V8
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CFG_DISABLED, // MIPI_VSYNC ->
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/* Port 13 */
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CFG_DISABLED, // TMR32_PWM0 ->
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CFG_DISABLED, // TMR32_PWM1 ->
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CFG_DISABLED | GPIO_DRIVE_STR, // TMR32_PWM2 -> LED_STROBE_EN
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CFG_DISABLED, // SWI_DATA ->
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CFG_FUNC0 | PULL_DOWN, // DWI_DI -> DWI_AP_DI
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CFG_FUNC0 | DWI_DRIVE_STR, // DWI_DO -> DWI_AP_DO
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CFG_FUNC0 | DWI_DRIVE_STR, // DWI_CLK -> DWI_AP_CLK
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CFG_OUT_1 | GPIO_DRIVE_STR, // SENSOR0_RST -> PM_REAR_CAM_SHUTDOWN
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/* Port 14 */
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CFG_OUT_0 | CAM_RF_DRIVE_STR, // SENSOR0_CLK -> CLK_CAM_RF_R
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CFG_OUT_1 | GPIO_DRIVE_STR, // SENSOR1_RST -> PM_FRONT_CAM_SHUTDOWN
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CFG_OUT_0 | CAM_DRIVE_STR, // SENSOR1_CLK -> CLK_CAM_FF_R
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_MCK -> I2S0_ASP_MCK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_LRCK -> I2S0_ASP_LRCK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_BCLK -> I2S0_ASP_BCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_DOUT -> I2S0_ASP_DOUT
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CFG_FUNC0, // I2S0_DIN -> I2S0_ASP_DIN
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/* Port 15 */
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CFG_DISABLED, // I2S1_MCK ->
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CFG_DISABLED, // I2S1_LRCK ->
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CFG_DISABLED, // I2S1_BCLK ->
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CFG_DISABLED, // I2S1_DOUT ->
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CFG_DISABLED, // I2S1_DIN ->
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CFG_DISABLED, // I2S2_MCK ->
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_LRCK -> I2S2_VSP_LRCK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_BCLK -> I2S2_VSP_BCLK
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/* Port 16 */
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_DOUT -> I2S2_VSP_DOUT
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CFG_FUNC0, // I2S2_DIN -> I2S2_VSP_DIN
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CFG_DISABLED, // I2S3_MCK ->
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_LRCK -> I2S3_XSP_LRCK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_BCLK -> I2S3_XSP_BCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_DOUT -> I2S3_XSP_DOUT
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CFG_FUNC0, // I2S3_DIN -> I2S3_XSP_DIN
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CFG_DISABLED, // SPDIF ->
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/* Port 17 */
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CFG_FUNC0, // TST_CLKOUT -> TP_AP_TST_CLKOUT
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CFG_FUNC0, // TST_STPCLK -> AP_TST_STPCLK
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CFG_FUNC0 | DRIVE_X3, // WDOG -> AP_WDOG
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CFG_DISABLED, // EHCI_PORT_PWR[0] -> GPIO40_BRD_REV0
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CFG_DISABLED, // EHCI_PORT_PWR[1] -> GPIO41_BRD_REV1
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CFG_DISABLED, // EHCI_PORT_PWR[2] -> GPIO42_BRD_REV2
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CFG_DISABLED, // SDIO_CLK ->
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CFG_DISABLED, // SDIO_CMD ->
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/* Port 18 */
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CFG_DISABLED, // SDIO_DATA0 ->
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CFG_DISABLED, // SDIO_DATA1 ->
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CFG_DISABLED, // SDIO_DATA2 ->
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CFG_DISABLED, // SDIO_DATA3 ->
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CFG_OUT_0 | DRIVE_X3, // GPIO_3V_0 -> PORT_DOCK_VIDEO_AMP_EN
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CFG_DISABLED, // GPIO_3V_1 ->
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CFG_OUT_0 | CAM_DRIVE_STR, // ISP0_PRE_FLASH -> CAM0_1V2_VDDCORE_EN
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||||
CFG_OUT_0 | CAM_DRIVE_STR, // ISP0_FLASH -> CAM0_RESET_L
|
||||
|
||||
/* Port 19 */
|
||||
CFG_DISABLED, // ISP1_PRE_FLASH ->
|
||||
CFG_DISABLED, // ISP1_FLASH ->
|
||||
CFG_DISABLED, // SPI3_MOSI ->
|
||||
CFG_DISABLED, // SPI3_MISO ->
|
||||
CFG_DISABLED, // SPI3_SCLK ->
|
||||
CFG_DISABLED, // SPI3_SSIN ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN7 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN6 ->
|
||||
|
||||
/* Port 20 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN5 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN4 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN7 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN6 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN5 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN4 ->
|
||||
CFG_OUT_1 | GPIO_DRIVE_STR, // FMI2_CEN7 -> GRAPE_FW_DNLD_EN_L
|
||||
CFG_OUT_0 | GPIO_DRIVE_STR, // FMI2_CEN6 -> RST_GRAPE_L
|
||||
|
||||
/* Port 21 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_CEN5 ->
|
||||
CFG_OUT_0 | DRIVE_X3, // FMI2_CEN4 -> PM_LCDVDD_PWR_EN
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN7 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN6 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN5 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN4 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO7 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO6 ->
|
||||
|
||||
/* Port 22 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO5 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO4 ->
|
||||
CFG_DISABLED | PULL_DOWN, // FMI0_DQS ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO3 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO2 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO1 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI0_IO0 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_REN ->
|
||||
|
||||
/* Port 23 */
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_WEN ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_ALE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CLE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI0_CEN2 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN1 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI0_CEN0 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO7 ->
|
||||
|
||||
/* Port 24 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO6 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO5 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO4 ->
|
||||
CFG_DISABLED | PULL_DOWN, // FMI1_DQS ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO3 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO2 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO1 ->
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_DRIVE_STR, // FMI1_IO0 ->
|
||||
|
||||
/* Port 25 */
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_REN ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_WEN ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_ALE ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CLE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI1_CEN2 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN1 ->
|
||||
CFG_FUNC0 | FMI_DRIVE_STR, // FMI1_CEN0 ->
|
||||
|
||||
/* Port 26 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO7 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO6 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO5 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO4 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_DQS ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO2 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO1 ->
|
||||
|
||||
/* Port 27 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_IO0 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_REN ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_WEN ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_ALE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_CLE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_CEN3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_CEN2 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI2_CEN1 ->
|
||||
|
||||
/* Port 28 */
|
||||
CFG_IN, // FMI2_CEN0 -> SPK_ID
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO7 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO6 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO5 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO4 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_DQS ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO2 ->
|
||||
|
||||
/* Port 29 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO1 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_IO0 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_REN ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_WEN ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_ALE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CLE ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN3 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN2 ->
|
||||
|
||||
/* Port 30 */
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN1 ->
|
||||
CFG_DISABLED | FMI_DRIVE_STR, // FMI3_CEN0 ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
};
|
||||
|
||||
#undef GPIO_DRIVE_STR
|
||||
#undef FMI_DRIVE_STR
|
||||
#undef SPI_DRIVE_STR
|
||||
#undef SPI_CS_DRIVE_STR
|
||||
#undef I2C_DRIVE_STR
|
||||
#undef I2S_DRIVE_STR
|
||||
#undef CAM_DRIVE_STR
|
||||
#undef CAM_RF_DRIVE_STR
|
||||
#undef UART_DRIVE_STR
|
||||
#undef DWI_DRIVE_STR
|
||||
#undef BATTERY_SWI_DRIVE_STR
|
||||
#undef ISP_DRIVE_STR
|
||||
@@ -0,0 +1,165 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
#include <drivers/gasgauge.h>
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define PMU_IIC_BUS 0
|
||||
|
||||
/* this configuration is very PMU specific and must be included exactly once in power.c */
|
||||
#ifdef POWERCONFIG_PMU_SETUP
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // Force bypass off
|
||||
{ PMU_IIC_BUS, kD1974_LDO1, 0x0A }, // PP3V0_GRAPE 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO2, 0x0A }, // PP1V7_VA_VCP 1.70V
|
||||
{ PMU_IIC_BUS, kD1974_LDO3, 0x0A }, // PP3V0_VIDEO 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO4, 0x18 }, // PP3V0_OPTICAL 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO5, 0x0E }, // PP3V2_LDO5 3.20V
|
||||
{ PMU_IIC_BUS, kD1974_LDO6, 0x10 }, // PP3V3_ACC 3.30V
|
||||
{ PMU_IIC_BUS, kD1974_LDO7, 0x12 }, // PP3V0_VIDEO_BUF 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO8, 0x18 }, // PP3V2_S2R_USBMUX 3.20V
|
||||
{ PMU_IIC_BUS, kD1974_LDO9, 0x12 }, // PP3V0_IO 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO10, 0x0A }, // PP3V0_S2R_HALL 3.00V
|
||||
{ PMU_IIC_BUS, kD1974_LDO11, 0x17 }, // PP2V85_CAM 2.85V
|
||||
{ PMU_IIC_BUS, kD1974_LDO12, 0x14 }, // PP1V1 1.10V
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // Leave bypass off
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1974_ACTIVE1, 0xDF }, // Everything but LDO1
|
||||
{ PMU_IIC_BUS, kD1974_ACTIVE2, 0xF9 }, // Everything but LDO5 and LDO6
|
||||
{ PMU_IIC_BUS, kD1974_ACTIVE3, 0x61 }, // LDO12 ON, WLEDA/B BST
|
||||
{ PMU_IIC_BUS, kD1974_ACTIVE4, 0xA0 }, // CPU1V8 and CPU1V2 ON
|
||||
{ PMU_IIC_BUS, kD1974_LCM_CONTROL1, 0x02 }, // unused 5.10V
|
||||
{ PMU_IIC_BUS, kD1974_LCM_CONTROL2, 0x05 }, // unused 5.25V
|
||||
{ PMU_IIC_BUS, kD1974_LCM_CONTROL3, 0x00 }, // BB_VBUS_DET 5.00V
|
||||
{ PMU_IIC_BUS, kD1974_LCM_BST_CONTROL, 0x14 }, // VBOOST_LCM 6.00V
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_warm_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_SYS_CONTROL2, 0x10 }, // HIB_32K on, DWI off
|
||||
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_A, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_B, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_C, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_D, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_E, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_F, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_G, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_H, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_I, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_IRQ_MASK_J, 0x00 },
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_cold_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1974_BUCK4, 0x98 }, // BUCK4 1.2V
|
||||
{ PMU_IIC_BUS, kD1974_BUCK4_HIB, 0x98 }, // BUCK4_HIB 1.2V
|
||||
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_1, 0x11 }, // CLK_32K_PMU Out 0, Push-Pull, CPU_1V8
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_2, 0x49 }, // CLK_32K_WLAN CLK32K, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_3, 0x09 }, // RST_BT_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_4, 0x09 }, // RST_WLAN_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_5, 0x09 }, // RST_BB_PMU_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_6, 0xDA }, // BATTERY_SWI In, F Edge, Wake, Pull Up, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_7, 0xBB }, // PM_BT_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_8, 0xBB }, // PM_WLAN_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_9, 0xBB }, // PM_BB_HOST_WAKE In, R Edge, Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_10, 0xEA }, // AUD_MIK_HS1_INT_L In, Change, Wake, Pull Up, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_11, 0x09 }, // DOCK_BB_EN Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_12, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_13, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_14, 0xC8 }, // RST_L63_L In, F Edge, No Wake, Pull Up, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_15, 0xFA }, // HALL_IRQ Both Edges, No Wake, Pull Up, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_16, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_17, 0xB9 }, // unused In, R Edge, No Wake, Pull Down, Disable Pull-Up
|
||||
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB1, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB2, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB3, 0x02 }, // no debounce on GPIO6
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB4, 0x10 }, // no debounce on GPIO7
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB5, 0x02 }, // no debounce on GPIO8
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB6, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB7, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB8, 0x12 }, // 10ms debounce
|
||||
{ PMU_IIC_BUS, kD1974_SYS_GPIO_DEB9, 0x12 }, // 10ms debounce
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_enable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET, 0xD4 }, // 50% value from OS
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET2, 0x00 },
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, // enable all LED strings
|
||||
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL2, // enable LED Power
|
||||
(kDIALOG_WLED_CONTROL2_WLED_RAMP_EN |
|
||||
kDIALOG_WLED_CONTROL2_WLED_DITH_EN) }
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_disable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, 0x0 } // disable LED power
|
||||
};
|
||||
|
||||
static const struct core_rails_struct soc_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK2 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct cpu_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK0 }
|
||||
};
|
||||
|
||||
#endif /* POWERCONFIG_PMU_SETUP */
|
||||
|
||||
#define TARGET_USE_CHARGE_TABLE 1
|
||||
static const struct power_charge_limits pmu_charge_table[16] = { // gas gauge can have up to 16 entries
|
||||
{ 4000, 1000, 1600, 3150 }, // 10 - 16C 0.27C
|
||||
{ 4100, 1000, 1600, 2350 }, // 0.27C
|
||||
{ USHRT_MAX, 1000, 1600, 1350 }, // 0.11C
|
||||
{ 4000, 1500, 2100, 3150 }, // 15 - 21C 0.27C
|
||||
{ 4100, 1500, 2100, 3150 }, // 0.27C
|
||||
{ USHRT_MAX, 1500, 2100, 2350 }, // 0.2C
|
||||
{ 4000, 2000, 3500, 3150 }, // 20 - 35C 0.27C
|
||||
{ 4100, 2000, 3500, 3150 }, // 0.27C
|
||||
{ USHRT_MAX, 2000, 3500, 3150 }, // 0.27C
|
||||
{ 4000, 3400, 4500, 3150 }, // 34 - 45C 0.27C
|
||||
{ 4100, 3400, 4500, 3150 }, // 0.27C
|
||||
{ USHRT_MAX, 3400, 4500, 3150 }, // 0.27C
|
||||
};
|
||||
|
||||
#define NO_BATTERY_VOLTAGE 2700
|
||||
#define MIN_BOOT_BATTERY_VOLTAGE 3600
|
||||
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
|
||||
#define TARGET_BOOT_BATTERY_CAPACITY 50
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 1287 /* 10% brightness */
|
||||
#define TARGET_PRECHARGE_ALWAYS_DISPLAY_IDLE 1
|
||||
#define TARGET_MAX_USB_INPUT_CURRENT 2400
|
||||
|
||||
#define GASGAUGE_BATTERYID_BLOCK 1
|
||||
#define GASGAUGE_CHARGETABLE_BLOCK 3
|
||||
static const unsigned int atv_voltage_limit[16] = { 3600, 3650, 3700, 3750, 3800, 3850, 3900, 3950, 4000, 4050, 4100, 4150, 4200, 4250, 4300, 4350 };
|
||||
static const unsigned int atv_current_limit[16] = { 150, 350, 550, 750, 950, 1150, 1350, 1550, 1750, 1950, 2150, 2350, 2550, 2750, 2950, 3150 };
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_RADIOCONFIG_H
|
||||
#define __TARGET_RADIOCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define RADIO_VERIFY_BASEBAND_EXISTS 1
|
||||
|
||||
static const gpio_t target_radio_quiesce_pins[] =
|
||||
{
|
||||
GPIO_UART1_TXD
|
||||
};
|
||||
|
||||
#define RADIO_ENABLE_IMEI_OVERRIDE 0
|
||||
|
||||
#endif /* ! __TARGET_RADIOCONFIG_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define two debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (0)
|
||||
|
||||
/* define radio serial port */
|
||||
#define RADIO_SERIAL_PORT (1)
|
||||
#define RADIO_MAX_READ_ERRORS (10)
|
||||
|
||||
/* define HDQ serial port */
|
||||
#define HDQGAUGE_SERIAL_PORT (5)
|
||||
|
||||
#define UART_FLOWCONTROL_MASK (0x08)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,430 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <drivers/display.h>
|
||||
#include <drivers/flash_nor.h>
|
||||
#include <drivers/iic.h>
|
||||
#include <drivers/power.h>
|
||||
#include <lib/devicetree.h>
|
||||
#include <lib/env.h>
|
||||
#include <lib/mib.h>
|
||||
#include <lib/syscfg.h>
|
||||
#include <platform.h>
|
||||
#include <platform/gpio.h>
|
||||
#include <platform/gpiodef.h>
|
||||
#include <platform/memmap.h>
|
||||
#include <sys.h>
|
||||
#include <sys/boot.h>
|
||||
#include <sys/menu.h>
|
||||
#include <sys/task.h>
|
||||
#include <target.h>
|
||||
#include <target/powerconfig.h>
|
||||
|
||||
#define J2_PROTO0_BOARD (0) // same as REV1 Dev Board
|
||||
#define J2_PROTO1_LOCAL_BOARD (1)
|
||||
#define J2_PROTO1_CHINA_BOARD (2)
|
||||
#define J2_PROTO2_BOARD (3) // DEV2 board also
|
||||
#define J2_PRE_EVT_BOARD (4)
|
||||
|
||||
static u_int32_t ipad3_get_board_rev(void);
|
||||
static void amelia_init();
|
||||
|
||||
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
|
||||
#include <drivers/displayport/displayport.h>
|
||||
static dp_t dp;
|
||||
#endif
|
||||
|
||||
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 2);
|
||||
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 90);
|
||||
|
||||
void target_early_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_late_init(void)
|
||||
{
|
||||
if (target_config_ap()) {
|
||||
// Deprecate Proto0/1/2 boards
|
||||
// Since board revs are shared between dev boards and enclosures,
|
||||
// depreate only enclosures
|
||||
if (ipad3_get_board_rev() < J2_PRE_EVT_BOARD)
|
||||
platform_not_supported();
|
||||
}
|
||||
}
|
||||
|
||||
void target_init(void)
|
||||
{
|
||||
// Cold-boot defaults for GPIOs where pinconfig.h differs,
|
||||
// and it can't wait for the AppleARMFunction creation.
|
||||
|
||||
#if WITH_HW_FLASH_NOR
|
||||
flash_nor_init(SPI_NOR0);
|
||||
#endif
|
||||
|
||||
amelia_init();
|
||||
}
|
||||
|
||||
void target_quiesce_hardware(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_poweroff(void)
|
||||
{
|
||||
}
|
||||
|
||||
int target_bootprep(enum boot_target target)
|
||||
{
|
||||
switch (target) {
|
||||
case BOOT_DARWIN:
|
||||
case BOOT_DARWIN_RESTORE:
|
||||
case BOOT_DIAGS:
|
||||
break;
|
||||
|
||||
default:
|
||||
; // do nothing
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool target_should_recover(void)
|
||||
{
|
||||
return platform_get_request_dfu2() && power_has_usb();
|
||||
}
|
||||
|
||||
bool target_should_poweron(bool *cold_button_boot)
|
||||
{
|
||||
#if WITH_HW_POWER
|
||||
if (power_get_boot_flag() == kPowerBootFlagColdButton) *cold_button_boot = true;
|
||||
#else
|
||||
*cold_button_boot = false;
|
||||
#endif
|
||||
|
||||
return !*cold_button_boot || platform_get_request_dfu1();
|
||||
}
|
||||
|
||||
bool target_should_poweroff(bool at_boot)
|
||||
{
|
||||
return platform_get_request_dfu1() && (!at_boot || !power_has_usb());
|
||||
}
|
||||
|
||||
#if APPLICATION_IBOOT
|
||||
void target_watchdog_tickle(void)
|
||||
{
|
||||
u_int32_t value = gpio_read(GPIO_WDOG_TICKLE);
|
||||
gpio_write(GPIO_WDOG_TICKLE, value ^ 1);
|
||||
}
|
||||
#endif // APPLICATION_IBOOT
|
||||
|
||||
void * target_get_display_configuration(void)
|
||||
{
|
||||
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
|
||||
dp.mode = 0x1;
|
||||
dp.type = 0x1;
|
||||
dp.min_link_rate = 0x6;
|
||||
dp.max_link_rate = 0x6;
|
||||
dp.lanes = 0x4;
|
||||
dp.ssc = 0x0;
|
||||
dp.alpm = 0x0;
|
||||
dp.vrr_enable = 0x0;
|
||||
dp.vrr_on = 0x0;
|
||||
return ((void *)(&dp));
|
||||
#else
|
||||
return NULL;
|
||||
#endif
|
||||
}
|
||||
|
||||
#if WITH_ENV
|
||||
|
||||
void target_setup_default_environment(void)
|
||||
{
|
||||
env_set("boot-device", "nand0", 0);
|
||||
env_set("display-color-space","RGB888", 0);
|
||||
env_set("display-timing", "ipad3", 0);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
int target_update_device_tree(void)
|
||||
{
|
||||
DTNode *node;
|
||||
#if WITH_HW_DISPLAY_EDP
|
||||
DTNode *clcd_node = NULL, *backlight_node = NULL, *lcd_node = NULL;
|
||||
#endif
|
||||
uint32_t propSize, propCnt;
|
||||
char *propName;
|
||||
void *propData;
|
||||
|
||||
|
||||
// Update the DWI node with the actual voltages
|
||||
if (FindNode(0, "arm-io/dwi", &node)) {
|
||||
propName = "voltages-buck0";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propCnt = propSize / sizeof(u_int32_t);
|
||||
platform_get_cpu_voltages(propCnt, propData);
|
||||
platform_convert_voltages(0, propCnt, propData);
|
||||
}
|
||||
propName = "voltages-buck2";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propCnt = propSize / sizeof(u_int32_t);
|
||||
platform_get_soc_voltages(propCnt, propData);
|
||||
platform_convert_voltages(2, propCnt, propData);
|
||||
}
|
||||
}
|
||||
|
||||
#if WITH_HW_DISPLAY_EDP
|
||||
if (FindNode(0, DP_DTPATH, &node)) {
|
||||
extern int edp_update_device_tree(DTNode *edp_node, DTNode *lcd_node, DTNode *clcd_node, DTNode *backlight_node);
|
||||
FindNode(0, "arm-io/clcd", &clcd_node);
|
||||
FindNode(0, DP_DTPATH "/lcd", &lcd_node);
|
||||
FindNode(0, "backlight", &backlight_node);
|
||||
edp_update_device_tree(node, lcd_node, clcd_node, backlight_node);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (target_config_dev()) {
|
||||
// Below is needed for DEV1 boards
|
||||
|
||||
// Support for A0 Amelia
|
||||
if (ipad3_get_board_rev() <= J2_PROTO1_CHINA_BOARD) {
|
||||
// <rdar://problem/9001989>
|
||||
if (FindNode(0, "arm-io/dwi", &node)) {
|
||||
propName = "dwi-version";
|
||||
if (FindProperty(node, &propName, &propData, &propSize))
|
||||
((u_int32_t *)propData)[0] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// Proto0 and Proto1-Local support
|
||||
if (ipad3_get_board_rev() <= J2_PROTO1_LOCAL_BOARD) {
|
||||
// update wlan node, HSIC_WLAN_READY pin is different
|
||||
if (FindNode(0, WIFI_DTPATH, &node)) {
|
||||
propName = "function-device_ready";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
// structure looks like this:
|
||||
// UInt32 gpioPHandle;
|
||||
// UInt32 gpioSignature;
|
||||
// UInt32 gpioIndex;
|
||||
// UInt8 gpioDirection;
|
||||
// UInt8 gpioPolarity;
|
||||
// UInt8 gpioDefault;
|
||||
// UInt8 gpioAltFunction;
|
||||
((u_int32_t *)propData)[2] = 0x00001205; // GPIO_3V_1 -> HSIC_WLAN_RDY
|
||||
}
|
||||
propName = "interrupts";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
// structure looks like this:
|
||||
// UInt32 vectorNumber;
|
||||
// UInt32 vectorType;
|
||||
((u_int32_t *)propData)[0] = 0x00000095; // GPIO_3V_1 -> HSIC_WLAN_RDY
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Update the bottom prox calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/prox", &node)) {
|
||||
propName = "prox-calibration-blob";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the compass calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/compass", &node)) {
|
||||
propName = "compass-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPAS', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update als node with calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/als", &node)) {
|
||||
propName = "backlight-leakage-channel0";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ALC0', propData, propSize);
|
||||
}
|
||||
propName = "backlight-leakage-channel1";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ALC1', propData, propSize);
|
||||
}
|
||||
propName = "alsCalibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AlsC', propData, propSize);
|
||||
}
|
||||
propName = "als-colorCfg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ClrC', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the gyro calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/gyro", &node)) {
|
||||
propName = "low-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTGO', propData, propSize);
|
||||
}
|
||||
propName = "high-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('HTGO', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCl', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sens-matrix-inverse";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCi', propData, propSize);
|
||||
}
|
||||
propName = "gyro-temp-table";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GYTT', propData, propSize);
|
||||
}
|
||||
propName = "gyro-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the gyro1 calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/gyro1", &node)) {
|
||||
propName = "low-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTGO', propData, propSize);
|
||||
}
|
||||
propName = "high-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('HTGO', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCl', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sens-matrix-inverse";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCi', propData, propSize);
|
||||
}
|
||||
propName = "gyro-temp-table";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GYTT', propData, propSize);
|
||||
}
|
||||
propName = "gyro-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update accelerometer calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/accelerometer", &node)) {
|
||||
propName = "low-temp-accel-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTAO', propData, propSize);
|
||||
}
|
||||
propName = "accel-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ASCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update camera calibration data
|
||||
if (FindNode(0, "arm-io/isp", &node)) {
|
||||
propName = "camera-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CmCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static u_int32_t ipad3_get_board_rev(void)
|
||||
{
|
||||
u_int32_t gpio_board_rev;
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
|
||||
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PUP);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PUP);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PUP);
|
||||
|
||||
spin(100); // Wait 100us
|
||||
|
||||
gpio_board_rev =
|
||||
(gpio_read(GPIO_BOARD_REV2) << 2) |
|
||||
(gpio_read(GPIO_BOARD_REV1) << 1) |
|
||||
(gpio_read(GPIO_BOARD_REV0) << 0);
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
|
||||
|
||||
return (gpio_board_rev & 0x7);
|
||||
}
|
||||
|
||||
static void amelia_init()
|
||||
{
|
||||
uint32_t board_rev;
|
||||
|
||||
struct pmu_iic_data {
|
||||
uint8_t addr;
|
||||
uint8_t data;
|
||||
};
|
||||
struct pmu_iic_data amelia_a0_data[] = {
|
||||
{ 0x22, 0x02 }, // BANKSEL: select bank 2
|
||||
{ 0xd0, 0x01 }, // TESTMODE: enable test mode
|
||||
{ 0x22, 0x01 }, // BANKSEL: select bank 1
|
||||
{ 0xa9, 0x00 }, // WLED_CONTROL4: set WLED to IDAC always, WLED_IRATE to 17.5mA
|
||||
{ 0x22, 0x02 }, // BANKSEL: select bank 2
|
||||
{ 0xd0, 0x00 }, // TESTMODE: disable test mode
|
||||
{ 0x22, 0x00 }, // BANKSEL: select bank 1
|
||||
};
|
||||
|
||||
struct pmu_iic_data amelia_a1_data[] = {
|
||||
{ 0x22, 0x02 }, // BANKSEL: select bank 2
|
||||
{ 0xd0, 0x01 }, // TESTMODE: enable test mode
|
||||
{ 0x22, 0x01 }, // BANKSEL: select bank 1
|
||||
{ 0xa9, 0x79 }, // WLED_CONTROL4: set WLED to IDAC always, WLED_IRATE to 18.5mA
|
||||
{ 0xaa, 0x86 }, // WLED_CONTROL5: set ALT_MIN_IDAC_CODE
|
||||
{ 0xab, 0x00 }, // WLED_CONTROL6: set ALT_PWM_START_CODE
|
||||
{ 0xac, 0x18 }, // WLED_CONTROL7: set ALT_DITHER_EN and ALT_DITHER_ALLOW
|
||||
{ 0xb2, 0xee }, // BUCK_CTRL0: operate into Synchronous mode (forced PWM mode)
|
||||
{ 0xb4, 0xee }, // BUCK_CTRL2: operate into Synchronous mode (forced PWM mode)
|
||||
{ 0x22, 0x02 }, // BANKSEL: select bank 2
|
||||
{ 0xd0, 0x00 }, // TESTMODE: disable test mode
|
||||
{ 0x22, 0x00 }, // BANKSEL: select bank 1
|
||||
};
|
||||
struct pmu_iic_data *data;
|
||||
uint8_t entries;
|
||||
uint8_t i;
|
||||
|
||||
board_rev = ipad3_get_board_rev();
|
||||
|
||||
// <rdar://problem/9059055> J1/J2 default display brightness too high
|
||||
// <rdar://problem/9126569> J1/J2 Pre-Proto MLBs and Dev Board Rev.1 Brightness Too High
|
||||
// <rdar://problem/9478595> Switch J1/J2 backlight over to enhanced hybrid mode
|
||||
if (target_config_dev() && (board_rev == J2_PROTO0_BOARD || board_rev == J2_PROTO1_LOCAL_BOARD)) {
|
||||
data = amelia_a0_data;
|
||||
entries = sizeof(amelia_a0_data)/sizeof(amelia_a0_data[0]);
|
||||
} else {
|
||||
data = amelia_a1_data;
|
||||
entries = sizeof(amelia_a1_data)/sizeof(amelia_a1_data[0]);
|
||||
}
|
||||
|
||||
// Amelia I2C bus: 0, Amelia Write address: 0x78
|
||||
for (i = 0; i < entries; i++)
|
||||
iic_write(0, 0x78, (const void *)&data[i], 2);
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2014 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <drivers/apple/gpio.h>
|
||||
#include <platform/soc/hwregbase.h>
|
||||
#include <target.h>
|
||||
|
||||
#define PIN_CFG_AP 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_AP
|
||||
|
||||
#define PIN_CFG_DEV 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_DEV
|
||||
|
||||
const uint32_t *target_get_default_gpio_cfg(uint32_t gpioc)
|
||||
{
|
||||
if (target_config_ap())
|
||||
return gpio_default_cfg_ap;
|
||||
else
|
||||
return gpio_default_cfg_dev;
|
||||
}
|
||||
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2012 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <target.h>
|
||||
#include <target/powerconfig.h>
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
bool
|
||||
target_get_property(enum target_property prop, void *data, int maxdata, int *retlen)
|
||||
{
|
||||
int length = 0;
|
||||
bool result = false;
|
||||
|
||||
if ((result = target_get_property_base(prop, data, maxdata, retlen)) == false) {
|
||||
switch(prop) {
|
||||
case TARGET_PROPERTY_RESTORE_BACKLIGHT_LEVEL:
|
||||
// fix the restore backlight level at the precharge level,
|
||||
// to make sure the backlight does not cause the battery to
|
||||
// drain during restore
|
||||
if (maxdata >= (ssize_t)sizeof(uint32_t)) {
|
||||
result = true;
|
||||
length = sizeof(uint32_t);
|
||||
*(uint32_t *)data = PRECHARGE_BACKLIGHT_LEVEL;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (retlen != NULL) *retlen = length;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,34 @@
|
||||
# Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
TARGET_DIR := $(LOCAL_DIR)
|
||||
|
||||
OPTIONS += \
|
||||
DIALOG_D1974=1 \
|
||||
TARGET_HIGH_SOC_VOLTAGE=CHIPID_SOC_VOLTAGE_HIGH \
|
||||
TARGET_HIGH_CPU_VOLTAGE=CHIPID_CPU_VOLTAGE_HIGH \
|
||||
TARGET_USE_HSIC=1 \
|
||||
AMC_NUM_CHANNELS=4 \
|
||||
AMC_NUM_RANKS=1 \
|
||||
AMC_CHANNEL_WIDTH=4 \
|
||||
DP_DTPATH=\"arm-io/edp\" \
|
||||
MULTITOUCH_DTPATH=\"arm-io/spi1/multi-touch\" \
|
||||
WIFI_DTPATH=\"arm-io/usb1-complex/usb1-ehci/wlan\" \
|
||||
USBDEVICE_DTPATH=\"arm-io/usb0-complex/usb0-device\"
|
||||
|
||||
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
|
||||
|
||||
ALL_OBJS += $(LOCAL_DIR)/init.o \
|
||||
$(LOCAL_DIR)/pinconfig.o
|
||||
|
||||
ifneq ($(PRODUCT),LLB)
|
||||
ALL_OBJS += \
|
||||
$(LOCAL_DIR)/properties.o
|
||||
endif
|
||||
Reference in new issue
Block a user