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Chris Nutter committed 2023-07-08 13:03:17 -07:00
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/*
* Copyright (C) 2013-2014 Apple Inc. All rights reserved.
*
* This document is the property of Apple Computer, Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_ADBE_SETTINGS_H
#define __TARGET_ADBE_SETTINGS_H
static struct adbe_v2_tuneable adbe_tuneables[] = {
{
.name = "default",
.adbe0_vblank_pos_vbi_pulse = 0x000e,
.adbe0_vblank_clk_gate_wakeup = 0x000e,
.adbe0_vblank_clk_gate_idle = 0x0000,
.adbe0_vblank_busy_finish = 2,
.adbe0_tunable_mode_ctrl = (DBEMODECNTL_DPB_BUSY_MASK | \
DBEMODECNTL_PMGR_CLK_GATE_ENABLE | \
DBEMODECNTL_DYN_CLK_GATE_ENABLE | \
DBEMODECNTL_BLK_CLK_GATE_ENABLE),
.adbe0_aap_support = 1,
.adbe0_aap_format_control_reg1 = (AAP_FORMAT_CONTROL_REG1_AUTOPOS | AAP_FORMAT_CONTROL_REG1_RSVD(8) | AAP_FORMAT_CONTROL_REG1_VS_POL),
},
};
#endif
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/*
* Copyright (C) 2014,2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
/* Memory settings taken from j42d (2 GB), SEG signed off that they are the same (800MHz vs 792MHz) */
static const struct amc_param amc_params = {
.lat = 0x00060300,
.phyrdwrtim = 0x00020a04,
.tREFi = 0x5d,
.pdn = 0x22000403,
.derate = 0x24831359,
.read = 0x00000203,
.bustat = 0x00222209,
.bustat2 = 0x00222209,
.pwrmngten_default = 0x00100100,
.schen_default = 0x00001110,
.mcphyupdate = 0x15030000,
.mcphyupdate1 = 0x00000003,
.arefparam = 0x0ca2b532,
.longsr = 0x05022008,
.mr1 = 0x44,
.mr2 = 0x1a,
.mr3 = 0x03,
.addrcfg = 0x00030201,
.mccchnldec = 0x00060010,
.mcuchnhash = 0x0ffffd54,
.mcschnldec = 0x00010200,
.qbrparam = 0x00050200,
.odts = 0x00000320,
.addrmapmode = 0x00000601,
.readleveling = 0x00000300,
.freq = {
{ // 800MHz
.cas = 0x00000308,
.pch = 0x00030612,
.act = 0x12040908,
.autoref = 0x25550000,
.selfref = 0x00059060,
.modereg = 0x20250782,
},
{ // 400MHz
.cas = 0x00000005,
.pch = 0x00000009,
.act = 0x09020505,
.autoref = 0x132b0000,
.selfref = 0x0002d000,
.modereg = 0x00130000,
},
{ // 200MHz
.cas = 0x00000003,
.pch = 0x00000005,
.act = 0x05010303,
.autoref = 0x0a160000,
.selfref = 0x00017000,
.modereg = 0x000a0000,
},
{ // 50MHz
.cas = 0x00000002,
.pch = 0x00000002,
.act = 0x04010202,
.autoref = 0x03050000,
.selfref = 0x00006000,
.modereg = 0x00030000,
}
}
};
static const struct amc_tunable amc_tunables[] = {
{ &rAMC_MCSARBCFG, 0x00000001 },
{ &rAMC_OPIDLETMR, 0x00200000 },
{ &rAMC_OPTMRADJPARAM, 0x20400064 },
{ &rAMC_MIFACTSCH, 0x00000001 },
{ &rAMC_MIFCASSCH_FREQ(0), 0x10000010 },
{ &rAMC_PSQRQCTL0, 0xff010110 },
{ &rAMC_PSQRQCTL1, 0x00001700 },
{ &rAMC_PSQRQTIMER0, 0x00000040 },
{ &rAMC_PSQRQTIMER1, 0x00000014 },
{ &rAMC_PSQRQTIMER2, 0x00000040 },
{ &rAMC_PSQRQBRST, 0x04100410 },
{ &rAMC_PSQRQSCHCRD, 0x00101400 },
{ &rAMC_PSQWQCTL0, 0x00010100 },
#if DISPLAY_D600_TUNABLES
{ &rAMC_PSQWQCTL1, 0x00000bd4 },
#else
{ &rAMC_PSQWQCTL1, 0x00000158 },
#endif
{ &rAMC_PSQWQBRST, 0x04080410 },
{ &rAMC_PSQWQSCHCRD, 0x00101400 },
{ &rAMC_MCUQOSLLT, 0x0000011f },
#if DISPLAY_D600_TUNABLES
{ &rAMC_PWRMNGTPARAM, 0x0c003000 },
#else
{ &rAMC_PWRMNGTPARAM, 0x01803000 },
#endif
};
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/*
* Copyright (C) 2013 Apple Inc. All rights reserved.
*
* This document is the property of Apple Computer, Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_ASPNANDCONFIG_H
#define __TARGET_ASPNANDCONFIG_H
//MLC devices
#define ASPNAND_MLC_WRITE_DIES_IN_PARALLEL 4
#define ASPNAND_SLC_WRITE_DIES_IN_PARALLEL 4
#define ASPNAND_ERASE_DIES_IN_PARALLEL 8
#define ASPNAND_READ_DIES_IN_PARALLEL 4
#define ASPNAND_MLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_READ_LOW_POWER_DIES_IN_PARALLEL 2
//TLC devices
#define ASPNAND_TLC_TLC_WRITE_DIES_IN_PARALLEL 8
#define ASPNAND_TLC_SLC_WRITE_DIES_IN_PARALLEL 8
#define ASPNAND_TLC_ERASE_DIES_IN_PARALLEL 4
#define ASPNAND_TLC_READ_DIES_IN_PARALLEL 4
#define ASPNAND_TLC_TLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_TLC_SLC_WRITE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_TLC_ERASE_LOW_POWER_DIES_IN_PARALLEL 2
#define ASPNAND_TLC_READ_LOW_POWER_DIES_IN_PARALLEL 2
// rdar://problem/18371949 - these values should be the same for post-OkemoTaos targets
#define ASPNAND_INDIRECTION_MEMORY (4*1024*1024)
#define ASPNAND_LEGACY_INDIRECTION_MEMORY (4*1024*1024)
#endif
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/*
* Copyright (C) 2013 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef TARGET_BOARDID_H
#define TARGET_BOARDID_H
#define TARGET_BOARD_ID_J96AP (8)
#define TARGET_BOARD_ID_J96DEV (9)
#define TARGET_BOARD_ID_J97AP (10)
#define TARGET_BOARD_ID_J97DEV (11)
#endif
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/*
* Copyright (C) 2013 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_GPIODEF_H
#define __TARGET_GPIODEF_H
/* ipad5,x specific gpio -> pin mappings */
#include <platform/gpio.h>
/* define target-specific gpios in a generic fashion here. */
/* Board Revision */
#define GPIO_BOARD_REV0 GPIO( 14, 2) // 118 : GPIO[8]
#define GPIO_BOARD_REV1 GPIO( 14, 3) // 117 : GPIO[9]
#define GPIO_BOARD_REV2 GPIO( 14, 4) // 116 : GPIO[10]
/* Miscellaneous Pins */
#define GPIO_PMU_LCD_PWR_EN (17)
/* Ringer Switch */
#define GPIO_RINGER_AB GPIO( 5 , 7) // 131 : GPIO[4] -> gpio_btn_srl_l
/* D2207 watchdog tickle, 'KEEPACT' */
#define GPIO_WDOG_TICKLE GPIO( 6, 7) // 55 : GPIO[20] -> gpio_soc2pmu_keepact
/* which IICs to initialize */
#define IICS_MASK (0xD)
#define TRISTAR_IIC_BUS (0)
#define BACKLIGHT_IIC_BUS (0)
#endif /* ! __TARGET_GPIODEF_H */
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/*
* Copyright (C) 2014 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef LPDP_SETTINGS_H
#define LPDP_SETTINGS_H
static struct lpdp_port_calibration lpdp_port_calibration_table[1][1] = {
{ {LPDP_PHY_LANE_VREG_ADJ_280_mV, 0}, },
};
#define LPDP_PORT_CALIBRATION_TABLE_FIXED (true)
#endif
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#ifndef __TARGET_POWERCONFIG_H
#define __TARGET_POWERCONFIG_H
/* configuration per target */
#define PMU_IIC_BUS 0
/* this configuration is very PMU specific and must be included exactly once in power.c */
#ifdef POWERCONFIG_PMU_SETUP
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
{
};
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
{
{ PMU_IIC_BUS, kD2207_HIBERNATE6, 0x22 }, // DVDD must be on <rdar://problem/20080758>
};
static const struct pmu_setup_struct pmu_warm_init[] =
{
};
static const struct pmu_setup_struct pmu_cold_init[] =
{
/* <rdar://problem/14957338> J96-J97 IO spreadsheet tracker */
#if TARGET_HAS_BASEBAND
{ PMU_IIC_BUS, kD2207_GPIO5, 0x09}, // PMU_GPIO_PMU2BBPMU_RST_L Out 0, Push-Pull, VBUCK3
#else
{ PMU_IIC_BUS, kD2207_GPIO5, 0xB9}, // PMU_GPIO_PMU2BBPMU_RST_L In, R Edge, PD
#endif
{ PMU_IIC_BUS, kD2207_GPIO6, 0xDA}, // UART5_BATT_TRXD In, F Edge, Wake, PD
{ PMU_IIC_BUS, kD2207_GPIO7, 0xBA}, // PMU_GPIO_BT_HOST_WAKE In, R Edge, Wake, PD
{ PMU_IIC_BUS, kD2207_GPIO8, 0x7B}, // PMU_GPIO_WLAN_HOST_WAKE In, Hi level, Wake, PD
#if TARGET_HAS_BASEBAND
{ PMU_IIC_BUS, kD2207_GPIO9, 0x8A}, // PMU_GPIO_BB2PMU_HOST_WAKE In, Active low, Wake, PU, VBUCK3
#else
{ PMU_IIC_BUS, kD2207_GPIO9, 0xB9}, // PMU_GPIO_BB2PMU_HOST_WAKE In, R Edge, PD
#endif
{ PMU_IIC_BUS, kD2207_GPIO10, 0xEA}, // PMU_GPIO_CODEC_HS_INT_L In, Any Edge, Wake, PU, VBUCK3
{ PMU_IIC_BUS, kD2207_GPIO11, 0xFA}, // PMU_GPIO_MB_HALL0_IRQ In, Any Edge, Wake, No PU
{ PMU_IIC_BUS, kD2207_GPIO12, 0x7B}, // GPIO_TS2SOC2PMU_INT In, Hi level, Wake, PD
{ PMU_IIC_BUS, kD2207_GPIO13, 0xF8}, // PMU_GPIO_MB_HALL1_IRQ In, Any Edge, NoWake, No PU
{ PMU_IIC_BUS, kD2207_GPIO14, 0xB8}, // PMU_GPIO_WLAN2PMU_PCIE_WAKE_L In, R Edge, PU
{ PMU_IIC_BUS, kD2207_GPIO16, 0x7B}, // PMU_GPIO_OSCAR2PMU_HOST_WAKE In, Hi level, Wake, PD
{ PMU_IIC_BUS, kD2207_GPIO21, 0xF8}, // PMU_GPIO_MB_HALL2_IRQ In, Any Edge, NoWake, No PU
{ PMU_IIC_BUS, kD2207_BUCK_DWI_CTRL0, 0x23}, // enable DWI for BUCK0, BUCK1, BUCK5
{ PMU_IIC_BUS, kDIALOG_SYS_CONTROL2, 0x11}, // DWI_EN HIB_32K (for WiFi/BT) <rdar://problem/16257601>
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_ENA}, // enable TEST Access
{ PMU_IIC_BUS, kD2207_PRE_UVLO_CONF, 0x06}, // SOCHOT0 save power in sleep, disable pull-up <rdar://21643083>
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_DIS}, // disable TEST Access
};
static const struct pmu_setup_struct pmu_backlight_enable[] =
{
{ PMU_IIC_BUS, kDIALOG_WLED_ISET, 0xD4 }, // 50% value from OS
{ PMU_IIC_BUS, kDIALOG_WLED_ISET2, 0x00 },
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, // enable all LED strings
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
{ PMU_IIC_BUS, kDIALOG_WLED_OPTIONS, // enable LED Power
(kDIALOG_WLED_CONTROL2_WLED_RAMP_EN |
kDIALOG_WLED_CONTROL2_WLED_DITH_EN) }
};
static const struct pmu_setup_struct pmu_backlight_disable[] =
{
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, 0x0 } // disable LED power
};
static const struct core_rails_struct soc_rails[] =
{
{ PMU_IIC_BUS, 0, kD2207_BUCK5_VSEL }
};
static const struct core_rails_struct cpu_rails[] =
{
{ PMU_IIC_BUS, 0, kD2207_BUCK0_VSEL }
};
static const struct core_rails_struct ram_rails[] =
{
{ PMU_IIC_BUS, 0, kD2207_BUCK2_VSEL }
};
#define TARGET_USE_CHARGE_TABLE 1
static const struct power_charge_limits pmu_charge_table[16] = {
{ 4100, 1000, 1500, 1004 }, // 10 - 15C
{ 4200, 1000, 1500, 1004 },
{ USHRT_MAX, 1000, 1500, 1004 },
{ 4100, 1500, 2000, 2509 }, // 15 - 20C
{ 4200, 1500, 2000, 2007 },
{ USHRT_MAX, 1500, 2000, 1004 },
{ 4100, 2000, 4500, 2509 }, // 20 - 45C
{ 4200, 2000, 4500, 2509 },
{ USHRT_MAX, 2000, 4500, 2007 },
};
#endif /* POWERCONFIG_PMU_SETUP */
#define NO_BATTERY_VOLTAGE 2700
#define MIN_BOOT_BATTERY_VOLTAGE 3600
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
#define TARGET_BOOT_BATTERY_CAPACITY 60
#define PRECHARGE_BACKLIGHT_LEVEL 824
#define ALWAYS_BOOT_BATTERY_VOLTAGE (TARGET_BOOT_BATTERY_VOLTAGE + 100)
#define TARGET_PRECHARGE_ALWAYS_DISPLAY_IDLE 1
#define TARGET_MAX_USB_INPUT_CURRENT 2400
#define ACC_PWR_LDO (6)
#define GASGAUGE_BATTERYID_BLOCK 1
// no charge table
#endif
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/*
* Copyright (C) 2013-2014 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_UARTCONFIG_H
#define __TARGET_UARTCONFIG_H
/* define one debug serial ports */
#define DEBUG_SERIAL_PORT (0)
#define HDQGAUGE_SERIAL_PORT (5)
#if SUPPORT_FPGA
#define UART_OVERSAMPLE_OVERRIDE (11)
#endif
#endif
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/*
* Copyright (C) 2013-2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#include <debug.h>
#include <drivers/apple/gpio.h>
#include <drivers/iic.h>
#include <drivers/power.h>
#include <lib/env.h>
#include <lib/mib.h>
#include <lib/syscfg.h>
#include <platform.h>
#include <platform/gpiodef.h>
#include <platform/soc/chipid.h>
#include <target.h>
#include <drivers/display.h>
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
#include <drivers/displayport/displayport.h>
#endif
#include <platform/soc/chipid.h>
// Board ids
// pick up these defines from boardid.h
#define J96_AP_BOARD_ID TARGET_BOARD_ID_J96AP
#define J96_DEV_BOARD_ID TARGET_BOARD_ID_J96DEV
#define J97_AP_BOARD_ID TARGET_BOARD_ID_J97AP
#define J97_DEV_BOARD_ID TARGET_BOARD_ID_J97DEV
// Board revs
// the following apply to both j96 and j97
#define J96_DEV1_BOARD_REV (0x7)
#define J96_DEV2_BOARD_REV (0x5)
#define J96_DEV3_BOARD_REV (0x4)
#define J96_DEV3a_BOARD_REV (0x3)
#define J96_DEV4_BOARD_REV (0x2) // 1GB -> 2GB migration
#define J96_PROTO0_BOARD_REV (0x7)
#define J96_PROTO0b_BOARD_REV (0x6)
#define J96_PROTO1_BOARD_REV (0x5)
#define J96_PROTO1a_BOARD_REV (0x4)
#define J96_PROTO2_BOARD_REV (0x3)
#define J96_EVT_BOARD_REV (0x2)
#define J96_DVT_BOARD_REV (0x1)
#define J96_DVT_2GB_BOARD_REV (0x0)
#define T7000_2GB_SOC_PID (0x2)
static uint32_t ipad5_get_board_rev(void);
static bool gpio_board_rev_valid;
static uint32_t gpio_board_rev;
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
static dp_t dp;
#endif
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 2);
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 0);
static uint32_t ipad5_get_board_rev(void)
{
if (!gpio_board_rev_valid) {
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PUP);
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PUP);
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PUP);
spin(100); // Wait 100us
gpio_board_rev =
(gpio_read(GPIO_BOARD_REV2) << 2) |
(gpio_read(GPIO_BOARD_REV1) << 1) |
(gpio_read(GPIO_BOARD_REV0) << 0);
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
gpio_board_rev_valid = true;
}
return gpio_board_rev;
}
static bool board_type_preproto(void) {
bool preproto = false;
const uint32_t rev = ipad5_get_board_rev();
if (target_config_dev()) {
if (rev > J96_DEV2_BOARD_REV)
preproto = true;
} else if (target_config_ap()) {
if (rev > J96_PROTO0b_BOARD_REV)
preproto = true;
}
return preproto;
}
static bool board_type_proto(void) {
bool proto = false;
const uint32_t rev = ipad5_get_board_rev();
if (target_config_dev()) {
if (rev > J96_DEV3_BOARD_REV)
proto = true;
} else if (target_config_ap()) {
if (rev > J96_PROTO1_BOARD_REV)
proto = true;
}
return proto;
}
static bool board_type_proto1(void) {
bool proto1 = false;
const uint32_t rev = ipad5_get_board_rev();
if (target_config_dev()) {
if (rev > J96_DEV3a_BOARD_REV)
proto1 = true;
} else if (target_config_ap()) {
if (rev > J96_PROTO1a_BOARD_REV)
proto1 = true;
}
return proto1;
}
static bool support_hall0(void){
bool support = true;
const uint32_t rev = ipad5_get_board_rev();
if (target_config_ap()) {
if ((rev == J96_PROTO1_BOARD_REV) || (rev == J96_PROTO1a_BOARD_REV))
support = false;
}
return support;
}
static void check_board_supported(void)
{
bool supported = true;
// as of june 2015, j96/j97 is moving to 2GB RAM...obsolete the rest
// differentiated by the fues0 PID values of 2
if ( chipid_get_pid() != T7000_2GB_SOC_PID )
{
supported = false;
dprintf(DEBUG_INFO, "%s-%d (chipid_get_pid()=0x%x, T7000_2GB_SOC_PID=0xx%x) \n",
__FUNCTION__, __LINE__ ,chipid_get_pid(), T7000_2GB_SOC_PID );
}
if ( !supported)
platform_not_supported();
}
void target_early_init(void)
{
#if PRODUCT_LLB || PRODUCT_IBSS
pmgr_update_dvfm(platform_get_board_id(),ipad5_get_board_rev());
pmgr_update_gfx_states(platform_get_board_id(),ipad5_get_board_rev());
#endif
check_board_supported();
}
void target_late_init(void)
{
if(board_type_preproto() || board_type_proto())
platform_not_supported();
}
void target_init(void)
{
#if WITH_HW_FLASH_NOR
flash_nor_init(SPI_NOR0);
#endif
}
void target_quiesce_hardware(void)
{
}
void target_poweroff(void)
{
}
int target_bootprep(enum boot_target target)
{
return 0;
}
bool target_should_recover(void)
{
return platform_get_request_dfu2() && power_has_usb();
}
bool target_should_poweron(bool *cold_button_boot)
{
#if WITH_HW_POWER
if (power_get_boot_flag() == kPowerBootFlagColdButton) *cold_button_boot = true;
#else
*cold_button_boot = false;
#endif // WITH_HW_POWER
return !*cold_button_boot || platform_get_request_dfu1();
}
bool target_should_poweroff(bool at_boot)
{
return platform_get_request_dfu1() && (!at_boot || !power_has_usb());
}
#if APPLICATION_IBOOT
void target_watchdog_tickle(void)
{
uint32_t value = gpio_read(GPIO_WDOG_TICKLE);
gpio_write(GPIO_WDOG_TICKLE, value ^ 1);
}
#endif // APPLICATION_IBOOT
void * target_get_display_configuration(void)
{
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
dp.mode = 0x1;
dp.type = 0x1;
dp.min_link_rate = 0x6;
dp.max_link_rate = 0x6;
dp.lanes = 0x4;
dp.ssc = 0x0;
dp.alpm = 0x0;
dp.vrr_enable = 0x0;
dp.vrr_on = 0x0;
dp.rx_n1= 0x0;
dp.rx_n2= 0x0;
dp.rx_n3= 0x0;
dp.rx_n5= 0x0;
dp.fast_link_training = true;
return ((void *)(&dp));
#else
return NULL;
#endif
}
#if WITH_ENV
void target_setup_default_environment(void)
{
// boot-device is set in platform's init.c
env_set("display-color-space","RGB888", 0);
env_set("display-timing", "ipad5", 0);
}
#endif
#if WITH_DEVICETREE
int target_update_device_tree(void)
{
#if WITH_HW_DISPLAY_EDP
DTNode *clcd_node = NULL, *backlight_node = NULL, *lcd_node = NULL;
DTNode *lpdp_node = NULL;
DTNode *node;
#endif
uint32_t propSize;
char *propName, *propNamePOR;
void *propData;
#if WITH_HW_DISPLAY_EDP
if (FindNode(0, DP_DTPATH, &node)) {
extern int edp_update_device_tree(DTNode *edp_node, DTNode *lcd_node, DTNode *clcd_node, DTNode *backlight_node);
FindNode(0, "arm-io/disp0", &clcd_node);
FindNode(0, DP_DTPATH "/lcd", &lcd_node);
FindNode(0, "backlight", &backlight_node);
edp_update_device_tree(node, lcd_node, clcd_node, backlight_node);
extern int lpdp_phy_update_device_tree(DTNode *lpdp_node);
FindNode(0, DPPHY_DTPATH, &lpdp_node);
lpdp_phy_update_device_tree(lpdp_node);
}
#endif
// Update the codec node with acoustic transducer scale data
{
uint8_t atscData[20];
if (syscfgCopyDataForTag('ATSc', atscData, sizeof(atscData)) > 0) {
// Update codec
if (FindNode(0, "arm-io/spi2/audio-codec", &node)) {
propName = "at-scale-imic";
if (FindProperty(node, &propName, &propData, &propSize)) {
memcpy(propData, &atscData[0], sizeof(uint32_t));
}
propName = "at-scale-smic";
if (FindProperty(node, &propName, &propData, &propSize)) {
memcpy(propData, &atscData[4], sizeof(uint32_t));
}
}
}
}
if (board_type_proto1()) {
if (FindNode(0, "arm-io/uart7/oscar", &node)) {
propName = "function-oscar_power1_proto1";
propNamePOR = "function-oscar_power1";
if (FindProperty(node, &propName, &propData, &propSize) &&
FindProperty(node, &propNamePOR, &propData, &propSize)) {
strlcpy(propName, "function-oscar_power1", kPropNameLength);
propNamePOR[0] = '~';
}
}
}
// Update the speaker calibration data
if (FindNode(0, "arm-io/i2c2/audio-speaker0", &node)) {
propName = "speaker-calib";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('SpCl', propData, propSize);
}
}
// Update the als calibration data for all nodes that may be present
if (FindNode(0, "arm-io/i2c3/als1", &node)) {
propName = "alsCalibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('LSCI', propData, propSize);
}
}
if (FindNode(0, "arm-io/i2c3/als2", &node)) {
propName = "alsCalibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('LSCI', propData, propSize);
}
}
// Update the backlight calibration data
if (FindNode(0, "backlight", &node)) {
propName = "backlight-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('BLCl', propData, propSize);
}
}
// Update the compass calibration data
if (FindNode(0, "arm-io/uart7/oscar/compass", &node)) {
propName = "compass-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('CPAS', propData, propSize);
}
propName = "compass-orientation";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('CRot', propData, propSize);
}
}
// Update the gyro calibration data
if (FindNode(0, "arm-io/uart7/oscar/gyro", &node)) {
propName = "gyro-orientation";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GRot', propData, propSize);
}
propName = "gyro-sensitivity-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GSCl', propData, propSize);
}
propName = "gyro-temp-table";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GYTT', propData, propSize);
}
propName = "gyro-interrupt-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GICl', propData, propSize);
}
}
// Update accelerometer calibration data
if (FindNode(0, "arm-io/uart7/oscar/accelerometer", &node)) {
propName = "accel-orientation";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('ARot', propData, propSize);
}
propName = "low-temp-accel-offset";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('LTAO', propData, propSize);
}
propName = "accel-sensitivity-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('ASCl', propData, propSize);
}
propName = "accel-interrupt-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('AICl', propData, propSize);
}
}
// Update pressure sensor calibration data
if (FindNode(0, "arm-io/uart7/oscar/pressure", &node)) {
propName = "pressure-offset-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('SPPO', propData, propSize);
}
}
return 0;
}
#endif // WITH_DEVICETREE
#if WITH_PAINT
// The default background is expected to to be black and the artwork is expected
// to be white. This arrangement will be inverted depending upon the cover glass
// color of the device.
// Sample DClr_override values for testing devices without DClr syscfg entries (enclosure/cover glass):
// gray/black: setenv DClr_override 000200009B9899003C3B3B0000000000
// silver/white: setenv DClr_override 00020000D8D9D700E3E4E10000000000
static color_policy_invert_t target_cover_glass_color_table[] = {
{ RGB( 59, 59, 60), false }, // Black - black background, white logo
{ RGB(225, 228, 227), true }, // White - white background, black logo
};
color_policy_t *target_color_map_init(enum colorspace cs, color_policy_t *color_policy)
{
// Must have a color policy structure passed in.
if (color_policy == NULL)
goto fail;
// We only support the RGB888 colorspace.
if (cs != CS_RGB888)
goto fail;
color_policy->policy_type = COLOR_MAP_POLICY_INVERT;
color_policy->color_table = (void *)target_cover_glass_color_table;
color_policy->color_count = ARRAY_SIZE(target_cover_glass_color_table);
color_policy->map_color = NULL; // Use standard remapper
return color_policy;
fail:
return NULL;
}
#endif // WITH_PAINT
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/*
* Copyright (C) 2012 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#include <debug.h>
#include <target.h>
#include <target/powerconfig.h>
#if WITH_DEVICETREE
bool
target_get_property(enum target_property prop, void *data, int maxdata, int *retlen)
{
int length = 0;
bool result = false;
if ((result = target_get_property_base(prop, data, maxdata, retlen)) == false) {
switch(prop) {
case TARGET_PROPERTY_RESTORE_BACKLIGHT_LEVEL:
// fix the restore backlight level at the precharge level,
// to make sure the backlight does not cause the battery to
// drain during restore
if (maxdata >= (ssize_t)sizeof(uint32_t)) {
result = true;
length = sizeof(uint32_t);
*(uint32_t *)data = PRECHARGE_BACKLIGHT_LEVEL;
}
break;
default:
break;
}
}
if (retlen != NULL) *retlen = length;
return result;
}
#endif
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# Copyright (C) 2013 Apple Inc. All rights reserved.
#
# This document is the property of Apple Inc.
# It is considered confidential and proprietary.
#
# This document may not be reproduced or transmitted in any form,
# in whole or in part, without the express written permission of
# Apple Inc.
#
LOCAL_DIR := $(GET_LOCAL_DIR)
TARGET_DIR := $(LOCAL_DIR)
OPTIONS += \
DIALOG_D2207=1 \
TARGET_BOOT_CPU_VOLTAGE=CHIPID_CPU_VOLTAGE_V2 \
TARGET_BOOT_RAM_VOLTAGE=0 \
TARGET_BOOT_SOC_VOLTAGE=CHIPID_SOC_VOLTAGE_VMIN \
TARGET_HAS_BASEBAND=$(TARGET_HAS_BASEBAND) \
TARGET_SPARE0_CLK_CFG=0x80000004 \
TARGET_VID0_CLK_CFG=0x81100000 \
TARGET_CORE_PHY_TMR_LPCLK_CFG=0x00330087 \
TARGET_CORE_PHY_TMR_CFG=0x256f0000 \
TARGET_PHY_STOP_WAIT_TIME=0x28 \
DISPLAY_LANDSCAPE_IPAD_TUNABLES=1 \
PMU_LCD_PWR_EN=1 \
AMC_NUM_CHANNELS=2 \
AMC_NUM_RANKS=1 \
TARGET_DWI_FREQUENCY=24000000 \
TARGET_DWI_TRANSFER_GAP_US=2.5 \
BUCK_CPU=0 \
BUCK_SOC=2 \
BUCK_GPU=1 \
MULTITOUCH_DTPATH=\"arm-io/spi1/multi-touch\" \
WIFI_DTPATH=\"arm-io/uart2/wlan\" \
BT_DTPATH=\"arm-io/uart1/bluetooth\" \
DPPHY_DTPATH=\"arm-io/lpdp-phy\" \
DP_DTPATH=\"arm-io/displayport\" \
TARGET_DDR_792M=1 \
WITH_TARGET_AMC_PARAMS=1
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
ALL_OBJS += $(LOCAL_DIR)/init.o \
$(LOCAL_DIR)/pinconfig.o
ifneq ($(PRODUCT),LLB)
ALL_OBJS += \
$(LOCAL_DIR)/properties.o
endif