first and last commit
This commit is contained in:
Chris Nutter committed
commit
1bf4efd552
2612 files changed
+636500
No files matched your search
@@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_GPIODEF_H
|
||||
#define __TARGET_GPIODEF_H
|
||||
|
||||
/* iPhone5,x specific gpio -> pin mappings */
|
||||
|
||||
#include <platform/gpio.h>
|
||||
|
||||
/* define target-specific gpios in a generic fashion here. */
|
||||
|
||||
#define GPIO_LCD_RST GPIO(25, 2)
|
||||
#define GPIO_LCD_RST_POLARITY (0)
|
||||
#define GPIO_LCD_CHKSUM GPIO( 4, 7)
|
||||
|
||||
#define GPIO_RINGER_AB GPIO( 0, 4)
|
||||
|
||||
/* Board Revision */
|
||||
#define GPIO_BOARD_REV0 GPIO( 2, 4)
|
||||
#define GPIO_BOARD_REV1 GPIO( 2, 5)
|
||||
#define GPIO_BOARD_REV2 GPIO( 2, 6)
|
||||
#define GPIO_BOARD_REV3 GPIO( 2, 7)
|
||||
|
||||
/* Grape ID */
|
||||
#define GPIO_GRAPE_ID0 GPIO( 1, 5)
|
||||
#define GPIO_GRAPE_ID1 GPIO( 1, 4)
|
||||
#define GPIO_GRAPE_ID2 GPIO( 1, 3)
|
||||
|
||||
/* which IICs to initialize */
|
||||
#define IICS_MASK (7)
|
||||
|
||||
#define TRISTAR_IIC_BUS (0)
|
||||
|
||||
/* D1972 watchdog tickle, 'KEEPACT' */
|
||||
#define GPIO_WDOG_TICKLE GPIO(2, 3)
|
||||
|
||||
// Configure both FMI0 & FMI1 to use differential DQS with DQ set to DQVREF
|
||||
#define FMI_DIFF_SEL (0x36)
|
||||
|
||||
#endif /* ! __TARGET_GPIODEF_H */
|
||||
@@ -0,0 +1,92 @@
|
||||
|
||||
// Copyright (C) 2008-2010 Apple, Inc. All rights reserved.
|
||||
//
|
||||
// This document is the property of Apple, Inc.
|
||||
// It is considered confidential and proprietary.
|
||||
//
|
||||
// This document may not be reproduced or transmitted in any form,
|
||||
// in whole or in part, without the express written permission of
|
||||
// Apple, Inc.
|
||||
//
|
||||
// NOTE: This is a generated file and should not be hand-edited!
|
||||
//
|
||||
|
||||
// =============================================================================
|
||||
// Nand Geometry Table
|
||||
|
||||
static NandGeometry _nandGeometryTable[] =
|
||||
{
|
||||
};
|
||||
|
||||
// =============================================================================
|
||||
// Nand Timing Table
|
||||
|
||||
static NandTiming _nandTimingTable[] =
|
||||
{
|
||||
};
|
||||
|
||||
#if (defined (AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
|
||||
// =============================================================================
|
||||
// NandChipId Description
|
||||
const NandChipIdDescription _nandChipIdDescriptionTable[] =
|
||||
{
|
||||
};
|
||||
|
||||
// =============================================================================
|
||||
// Nand Description Table
|
||||
|
||||
static const NandDescription _nandDescriptionTable[] =
|
||||
{
|
||||
};
|
||||
const UInt32 _nandDescriptionTableSize = sizeof(_nandDescriptionTable) / sizeof(NandDescription);
|
||||
|
||||
#endif // (defined(AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
|
||||
|
||||
// =============================================================================
|
||||
// Nand Board Support Table
|
||||
|
||||
static NandBoardSupport _nandBoardSupportTable[] =
|
||||
{
|
||||
};
|
||||
|
||||
// =============================================================================
|
||||
// Nand Board Timing Table
|
||||
|
||||
static NandBoardInfo _nandBoardInfo =
|
||||
{
|
||||
/* controlDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
/* dataDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
/* chipEnableDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
|
||||
|
||||
/* socToNandRiseNanosecs */ 10,
|
||||
/* socToNandFallNanosecs */ 10,
|
||||
/* nandToSocRiseNanosecs */ 10,
|
||||
/* nandToSocFallNanosecs */ 10,
|
||||
|
||||
/* landing map */
|
||||
{
|
||||
0x00000101
|
||||
},
|
||||
|
||||
/* useToggleMode */ TRUE32,
|
||||
/* useDiffDQSMode */ FALSE32,
|
||||
/* useDiffREMode */ FALSE32,
|
||||
/* useVref */ TRUE32,
|
||||
/* useSingleHostChannel */ FALSE32,
|
||||
/* allowSingleChipEnable */ TRUE32
|
||||
};
|
||||
|
||||
static NandFormat _nandFormatPpn =
|
||||
{
|
||||
/* metaPerLogicalPage */ 16,
|
||||
/* validMetaPerLogicalPage */ 16,
|
||||
/* logicalPageSize */ 4096
|
||||
};
|
||||
|
||||
static NandFormat _nandFormatRaw =
|
||||
{
|
||||
/* metaPerLogicalPage */ 12,
|
||||
/* validMetaPerLogicalPage */ 10,
|
||||
/* logicalPageSize */ 0
|
||||
};
|
||||
|
||||
@@ -0,0 +1,376 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2014 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
/* Default iPhone5,x SoC Pin Configuration */
|
||||
|
||||
#if PIN_CFG_AP
|
||||
#define HI_DRIVE_STR DRIVE_X4
|
||||
#elif PIN_CFG_DEV
|
||||
#define HI_DRIVE_STR DRIVE_X6
|
||||
#endif
|
||||
|
||||
#define BB_UART_DRIVE_STR DRIVE_X2
|
||||
#define BT_UART_DRIVE_STR DRIVE_X2
|
||||
#define DOCK_UART_DRIVE_STR DRIVE_X2
|
||||
#define SWI_UART_DRIVE_STR DRIVE_X1
|
||||
#define WIFI_UART_DRIVE_STR DRIVE_X2
|
||||
#define FMI_LO_SPEED_DRIVE_STR (DRIVE_X2 | SLOW_SLEW)
|
||||
#define FMI_HI_SPEED_DRIVE_STR (DRIVE_X2 | SLOW_SLEW)
|
||||
#define GRAPE_IO_DRIVE_STR DRIVE_X1
|
||||
#define GRAPE_CLK_DRIVE_STR DRIVE_X2
|
||||
#define DWI_DRIVE_STR DRIVE_X2
|
||||
#define I2C_DRIVE_STR DRIVE_X1
|
||||
#define I2S_DRIVE_STR DRIVE_X2
|
||||
#define CAM_I2C_DRIVE_STR DRIVE_X1
|
||||
#define CAM_STROBE_DRIVE_STR DRIVE_X1
|
||||
#define CAM_CLK_DRIVE_STR DRIVE_X2
|
||||
|
||||
#define DISABLE_OPTIONAL_SIGNALS (1)
|
||||
|
||||
#if PIN_CFG_AP
|
||||
static const uint32_t gpio_default_cfg_ap[GPIO_GROUP_COUNT * GPIOPADPINS] = {
|
||||
#elif PIN_CFG_DEV
|
||||
static const uint32_t gpio_default_cfg_dev[GPIO_GROUP_COUNT * GPIOPADPINS] = {
|
||||
#endif
|
||||
/* Port 0 */
|
||||
CFG_IN, // GPIO0 -> MENU_KEY_BUFF_L (REQUEST_DFU2)
|
||||
CFG_IN, // GPIO1 -> HOLD_KEY_BUFF_L (REQUEST_DFU1)
|
||||
CFG_IN | PULL_UP, // GPIO2 -> VOL_UP_L
|
||||
CFG_IN | PULL_UP, // GPIO3 -> VOL_DWN_L
|
||||
CFG_IN, // GPIO4 -> RINGER_A
|
||||
CFG_IN | PULL_UP, // GPIO5 -> SPKAMP_INT_L
|
||||
CFG_IN | PULL_UP, // GPIO6 -> PMU_IRQ_L
|
||||
CFG_OUT_0, // GPIO7 -> BT_WAKE
|
||||
|
||||
/* Port 1 */
|
||||
CFG_IN, // GPIO8 -> BB_PMU_FET_ON
|
||||
CFG_OUT_0, // GPIO9 -> BEE_GEES
|
||||
CFG_IN, // GPIO10 -> BB_HSIC1_REMOTE_WAKE
|
||||
CFG_IN | PULL_UP, // GPIO11 -> WLAN_SDIO_DATA[2]
|
||||
CFG_IN | PULL_UP, // GPIO12 -> WLAN_SDIO_DATA[1]
|
||||
CFG_IN | PULL_UP, // GPIO13 -> WLAN_SDIO_DATA[0]
|
||||
CFG_IN, // GPIO14 -> WLAN_SDIO_CMP
|
||||
CFG_IN, // GPIO15 -> WLAN_SDIO_CLK
|
||||
|
||||
/* Port 2 */
|
||||
CFG_DISABLED, // GPIO16 -> BOARD_ID[3]
|
||||
CFG_OUT_0, // GPIO17 -> AP_HSIC1_RDY
|
||||
CFG_DISABLED, // GPIO18 -> BOOT_CONFIG[0]
|
||||
CFG_OUT_0, // GPIO19 -> KEEPACT
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[0] -> BOARD_REV0
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[1] -> BOARD_REV1
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[2] -> BOARD_REV2
|
||||
CFG_DISABLED, // EHCI_PORT_PWR[3] -> BOARD_REV3
|
||||
|
||||
/* Port 3 */
|
||||
CFG_IN | BB_UART_DRIVE_STR, // UART1_TXD -> UART1_TXD
|
||||
CFG_FUNC0, // UART1_RXD -> UART1_RXD
|
||||
CFG_FUNC0 | BB_UART_DRIVE_STR, // UART1_RTSN -> UART1_RTS_L
|
||||
CFG_FUNC0, // UART1_CTSN -> UART1_CTS_L
|
||||
CFG_FUNC0 | DOCK_UART_DRIVE_STR, // UART2_TXD -> UART2_TXD
|
||||
CFG_FUNC0, // UART2_RXD -> UART2_RXD
|
||||
CFG_IN | PULL_DOWN, // UART2_RTSN -> ACCEL_INT1
|
||||
CFG_IN, // UART2_CTSN -> TRISTAR_INT
|
||||
|
||||
/* Port 4 */
|
||||
CFG_FUNC0 | BT_UART_DRIVE_STR, // UART3_TXD -> UART3_TXD
|
||||
CFG_FUNC0, // UART3_RXD -> UART3_RXD
|
||||
CFG_OUT_1 | BT_UART_DRIVE_STR, // UART3_RTSN -> UART3_RTS_L
|
||||
CFG_FUNC0, // UART3_CTSN -> UART3_CTS_L
|
||||
CFG_FUNC0 | WIFI_UART_DRIVE_STR, // UART4_TXD/SPI4_MOSI -> UART4_TXD
|
||||
CFG_FUNC0, // UART4_RXD/SPI4_MISO -> UART4_RXD
|
||||
CFG_OUT_0, // UART4_RTSN/SPI4_SCLK -> CAM0_VDDCORE_EN
|
||||
#if PIN_CFG_AP
|
||||
CFG_OUT_0, // UART4_CTSN/SPI4_SSIN -> BB_JTAG_TRST_L
|
||||
#elif PIN_CFG_DEV
|
||||
CFG_IN, // UART4_CTSN/SPI4_SSIN -> LCD_ERSTB_L
|
||||
#else
|
||||
#error "unknown config"
|
||||
#endif
|
||||
|
||||
/* Port 5 */
|
||||
CFG_FUNC0 | DOCK_UART_DRIVE_STR, // UART6_TXD -> UART6_TXD
|
||||
CFG_FUNC0, // UART6_RXD -> UART6_RXD
|
||||
CFG_OUT_0, // UART6_RTSN -> SPKAMP_RESET_L
|
||||
CFG_IN | PULL_DOWN, // UART6_CTSN -> BB_PP_SYNC
|
||||
CFG_FUNC1 | SWI_UART_DRIVE_STR, // UART5_RXD/UART5_RTXD -> UART5_RXD
|
||||
CFG_IN | PULL_DOWN, // UART5_TXD -> BB_RESET_DET_L
|
||||
CFG_FUNC0 | GRAPE_CLK_DRIVE_STR, // SPI1_SCLK -> SPI1_SCLK
|
||||
CFG_FUNC0 | GRAPE_IO_DRIVE_STR, // SPI1_MOSI -> SPI1_MOSI
|
||||
|
||||
/* Port 6 */
|
||||
CFG_FUNC0, // SPI1_MISO -> SPI1_MISO
|
||||
CFG_OUT_0 | GRAPE_IO_DRIVE_STR, // SPI1_SSIN -> SPI1_CS_L
|
||||
CFG_DISABLED, // SPI0_SCLK -> SPI0_SCLK/BOARD_ID[0]
|
||||
CFG_DISABLED, // SPI0_MOSI -> SPI0_MOSI/BOARD_ID[1]
|
||||
CFG_DISABLED, // SPI0_MISO -> SPI0_MISO/BOARD_ID[2]
|
||||
CFG_DISABLED, // SPI0_SSIN -> SPI0_SSIN
|
||||
CFG_OUT_0, // SPI2_SCLK -> AP_HSIC3_RDY
|
||||
CFG_OUT_0, // SPI2_MOSI -> PMU_AMUX_BY_CTRL
|
||||
|
||||
/* Port 7 */
|
||||
CFG_OUT_0, // SPI2_MISO -> PMU_AMUX_AY_CTRL
|
||||
CFG_IN | PULL_UP, // SPI2_SSIN -> DEV_HSIC3_RDY
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SDA -> I2C0_SDA_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SCL -> I2C0_SCL_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SDA -> I2C1_SDA_1V8
|
||||
CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SCL -> I2C1_SCL_1V8
|
||||
CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP0_SDA -> CAM0_I2C_SDA
|
||||
CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP0_SCL -> CAM0_I2C_SCL
|
||||
|
||||
/* Port 8 */
|
||||
CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP1_SDA -> CAM1_I2C_SDA
|
||||
CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP1_SCL -> CAM1_I2C_SCL
|
||||
CFG_DISABLED, // MIPI_VSYNC -> MIPI_VSYNC
|
||||
CFG_FUNC0 | PULL_DOWN, // TMR32_PWM0 -> GYRO_INT2
|
||||
CFG_FUNC0, // TMR32_PWM1 -> VIB_PWM
|
||||
CFG_FUNC0 | GRAPE_IO_DRIVE_STR, // TMR32_PWM2 -> CLK32K_GRAPE_RESET_SOC_L
|
||||
CFG_DISABLED | PULL_DOWN, // SWI_DATA -> SWI_BLCTL
|
||||
CFG_FUNC0, // DWI_DI -> DWI_AP_DI
|
||||
|
||||
/* Port 9 */
|
||||
CFG_FUNC0 | DWI_DRIVE_STR, // DWI_DO -> DWI_AP_DO
|
||||
CFG_FUNC0 | DWI_DRIVE_STR, // DWI_CLK -> DWI_AP_CLK
|
||||
CFG_OUT_0, // SENSOR0_RST -> CAM0_SHUTDOWN
|
||||
CFG_FUNC0 | CAM_CLK_DRIVE_STR, // SENSOR0_CLK -> CAM0_CLK
|
||||
CFG_OUT_0, // SENSOR1_RST -> CAM1_SHUTDOWN
|
||||
CFG_FUNC0 | CAM_CLK_DRIVE_STR, // SENSOR1_CLK -> CAM1_CLK
|
||||
CFG_FUNC0, // CPU0_SWITCH -> CPU0_SWITCH
|
||||
CFG_FUNC0, // CPU1_SWITCH -> CPU1_SWITCH
|
||||
|
||||
/* Port 10 */
|
||||
CFG_OUT_0, // ISP0_PRE_FLASH -> CAM0_TORCH
|
||||
CFG_DISABLED, // ISP0_FLASH -> CLK32K_GRAPE_RESET_L
|
||||
CFG_DISABLED | PULL_DOWN, // ISP1_PRE_FLASH -> ISP1_PRE_FLASH
|
||||
CFG_DISABLED, // ISP1_FLASH ->
|
||||
CFG_FUNC0, // SPI3_MOSI -> CODEC_SPI_DIN
|
||||
CFG_FUNC0, // SPI3_MISO -> CODEC_SPI_DOUT
|
||||
CFG_FUNC0, // SPI3_SCLK -> CODEC_SPI_CLK
|
||||
CFG_OUT_1, // SPI3_SSIN -> CODEC_SPI_CS
|
||||
|
||||
/* Port 11 */
|
||||
CFG_FUNC0, // I2C2_SDA -> I2C2_SDA_3V0
|
||||
CFG_FUNC0, // I2C2_SCL -> I2C2_SCL_3V0
|
||||
CFG_OUT_0, // GPIO_3V0 -> HS3_CONTROL
|
||||
CFG_OUT_0, // GPIO_3V1 -> HS4_CONTROL
|
||||
CFG_FUNC0 | PULL_DOWN, // DP_HPD -> DP_HPD
|
||||
CFG_DISABLED | PULL_DOWN, // LPDP_HPD -> LPDP_HPD
|
||||
CFG_OUT_1, // UART0_TXD -> FLASH_ENABLE
|
||||
CFG_OUT_0, // UART0_RXD -> VIB_PWM_EN
|
||||
|
||||
/* Port 12 */
|
||||
CFG_DISABLED, // TST_CLKOUT -> TST_CLKOUT
|
||||
CFG_DISABLED, // TST_STPCLK -> TST_STPCLK
|
||||
CFG_FUNC0, // WDOG -> PMU_RESET_IN
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 13 */
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 14 */
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 15 */
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 16 */
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_MCK -> I2S0_MCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_LRCK -> I2S0_LRCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_BCLK -> I2S0_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_DOUT -> I2S0_DOUT
|
||||
CFG_FUNC0, // I2S0_DIN -> I2S0_DIN
|
||||
CFG_DISABLED, // I2S1_MCK -> I2S1_MCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_LRCK -> I2S1_LRCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_BCLK -> I2S1_BCLK
|
||||
|
||||
/* Port 17 */
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_DOUT -> I2S1_DOUT
|
||||
CFG_FUNC0, // I2S1_DIN -> I2S1_DIN
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_MCK -> I2S_MCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_LRCK -> I2S2_LRCK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_BCLK -> I2S2_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_DOUT -> I2S2_DOUT
|
||||
CFG_FUNC0, // I2S2_DIN -> I2S2_DIN
|
||||
CFG_DISABLED, // I2S3_MCK -> I2S3_MCLK
|
||||
|
||||
/* Port 18 */
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_LRCK -> I2S3_LRCK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_BCLK -> I2S3_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_DOUT -> I2S3_DOUT
|
||||
CFG_FUNC0, // I2S3_DIN -> I2S3_DIN
|
||||
CFG_DISABLED, // I2S4_MCK -> I2S4_MCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_LRCK -> I2S4_LRCK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_BCLK -> I2S4_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_DOUT -> I2S4_DOUT
|
||||
|
||||
/* Port 19 */
|
||||
CFG_FUNC0, // I2S4_DIN -> I2S4_DIN
|
||||
#if PIN_CFG_DEV
|
||||
CFG_FUNC0, // SPDIF -> SPDIF
|
||||
#else
|
||||
CFG_DISABLED, // SPDIF -> SPDIF
|
||||
#endif
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN3 -> FMI0_CEN3_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN2 -> FMI0_CEN2_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN1 -> FMI0_CEN1_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN0 -> FMI0_CEN0_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CLE -> FMI0_CLE
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_ALE -> FMI0_ALE
|
||||
|
||||
/* Port 20 */
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_REN -> FMI0_RE_N
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_WEN -> FMI0_WE_L
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_DOWN | FMI_HI_SPEED_DRIVE_STR, // FMI0_WENN -> FMI0_RE_P
|
||||
#else
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_WENN -> FMI0_RE_P
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO7 -> FMI0_IO[7]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO6 -> FMI0_IO[6]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO5 -> FMI0_IO[5]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO4 -> FMI0_IO[4]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQS -> FMI0_DQS_P
|
||||
|
||||
/* Port 21 */
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_UP | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQSN -> FMI0_DQS_N
|
||||
#else
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQSN -> FMI0_DQS_N
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO3 -> FMI0_IO[3]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO2 -> FMI0_IO[2]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO1 -> FMI0_IO[1]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO0 -> FMI0_IO[0]
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN7 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN6 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN5 ->
|
||||
|
||||
/* Port 22 */
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN4 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN3 -> FMI1_CEN3_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN2 -> FMI1_CEN2_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN1 -> FMI1_CEN1_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN0 -> FMI1_CEN0_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CLE -> FMI1_CLE
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_ALE -> FMI1_ALE
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_REN -> FMI1_RE_N
|
||||
|
||||
/* Port 23 */
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_WEN -> FMI1_WE_L
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_DOWN | FMI_HI_SPEED_DRIVE_STR, // FMI1_WENN -> FMI1_RE_P
|
||||
#else
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_WENN -> FMI1_RE_P
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO7 -> FMI1_IO[7]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO6 -> FMI1_IO[6]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO5 -> FMI1_IO[5]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO4 -> FMI1_IO[4]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQS -> FMI1_DQS_P
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_UP | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQSN -> FMI1_DQS_N
|
||||
#else
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQSN -> FMI1_DQS_N
|
||||
#endif
|
||||
|
||||
/* Port 24 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO3 -> FMI1_IO[3]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO2 -> FMI1_IO[2]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO1 -> FMI1_IO[1]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO0 -> FMI1_IO[0]
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN7 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN6 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN5 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN4 ->
|
||||
|
||||
/* Port 25 */
|
||||
CFG_OUT_0 | PULL_DOWN, // GPIO20 -> WLAN_HSIC3_RESUME
|
||||
CFG_IN | PULL_DOWN, // GPIO21 -> GRAPE_INT_L
|
||||
CFG_OUT_0, // GPIO22 -> LCD_RESET_L
|
||||
CFG_IN, // GPIO23 -> LCD_HIFA_BSYNC
|
||||
CFG_IN, // GPIO24 -> BB_RST_L
|
||||
CFG_DISABLED, // GPIO25 -> BOOT_CONFIG[1]
|
||||
CFG_IN | PULL_DOWN, // GPIO26 -> FORCE_DFU
|
||||
CFG_DISABLED | PULL_DOWN, // GPIO27 -> DFU_STATUS
|
||||
|
||||
/* Port 26 */
|
||||
CFG_DISABLED, // GPIO28 -> BOOT_CONFIG[2]
|
||||
CFG_DISABLED, // GPIO29 -> BOOT_CONFIG[3]
|
||||
CFG_IN | PULL_UP, // GPIO30 -> CODEC_INT_L
|
||||
CFG_IN | PULL_DOWN, // GPIO31 -> DEV_HSIC1_RDY
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 27 */
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 28 */
|
||||
CFG_IN, // GPIO32 -> RADIO_ON_L
|
||||
CFG_IN | PULL_DOWN, // GPIO33 -> GYRO_INT1
|
||||
CFG_IN | PULL_UP, // GPIO34 -> COMPASS_BRD_INT
|
||||
CFG_OUT_0, // GPIO35 -> AP_WAKE_MODEM
|
||||
CFG_IN | PULL_DOWN, // GPIO36 -> ACCEL_INT2_L
|
||||
CFG_OUT_0, // GPIO37 -> THS7380_SEL
|
||||
CFG_IN | PULL_UP, // GPIO38 -> ALS_INT_L
|
||||
CFG_OUT_0, // GPIO39 -> GRAPE_RESET_L
|
||||
};
|
||||
|
||||
#undef HI_DRIVE_STR
|
||||
#undef BB_UART_DRIVE_STR
|
||||
#undef BT_UART_DRIVE_STR
|
||||
#undef DOCK_UART_DRIVE_STR
|
||||
#undef SWI_UART_DRIVE_STR
|
||||
#undef WIFI_UART_DRIVE_STR
|
||||
#undef FMI_LO_SPEED_DRIVE_STR
|
||||
#undef FMI_HI_SPEED_DRIVE_STR
|
||||
#undef GRAPE_IO_DRIVE_STR
|
||||
#undef GRAPE_CLK_DRIVE_STR
|
||||
#undef DWI_DRIVE_STR
|
||||
#undef I2C_DRIVE_STR
|
||||
#undef I2S_DRIVE_STR
|
||||
#undef CAM_I2C_DRIVE_STR
|
||||
#undef CAM_STROBE_DRIVE_STR
|
||||
#undef CAM_CLK_DRIVE_STR
|
||||
#undef DISABLE_OPTIONAL_SIGNALS
|
||||
@@ -0,0 +1,138 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2012 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define PMU_IIC_BUS 0
|
||||
|
||||
/* this configuration is very PMU specific and must be included exactly once in power.c */
|
||||
#ifdef POWERCONFIG_PMU_SETUP
|
||||
|
||||
/* Matched to D1972A2-OTP-AE-v2 */
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1972_LDO1, 0x0A }, // PP3V0_USB 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO2, 0x2A }, // PP1V7_VA_VCP 1.70V
|
||||
{ PMU_IIC_BUS, kD1972_LDO3, 0x0A }, // PP3V0_VIDEO 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO4, 0x0F }, // PP2V8_CAM0_AF 2.55V
|
||||
{ PMU_IIC_BUS, kD1972_LDO5, 0x0A }, // PP3V0_NAND 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO6, 0x10 }, // PP3V3_ACC 3.30V
|
||||
{ PMU_IIC_BUS, kD1972_LDO7, 0x0F }, // P3V0_IMU 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO8, 0x14 }, // PP3V0_USBMUX 3.00V
|
||||
|
||||
// <rdar://problem/12061759>
|
||||
{ PMU_IIC_BUS, kD1972_TEST_MODE, 0x1D },
|
||||
{ PMU_IIC_BUS, 0xF5, 0x01 },
|
||||
{ PMU_IIC_BUS, kD1972_LDO9, 0x13 }, // PP3V0_IO 3.10V
|
||||
{ PMU_IIC_BUS, 0xF5, 0x00 },
|
||||
{ PMU_IIC_BUS, kD1972_TEST_MODE, 0x00 },
|
||||
|
||||
{ PMU_IIC_BUS, kD1972_LDO10, 0x0A }, // PP3V0_OPTICAL 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO11, 0x17 }, // PP2V8_CAM_AVDD 2.85V
|
||||
{ PMU_IIC_BUS, kD1972_LDO12, 0x10 }, // PP1V0 1.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO16, 0xA0 }, // PP1V0_SRAM_PMU 1.00V
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // no bypass
|
||||
{ PMU_IIC_BUS, kD1972_BUCK_CTRL5, 0xD3 }, // Enable x_DWI_EN and CPUx_EN_CTRL
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE1, 0xFF }, // Everything on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE2, 0xF4 }, // Everything but LDO3, LDO4, LDO6 on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE3, 0xEB }, // WLED_BST, LCM_BST, LDO16, LDO_LCM2, LDO12, LDO11 on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE4, 0xAD }, // CPU1V8, CPU1V2, CPUA_SW on
|
||||
{ PMU_IIC_BUS, kD1972_HIBERNATE1, 0x70 }, // BUCK3, BUCK4, LDO1 on
|
||||
{ PMU_IIC_BUS, kD1972_HIBERNATE2, 0x00 }, // Everything off
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL1, 0x02 }, // PP5V1_GRAPE_VDDH_PMU 5.10V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL2, 0x0E }, // PP5V7_LCD_AVDDH_PMU 5.70V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL3, 0x00 }, // BB_VBUS_DET 5.00V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_BST_CONTROL, 0x14 }, // LCM_VBOOST 6.00V
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_warm_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_ADC_CONTROL, kDIALOG_ADC_CONTROL_DEFAULTS },
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_cold_init[] =
|
||||
{
|
||||
/* Note: the following differences from OTP are intentional:
|
||||
- GPIO2,6,7,10 enable wake
|
||||
- GPIO5 enables CLK32
|
||||
- GPIO8 enables wake up and state change
|
||||
- GPIO10 pullup
|
||||
*/
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_1, 0xB9 }, // CLK32K_GRAPE_RESET_L In, R Edge, No Wake, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_2, 0xBA }, // BB_WAKE_AP In, R Edge, Wake, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_3, 0x09 }, // BB_PMU_ON_R_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_4, 0x7A }, // TRISTAR_INT In, L High, Wake, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_5, 0x49 }, // CLK32K_WIFI Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_6, 0xDA }, // BATTERY_SWI In, F Edge, Out Hib, Wake, PD, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_7, 0xBB }, // HOST_WAKE_WLAN In, R Edge, Wake, PD, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_8, 0xEA }, // MIKEY_INT_L In, Any Edge, Wake, PU, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_9, 0x09 }, // BT_REG_ON_R Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_10, 0xAA }, // HOST_WAKE_BT In, R Edge, Wake, PU, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_11, 0x09 }, // WIFI_REG_ON_R Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_12, 0xB9 }, // PMU_DBG_GPIO12 In, R Edge, No Wake, No PU
|
||||
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB1, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB2, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB3, 0x02 }, // no debounce on GPIO6 [OTP: 0x12]
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB4, 0x02 }, // no debounce on GPIO8 [OTP: 0x12]
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB5, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB6, 0x12 },
|
||||
|
||||
{ PMU_IIC_BUS, kDIALOG_SYS_CONTROL2, 0x11 }, // enable HIB_32kHz (for WIFI/BT) & DWI
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_enable[] =
|
||||
{
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_disable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, 0x0 } // disable LED power
|
||||
};
|
||||
|
||||
static const struct core_rails_struct soc_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK2 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct cpu_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK0 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct ram_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kD1972_LDO16 }
|
||||
};
|
||||
|
||||
#endif /* POWERCONFIG_PMU_SETUP */
|
||||
|
||||
#define NO_BATTERY_VOLTAGE 2700
|
||||
#define MIN_BOOT_BATTERY_VOLTAGE 3600
|
||||
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
|
||||
#define TARGET_BOOT_BATTERY_CAPACITY 50
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 824
|
||||
|
||||
#define TARGET_DISPLAY_VOLTAGE_BASE 6000
|
||||
#define TARGET_DISPLAY_VOLTAGE_SCALE 50
|
||||
#define TARGET_DISPLAY_BOOST_LDO kD1972_LCM_CONTROL2
|
||||
#define TARGET_DISPLAY_BOOST_OFFSET 300
|
||||
|
||||
#define ACC_PWR_LDO (6)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_RADIOCONFIG_H
|
||||
#define __TARGET_RADIOCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define RADIO_VERIFY_BASEBAND_EXISTS 1
|
||||
|
||||
static const gpio_t target_radio_quiesce_pins[] =
|
||||
{
|
||||
GPIO_UART1_TXD
|
||||
};
|
||||
|
||||
#define RADIO_ENABLE_IMEI_OVERRIDE 0
|
||||
|
||||
#endif /* ! __TARGET_RADIOCONFIG_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define two debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (6)
|
||||
|
||||
/* define radio serial port */
|
||||
#define RADIO_SERIAL_PORT (1)
|
||||
#define RADIO_MAX_READ_ERRORS (10)
|
||||
|
||||
/* define HDQ serial port */
|
||||
#define HDQGAUGE_SERIAL_PORT (5)
|
||||
|
||||
#define UART_FLOWCONTROL_MASK (0x08)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,661 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <drivers/display.h>
|
||||
#include <drivers/flash_nor.h>
|
||||
#include <drivers/iic.h>
|
||||
#include <drivers/power.h>
|
||||
#include <lib/devicetree.h>
|
||||
#include <lib/env.h>
|
||||
#include <lib/mib.h>
|
||||
#include <lib/syscfg.h>
|
||||
#include <platform.h>
|
||||
#include <platform/gpio.h>
|
||||
#include <platform/gpiodef.h>
|
||||
#include <platform/memmap.h>
|
||||
#include <sys.h>
|
||||
#include <sys/boot.h>
|
||||
#include <sys/menu.h>
|
||||
#include <sys/task.h>
|
||||
#include <target.h>
|
||||
|
||||
#define IPHONE5_DEV3_BOARD (0xF)
|
||||
#define IPHONE5_DEV5_PROTO0_BOARD (0xE)
|
||||
#define IPHONE5_DEV6_PROTO1_BOARD (0xD)
|
||||
#define IPHONE5_PROTO2A_BOARD (0xC)
|
||||
#define IPHONE5_PROTO2B_PROTO2C_BOARD (0xB)
|
||||
#define IPHONE5_DEV7_PROTO3_BOARD (0xA)
|
||||
#define IPHONE5_EVT1_BOARD (0x9)
|
||||
#define IPHONE5_DOE1_BOARD (0x8)
|
||||
#define IPHONE5_EVT3_BOARD (0x6)
|
||||
|
||||
static u_int32_t iphone5_get_board_rev(void);
|
||||
static u_int32_t display_config;
|
||||
|
||||
#define IPHONE5_GRAPE_ID_N94 (0x0)
|
||||
#define IPHONE5_GRAPE_ID_DS401 (0x1)
|
||||
#define IPHONE5_GRAPE_ID_DS402 (0x2)
|
||||
#define IPHONE5_GRAPE_ID_PROTO0 (0x8)
|
||||
|
||||
static u_int32_t iphone5_get_grape_id(void);
|
||||
|
||||
MIB_CONSTANT(kMIBTargetBacklight0I2CBus, kOIDTypeUInt32, 0);
|
||||
MIB_CONSTANT(kMIBTargetBacklight0I2CAddress, kOIDTypeUInt32, 0xC6);
|
||||
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 2);
|
||||
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 0);
|
||||
|
||||
void target_early_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_late_init(void)
|
||||
{
|
||||
if (iphone5_get_board_rev() > IPHONE5_DEV7_PROTO3_BOARD) {
|
||||
platform_not_supported();
|
||||
}
|
||||
}
|
||||
|
||||
void target_init(void)
|
||||
{
|
||||
#if WITH_HW_FLASH_NOR
|
||||
flash_nor_init(SPI_NOR0);
|
||||
#endif
|
||||
|
||||
// All AP and PMU GPIOS for the radios are set by pinconfig.h
|
||||
// and powerconfig.h. While the AP settings are compatible with wake,
|
||||
// the BB PMU will be in reset thanks to powerconfig.h providing
|
||||
// dedicated cold boot settings. The AppleARMFunctions in the device
|
||||
// tree will take care of the rest for a cold boot.
|
||||
}
|
||||
|
||||
void target_quiesce_hardware(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_poweroff(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
int target_bootprep(enum boot_target target)
|
||||
{
|
||||
switch (target) {
|
||||
case BOOT_DARWIN:
|
||||
case BOOT_DARWIN_RESTORE:
|
||||
case BOOT_DIAGS:
|
||||
break;
|
||||
|
||||
default:
|
||||
; // do nothing
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool target_should_recover(void)
|
||||
{
|
||||
return platform_get_request_dfu2() && power_has_usb();
|
||||
}
|
||||
|
||||
bool target_should_poweron(bool *cold_button_boot)
|
||||
{
|
||||
#if WITH_HW_POWER
|
||||
if (power_get_boot_flag() == kPowerBootFlagColdButton) *cold_button_boot = true;
|
||||
#else
|
||||
*cold_button_boot = false;
|
||||
#endif
|
||||
|
||||
return !*cold_button_boot || platform_get_request_dfu1();
|
||||
}
|
||||
|
||||
bool target_should_poweroff(bool at_boot)
|
||||
{
|
||||
return platform_get_request_dfu1() && (!at_boot || !power_has_usb());
|
||||
}
|
||||
|
||||
#if APPLICATION_IBOOT
|
||||
void target_watchdog_tickle(void)
|
||||
{
|
||||
u_int32_t value = gpio_read(GPIO_WDOG_TICKLE);
|
||||
gpio_write(GPIO_WDOG_TICKLE, value ^ 1);
|
||||
}
|
||||
#endif // APPLICATION_IBOOT
|
||||
|
||||
void * target_get_display_configuration(void)
|
||||
{
|
||||
display_config = 0x00000964;
|
||||
return ((void *)(&display_config));
|
||||
}
|
||||
|
||||
#if WITH_ENV
|
||||
|
||||
void target_setup_default_environment(void)
|
||||
{
|
||||
env_set("boot-device", "nand0", 0);
|
||||
env_set("display-color-space","RGB888", 0);
|
||||
env_set("display-timing", "n41", 0);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
int target_update_device_tree(void)
|
||||
{
|
||||
#if WITH_HW_DISPLAY_PINOT
|
||||
DTNode *clcd_node, *backlight_node;
|
||||
#endif
|
||||
DTNode *node;
|
||||
uint32_t propSize;
|
||||
char *propName, *propStr;
|
||||
void *propData;
|
||||
|
||||
#if WITH_HW_DISPLAY_PINOT
|
||||
// Find the CLCD node
|
||||
FindNode(0, "arm-io/clcd", &clcd_node);
|
||||
|
||||
if (FindNode(0, "arm-io/mipi-dsim/lcd", &node)) {
|
||||
extern int pinot_update_device_tree(DTNode *pinot_node, DTNode *clcd_node, DTNode *backlight_node);
|
||||
|
||||
FindNode(0, "backlight", &backlight_node);
|
||||
pinot_update_device_tree(node, clcd_node, backlight_node);
|
||||
}
|
||||
#endif
|
||||
|
||||
// Update the highland-park node with acoustic transducer scale data
|
||||
if (FindNode(0, "arm-io/highland-park", &node)) {
|
||||
propName = "at-scale";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ATSc', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the codec and speaker nodes with acoustic transducer scale data
|
||||
{
|
||||
uint8_t atscData[20];
|
||||
|
||||
if (syscfgCopyDataForTag('ATSc', atscData, sizeof(atscData)) > 0) {
|
||||
// Update codec
|
||||
if (FindNode(0, "arm-io/spi3/audio-codec", &node)) {
|
||||
propName = "at-scale-imic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[0], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-smic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[4], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-fmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[8], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-rcvr";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[12], sizeof(uint32_t));
|
||||
}
|
||||
}
|
||||
// Update speaker
|
||||
if (FindNode(0, "arm-io/i2c0/audio-speaker", &node)) {
|
||||
propName = "at-scale";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[16], sizeof(uint32_t));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Updte the speaker calibration data
|
||||
if (FindNode(0, "arm-io/i2c0/audio-speaker", &node)) {
|
||||
propName = "speaker-rdc";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('SRdc', propData, propSize);
|
||||
}
|
||||
propName = "speaker-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint8_t vpbr;
|
||||
if (syscfgCopyDataForTag('VPBR', &vpbr, sizeof(vpbr)) == 1) {
|
||||
((uint8_t *)propData)[12] = (((uint8_t *)propData)[12] & ~0x1f) | (vpbr & 0x1f);
|
||||
}
|
||||
uint8_t vbst;
|
||||
if (syscfgCopyDataForTag('VBST', &vbst, sizeof(vbst)) == 1) {
|
||||
((uint8_t *)propData)[16] = vbst;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Update the backlight calibration data
|
||||
if (FindNode(0, "backlight", &node)) {
|
||||
propName = "backlight-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('BLCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the compass calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/compass", &node)) {
|
||||
propName = "compass-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPAS', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the compass calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/compass1", &node)) {
|
||||
propName = "compass-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPAS', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the als calibration data
|
||||
// XXX The I2C1 als node can be removed once we deprecate proto HW
|
||||
if (FindNode(0, "arm-io/i2c1/als_i2c1", &node)) {
|
||||
propName = "alsCalibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AlsC', propData, propSize);
|
||||
}
|
||||
propName = "als-colorCfg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ClrC', propData, propSize);
|
||||
}
|
||||
}
|
||||
if (FindNode(0, "arm-io/i2c2/als", &node)) {
|
||||
propName = "alsCalibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AlsC', propData, propSize);
|
||||
}
|
||||
propName = "als-colorCfg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ClrC', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the gyro calibration data
|
||||
if (FindNode(0, "arm-io/i2c0/gyro", &node)) {
|
||||
propName = "low-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTGO', propData, propSize);
|
||||
}
|
||||
propName = "high-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('HTGO', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCl', propData, propSize);
|
||||
}
|
||||
propName = "gyro-temp-table";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GYTT', propData, propSize);
|
||||
}
|
||||
propName = "gyro-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update accelerometer calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/accelerometer", &node)) {
|
||||
propName = "low-temp-accel-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTAO', propData, propSize);
|
||||
}
|
||||
propName = "accel-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ASCl', propData, propSize);
|
||||
}
|
||||
propName = "accel-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update prox calibration data
|
||||
if (FindNode(0, "arm-io/spi1/multi-touch", &node)) {
|
||||
propName = "prox-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('PxCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// HACKs for multi-touch support
|
||||
if (FindNode(0, "arm-io/spi1/multi-touch", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propStr = NULL;
|
||||
|
||||
switch (iphone5_get_grape_id()) {
|
||||
case IPHONE5_GRAPE_ID_N94 :
|
||||
propStr = "multi-touch,n94";
|
||||
break;
|
||||
|
||||
case IPHONE5_GRAPE_ID_PROTO0 :
|
||||
propStr = "multi-touch,n41-proto0";
|
||||
break;
|
||||
|
||||
case IPHONE5_GRAPE_ID_DS401 :
|
||||
propStr = "multi-touch,n41-d401";
|
||||
break;
|
||||
|
||||
default :
|
||||
break;
|
||||
}
|
||||
|
||||
// Replace the data if an override was found
|
||||
if (propStr != NULL) {
|
||||
memset(propData, 0, propSize);
|
||||
strlcpy(propData, propStr, propSize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// pre-EVT1 Grape clock config
|
||||
if (iphone5_get_board_rev() > IPHONE5_EVT1_BOARD) {
|
||||
if (FindNode(0, "arm-io/spi1/multi-touch", &node)) {
|
||||
propName = "function-clock_enable";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "function-clock_enable-pmu";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[21] = '\0';
|
||||
}
|
||||
}
|
||||
|
||||
// configure PMU GPIO1 to be Grape clock (off until enabled)
|
||||
// configure SoC PWM2 to be disabled (
|
||||
power_gpio_configure(0, 0x11);
|
||||
gpio_configure(GPIO(8, 5), GPIO_CFG_IN);
|
||||
}
|
||||
|
||||
// pre-DOE1 and pre-DEV8 don't use I2C2
|
||||
// <rdar://problem/10941423> I2C2 Hardware configuration for N41&N42
|
||||
if (iphone5_get_board_rev() > IPHONE5_DOE1_BOARD) {
|
||||
if (FindNode(0, "arm-io/i2c2", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memset(propData, 0, propSize);
|
||||
strlcpy(propData, "none", propSize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// pre-DOE1 vibrator and accelerometer config
|
||||
if (iphone5_get_board_rev() > IPHONE5_DOE1_BOARD) {
|
||||
if (FindNode(0, "arm-io/i2c1/accelerometer", &node)) {
|
||||
propName = "interrupts";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint32_t *)propData)[0] = 0x44;
|
||||
}
|
||||
}
|
||||
|
||||
// add pull-down to TMR32_PWM1 (now accel int.)
|
||||
gpio_configure_pupdn(GPIO(8, 4), GPIO_PDN);
|
||||
|
||||
// remove PWM vibrator control
|
||||
if (FindNode(0, "arm-io/pwm/vibrator", &node)) {
|
||||
propName = "reg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "AAPL,ignore", kPropNameLength);
|
||||
}
|
||||
}
|
||||
|
||||
// enable PMU vibrator control
|
||||
if (FindNode(0, "arm-io/i2c0/pmu/vib-pwm", &node)) {
|
||||
propName = "AAPL,ignore";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
}
|
||||
|
||||
// transform vibrator node back to PMU control
|
||||
if (FindNode(0, "arm-io/i2c0/pmu/vib-pwm/vibrator", &node)) {
|
||||
uint32_t strong_vset = 0x35;
|
||||
uint32_t weak_vset = 0xFF;
|
||||
|
||||
syscfgCopyDataForTag('VLSg', (void *)&strong_vset, sizeof(strong_vset));
|
||||
syscfgCopyDataForTag('VLWk', (void *)&weak_vset, sizeof(strong_vset));
|
||||
|
||||
propName = "reg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint32_t *)propData)[0] = strong_vset;
|
||||
}
|
||||
propName = "default-hz";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "duty-cycle";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "enable-ms";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "function-enable";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "intensity-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint32_t *)propData)[0] = 'ampl';
|
||||
((uint32_t *)propData)[1] = (((uint64_t)weak_vset << 32) + (strong_vset-1)) / strong_vset; // round up
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// vibrator calibration (DOE1 and newer only)
|
||||
if (iphone5_get_board_rev() <= IPHONE5_DOE1_BOARD) {
|
||||
if (FindNode(0, "arm-io/pwm/vibrator", &node)) {
|
||||
propName = "duty-cycle";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint32_t pct;
|
||||
if (syscfgCopyDataForTag('VLSg', (void *)&pct, sizeof(pct)) > 0) {
|
||||
((uint32_t *)propData)[0] = ((uint64_t)pct << 32) / 100;
|
||||
}
|
||||
}
|
||||
propName = "intensity-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint32_t pct;
|
||||
if (syscfgCopyDataForTag('VLWk', (void *)&pct, sizeof(pct)) > 0) {
|
||||
((uint32_t *)propData)[1] = ((uint64_t)pct << 32) / 100;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Hack for EVT2 and older
|
||||
if (iphone5_get_board_rev() <= IPHONE5_EVT3_BOARD) {
|
||||
// Update codec's mic 4 inversion
|
||||
if (FindNode(0, "arm-io/spi3/audio-codec", &node)) {
|
||||
propName = "mic4a-invpol";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Update charger calibration data
|
||||
if (FindNode(0, "charger", &node)) {
|
||||
propName = "usb-input-limit-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CBAT', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static bool gpio_board_rev_valid;
|
||||
static u_int32_t gpio_board_rev;
|
||||
|
||||
static u_int32_t iphone5_get_board_rev(void)
|
||||
{
|
||||
|
||||
if (!gpio_board_rev_valid) {
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_IN);
|
||||
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV3, GPIO_PDN);
|
||||
|
||||
spin(100); // Wait 100us
|
||||
|
||||
gpio_board_rev =
|
||||
(gpio_read(GPIO_BOARD_REV3) << 3) |
|
||||
(gpio_read(GPIO_BOARD_REV2) << 2) |
|
||||
(gpio_read(GPIO_BOARD_REV1) << 1) |
|
||||
(gpio_read(GPIO_BOARD_REV0) << 0);
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_DFLT);
|
||||
|
||||
gpio_board_rev_valid = true;
|
||||
}
|
||||
|
||||
return gpio_board_rev;
|
||||
}
|
||||
|
||||
static bool gpio_grape_id_valid;
|
||||
static u_int32_t gpio_grape_id;
|
||||
|
||||
static u_int32_t iphone5_get_grape_id(void)
|
||||
{
|
||||
if (!gpio_grape_id_valid) {
|
||||
if (target_config_ap()) {
|
||||
gpio_grape_id = IPHONE5_GRAPE_ID_DS402;
|
||||
} else {
|
||||
gpio_configure(GPIO_GRAPE_ID0, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_GRAPE_ID1, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_GRAPE_ID2, GPIO_CFG_IN);
|
||||
|
||||
gpio_configure_pupdn(GPIO_GRAPE_ID0, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_GRAPE_ID1, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_GRAPE_ID2, GPIO_PDN);
|
||||
|
||||
spin(100); // Wait 100us
|
||||
|
||||
gpio_grape_id =
|
||||
(gpio_read(GPIO_GRAPE_ID2) << 0) |
|
||||
(gpio_read(GPIO_GRAPE_ID1) << 1) |
|
||||
(gpio_read(GPIO_GRAPE_ID0) << 2);
|
||||
|
||||
gpio_configure(GPIO_GRAPE_ID0, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_GRAPE_ID1, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_GRAPE_ID2, GPIO_CFG_DFLT);
|
||||
}
|
||||
gpio_grape_id_valid = true;
|
||||
}
|
||||
|
||||
return gpio_grape_id;
|
||||
}
|
||||
|
||||
#if WITH_PAINT
|
||||
|
||||
// N41 & N42 don't support the DClr syscfg key necessary for varying the iBoot
|
||||
// logo and background color. Therefore we will synthesize a DClr from the
|
||||
// the information contained in the ClrC syscfg key along with the knowledge
|
||||
// than N41s and N42s only come in black or white.
|
||||
//
|
||||
// Note: The device enclosure colors are not currently used for anything and
|
||||
// the values below are taken from N51. If at some point the enclosure
|
||||
// color starts being using for something, then these values will need
|
||||
// to be set to the actual alues corresponding to the N41/N42 enclosures.
|
||||
|
||||
static const syscfg_DClr_t iphone5_DClr[] = {
|
||||
[clrcColorBlack] = {
|
||||
.minor_version = 0,
|
||||
.major_version = 2,
|
||||
.device_enclosure.rgb = RGB(153, 152, 155), // Value taken from n51
|
||||
.cover_glass.rgb = RGB( 59, 59, 60)
|
||||
},
|
||||
[clrcColorWhite] = {
|
||||
.minor_version = 0,
|
||||
.major_version = 2,
|
||||
.device_enclosure.rgb = RGB(215, 217, 216), // Value taken from n51
|
||||
.cover_glass.rgb = RGB(225, 228, 227)
|
||||
},
|
||||
};
|
||||
|
||||
int target_dclr_from_clrc(uint8_t *buffer, size_t size)
|
||||
{
|
||||
int result;
|
||||
syscfg_ClrC_t ClrC;
|
||||
|
||||
if ((buffer == NULL) || (size != sizeof(syscfg_DClr_t))) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
// Look up the 'ClrC' tag from syscfg.
|
||||
result = syscfgCopyDataForTag('ClrC', (uint8_t *)&ClrC, sizeof(ClrC));
|
||||
if (result < 0) {
|
||||
dprintf(DEBUG_INFO,
|
||||
"DClr: ClrC syscfg entry not found -- color remapping disabled\n");
|
||||
return result;
|
||||
}
|
||||
|
||||
if (ClrC.clrcColor < ARRAY_SIZE(iphone5_DClr)) {
|
||||
dprintf(DEBUG_INFO,
|
||||
"DClr: Synthesizing values from ClrC (%d)\n", ClrC.clrcColor);
|
||||
memcpy(buffer, &iphone5_DClr[ClrC.clrcColor], size);
|
||||
return size;
|
||||
} else {
|
||||
dprintf(DEBUG_INFO,
|
||||
"DClr: Unsupported ClrC value (%d) -- color remapping disabled\n",
|
||||
ClrC.clrcColor);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// The default background is expected to to be black and the artwork is expected
|
||||
// to be white. This arrangement will be inverted depending upon the cover glass
|
||||
// color of the device.
|
||||
|
||||
// Sample DClr_override values for testing devices without DClr syscfg entries (enclosure/cover glass):
|
||||
// gray/black: setenv DClr_override 000200009B9899003C3B3B0000000000
|
||||
// silver/white: setenv DClr_override 00020000D8D9D700E3E4E10000000000
|
||||
|
||||
static color_policy_invert_t target_cover_glass_color_table[] = {
|
||||
{ RGB( 59, 59, 60), false }, // Black - black background, white logo
|
||||
{ RGB(225, 228, 227), true }, // White - white background, black logo
|
||||
};
|
||||
|
||||
color_policy_t *target_color_map_init(enum colorspace cs, color_policy_t *color_policy)
|
||||
{
|
||||
// Must have a color policy structure passed in.
|
||||
if (color_policy == NULL)
|
||||
goto fail;
|
||||
|
||||
// We only support the RGB888 colorspace.
|
||||
if (cs != CS_RGB888)
|
||||
goto fail;
|
||||
|
||||
color_policy->policy_type = COLOR_MAP_POLICY_INVERT;
|
||||
color_policy->color_table = (void *)target_cover_glass_color_table;
|
||||
color_policy->color_count = ARRAY_SIZE(target_cover_glass_color_table);
|
||||
color_policy->map_color = NULL; // Use standard remapper
|
||||
|
||||
return color_policy;
|
||||
|
||||
fail:
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#endif // WITH_PAINT
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2014 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <drivers/apple/gpio.h>
|
||||
#include <platform/soc/hwregbase.h>
|
||||
#include <target.h>
|
||||
|
||||
#define PIN_CFG_AP 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_AP
|
||||
|
||||
#define PIN_CFG_DEV 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_DEV
|
||||
|
||||
const uint32_t *target_get_default_gpio_cfg(uint32_t gpioc)
|
||||
{
|
||||
if (target_config_ap())
|
||||
return gpio_default_cfg_ap;
|
||||
else
|
||||
return gpio_default_cfg_dev;
|
||||
}
|
||||
@@ -0,0 +1,37 @@
|
||||
# Copyright (C) 2011-2012 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
TARGET_DIR := $(LOCAL_DIR)
|
||||
|
||||
OPTIONS += \
|
||||
DIALOG_D1972=1 \
|
||||
TARGET_BOOT_CPU_VOLTAGE=0 \
|
||||
TARGET_BOOT_RAM_VOLTAGE=CHIPID_RAM_VOLTAGE_LOW \
|
||||
TARGET_BOOT_SOC_VOLTAGE=CHIPID_SOC_VOLTAGE_MED \
|
||||
TARGET_RAM_VOLTAGE_OFFSET=17 \
|
||||
TARGET_DWI_FREQUENCY=24000000 \
|
||||
TARGET_DWI_TRANSFER_GAP_US=5 \
|
||||
TARGET_USE_HSIC=1 \
|
||||
TARGET_DSIM_CONFIG=0x00400000 \
|
||||
TARGET_DSIM_DPHYCTL=0x30 \
|
||||
TARGET_DSIM_UP_CODE=0x5 \
|
||||
TARGET_DSIM_DOWN_CODE=0x1 \
|
||||
TARGET_DSIM_SUPPRESS=0x1 \
|
||||
AMC_NUM_CHANNELS=2 \
|
||||
AMC_NUM_RANKS=1 \
|
||||
AMC_CHANNEL_WIDTH=4 \
|
||||
MULTITOUCH_DTPATH=\"arm-io/spi1/multi-touch\" \
|
||||
BASEBAND_DTPATH=\"baseband\" \
|
||||
WIFI_DTPATH=\"arm-io/usb-complex/usb-ehci/wlan\"
|
||||
|
||||
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
|
||||
|
||||
ALL_OBJS += $(LOCAL_DIR)/init.o \
|
||||
$(LOCAL_DIR)/pinconfig.o
|
||||
Reference in new issue
Block a user