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@@ -0,0 +1,44 @@
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/*
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* Copyright (C) 2011-2012 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __TARGET_GPIODEF_H
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#define __TARGET_GPIODEF_H
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/* iPhone5,x specific gpio -> pin mappings */
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#include <platform/gpio.h>
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/* define target-specific gpios in a generic fashion here. */
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#define GPIO_LCD_RST GPIO(25, 2)
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#define GPIO_LCD_RST_POLARITY (0)
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#define GPIO_RINGER_AB GPIO( 0, 4)
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/* Board Revision */
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#define GPIO_BOARD_REV0 GPIO( 2, 4)
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#define GPIO_BOARD_REV1 GPIO( 2, 5)
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#define GPIO_BOARD_REV2 GPIO( 2, 6)
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#define GPIO_BOARD_REV3 GPIO( 2, 7)
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/* which IICs to initialize */
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#define IICS_MASK (7)
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#define TRISTAR_IIC_BUS (0)
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#define DISPLAY_PMU_IIC_BUS (0)
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/* D1972 watchdog tickle, 'KEEPACT' */
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#define GPIO_WDOG_TICKLE GPIO(2, 3)
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// Configure both FMI0 & FMI1 to use differential DQS with DQ set to DQVREF
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#define FMI_DIFF_SEL (0x36)
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#endif /* ! __TARGET_GPIODEF_H */
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@@ -0,0 +1,92 @@
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// Copyright (C) 2008-2010 Apple, Inc. All rights reserved.
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//
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// This document is the property of Apple, Inc.
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// It is considered confidential and proprietary.
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//
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// This document may not be reproduced or transmitted in any form,
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// in whole or in part, without the express written permission of
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// Apple, Inc.
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//
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// NOTE: This is a generated file and should not be hand-edited!
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//
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// =============================================================================
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// Nand Geometry Table
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static NandGeometry _nandGeometryTable[] =
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{
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};
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// =============================================================================
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// Nand Timing Table
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static NandTiming _nandTimingTable[] =
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{
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};
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#if (defined (AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// NandChipId Description
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const NandChipIdDescription _nandChipIdDescriptionTable[] =
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{
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};
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// =============================================================================
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// Nand Description Table
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static const NandDescription _nandDescriptionTable[] =
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{
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};
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const UInt32 _nandDescriptionTableSize = sizeof(_nandDescriptionTable) / sizeof(NandDescription);
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#endif // (defined(AND_ENABLE_NAND_DESCRIPTION_TEXT) || AND_ENABLE_NAND_DESCRIPTION_TEXT)
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// =============================================================================
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// Nand Board Support Table
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static NandBoardSupport _nandBoardSupportTable[] =
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{
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};
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// =============================================================================
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// Nand Board Timing Table
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static NandBoardInfo _nandBoardInfo =
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{
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/* controlDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* dataDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* chipEnableDstr */ NAND_DRIVE_STRENGTH_DEFAULT,
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/* socToNandRiseNanosecs */ 10,
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/* socToNandFallNanosecs */ 10,
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/* nandToSocRiseNanosecs */ 10,
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/* nandToSocFallNanosecs */ 10,
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/* landing map */
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{
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0x00000101
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},
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/* useToggleMode */ TRUE32,
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/* useDiffDQSMode */ FALSE32,
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/* useDiffREMode */ FALSE32,
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/* useVref */ TRUE32,
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/* useSingleHostChannel */ FALSE32,
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/* allowSingleChipEnable */ TRUE32
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};
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static NandFormat _nandFormatPpn =
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{
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/* metaPerLogicalPage */ 16,
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/* validMetaPerLogicalPage */ 16,
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/* logicalPageSize */ 4096
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};
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static NandFormat _nandFormatRaw =
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{
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/* metaPerLogicalPage */ 12,
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/* validMetaPerLogicalPage */ 10,
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/* logicalPageSize */ 0
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};
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@@ -0,0 +1,366 @@
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/*
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* Copyright (C) 2011-2014 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/* Default iPhone5b (iPhone5,3/4) SoC Pin Configuration */
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#if PIN_CFG_AP
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#define HI_DRIVE_STR DRIVE_X4
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#elif PIN_CFG_DEV
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#define HI_DRIVE_STR DRIVE_X6
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#endif
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#define BB_UART_DRIVE_STR DRIVE_X2
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#define BT_UART_DRIVE_STR DRIVE_X2
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#define DOCK_UART_DRIVE_STR DRIVE_X2
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#define SWI_UART_DRIVE_STR DRIVE_X1
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#define WIFI_UART_DRIVE_STR DRIVE_X2
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#define FMI_LO_SPEED_DRIVE_STR (DRIVE_X2 | SLOW_SLEW)
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#define FMI_HI_SPEED_DRIVE_STR (DRIVE_X2 | SLOW_SLEW)
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#define GRAPE_IO_DRIVE_STR DRIVE_X1
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#define GRAPE_CLK_DRIVE_STR DRIVE_X2
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#define DWI_DRIVE_STR DRIVE_X2
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#define I2C_DRIVE_STR DRIVE_X1
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#define I2S_DRIVE_STR DRIVE_X2
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#define CAM_I2C_DRIVE_STR DRIVE_X1
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#define CAM_STROBE_DRIVE_STR DRIVE_X1
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#define CAM_CLK_DRIVE_STR DRIVE_X2
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#define DISABLE_OPTIONAL_SIGNALS (1)
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#if PIN_CFG_AP
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static const uint32_t gpio_default_cfg_ap[GPIO_GROUP_COUNT * GPIOPADPINS] = {
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#elif PIN_CFG_DEV
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static const uint32_t gpio_default_cfg_dev[GPIO_GROUP_COUNT * GPIOPADPINS] = {
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#endif
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/* Port 0 */
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CFG_IN, // GPIO0 -> BUTTON_TO_AP_MENU_KEY_BUFF_L (REQUEST_DFU2)
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CFG_IN, // GPIO1 -> BUTTON_TO_AP_HOLD_KEY_BUFF_L (REQUEST_DFU1)
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CFG_IN | PULL_UP, // GPIO2 -> BUTTON_TO_AP_VOL_UP_L
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CFG_IN | PULL_UP, // GPIO3 -> BUTTON_TO_AP_VOL_DOWN_L
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CFG_IN, // GPIO4 -> BUTTON_TO_AP_RINGER_A
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CFG_IN | PULL_UP, // GPIO5 -> SPKAMP_TO_AP_INT_L
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CFG_IN | PULL_UP, // GPIO6 -> PMU_IRQ_L
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CFG_OUT_0, // GPIO7 -> AP_TO_BT_WAKE
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/* Port 1 */
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CFG_DISABLED | PULL_DOWN, // GPIO8 -> N/C
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CFG_OUT_0, // GPIO9 -> AP_TO_APKAMP_BEE_GEES
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CFG_DISABLED | PULL_DOWN, // GPIO10 -> BB_TO_AP_HSIC1_REMOTE_WAKE
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CFG_DISABLED, // GPIO11 -> AP_TO_BB_JTAG_TCK
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CFG_DISABLED, // GPIO12 -> AP_TO_BB_BB_JTAG_TDI
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CFG_IN | PULL_UP, // GPIO13 -> AP_TO_BB_JTAG_TMS
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CFG_DISABLED | PULL_DOWN, // GPIO14 -> BB_TO_AP_JTAG_TDO
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CFG_DISABLED | PULL_DOWN, // GPIO15 -> N/C
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/* Port 2 */
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CFG_DISABLED, // GPIO16 -> BOARD_ID[3]
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CFG_OUT_0, // GPIO17 -> AP_TO_BB_HSIC1_RDY
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CFG_DISABLED, // GPIO18 -> BOOT_CONFIG[0]
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CFG_OUT_0, // GPIO19 -> KEEPACT
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CFG_DISABLED, // EHCI_PORT_PWR[0] -> BOARD_REV[0]
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CFG_DISABLED, // EHCI_PORT_PWR[1] -> BOARD_REV[1]
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CFG_DISABLED, // EHCI_PORT_PWR[2] -> BOARD_REV[2]
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CFG_DISABLED, // EHCI_PORT_PWR[3] -> BOARD_REV[3]
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/* Port 3 */
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CFG_OUT_0 | BB_UART_DRIVE_STR, // UART1_TXD -> AP_TO_BB_UART1_TXD
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CFG_FUNC0, // UART1_RXD -> AP_TO_BB_UART1_RXD
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CFG_OUT_0 | BB_UART_DRIVE_STR, // UART1_RTSN -> AP_TO_BB_UART1_RTS_L
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CFG_FUNC0, // UART1_CTSN -> AP_TO_BB_UART1_CTS_L
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CFG_FUNC0 | DOCK_UART_DRIVE_STR, // UART2_TXD -> AP_TO_TRISTAR_ACC_UART2_TXD
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CFG_FUNC0, // UART2_RXD -> AP_TO_TRISTAR_ACC_UART2_RXD
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CFG_IN | PULL_DOWN, // UART2_RTSN -> AP_TO_ACCEL_INT1
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CFG_IN, // UART2_CTSN -> AP_TO_TRISTAR_INT
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/* Port 4 */
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CFG_FUNC0 | BT_UART_DRIVE_STR, // UART3_TXD -> AP_TO_BT_UART3_TXD
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CFG_FUNC0, // UART3_RXD -> BT_TO_AP_UART3_RXD
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CFG_OUT_1 | BT_UART_DRIVE_STR, // UART3_RTSN -> AP_TO_BT_UART3_RTS_L
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CFG_FUNC0, // UART3_CTSN -> BT_TO_AP_UART3_CTS_L
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CFG_FUNC0 | WIFI_UART_DRIVE_STR, // UART4_TXD/SPI4_MOSI -> AP_TO_WLAN_UART4_TXD
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CFG_FUNC0, // UART4_RXD/SPI4_MISO -> AP_TO_WLAN_UART4_RXD
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CFG_OUT_0, // UART4_RTSN/SPI4_SCLK -> AP_TO_CAM0_VDDCORE_EN
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CFG_DISABLED, // UART4_CTSN/SPI4_SSIN -> AP_TO_BB_JTAG_TRST_L
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/* Port 5 */
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CFG_FUNC0 | DOCK_UART_DRIVE_STR, // UART6_TXD -> AP_TO_TRISTAR_DEBUG_UART6_TXD
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CFG_FUNC0, // UART6_RXD -> AP_TO_TRISTAR_DEBUG_UART6_RXD
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CFG_OUT_0, // UART6_RTSN -> AP_TO_SPKAMP_RESET_L
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CFG_IN | PULL_DOWN, // UART6_CTSN -> BB_TO_AP_PP_SYNC
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CFG_FUNC1 | SWI_UART_DRIVE_STR, // UART5_RXD/UART5_RTXD -> AP_BI_BATTERY_SWI
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CFG_IN | PULL_DOWN, // UART5_TXD -> BB_TO_AP_RESET_DET_L
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CFG_FUNC0 | GRAPE_CLK_DRIVE_STR, // SPI1_SCLK -> AP_TO_TOUCH_SPI1_CLK
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CFG_FUNC0 | GRAPE_IO_DRIVE_STR, // SPI1_MOSI -> AP_TO_TOUCH_SPI1_MOSI
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/* Port 6 */
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CFG_FUNC0, // SPI1_MISO -> AP_TO_TOUCH_SPI1_MISO
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CFG_OUT_0 | GRAPE_IO_DRIVE_STR, // SPI1_SSIN -> AP_TO_TOUCH_API1_CS_L
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CFG_DISABLED, // SPI0_SCLK -> BOARD_ID[0]/SPI0_SCLK
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CFG_DISABLED, // SPI0_MOSI -> BOARD_ID[1]/SPI0_MOSI
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CFG_DISABLED, // SPI0_MISO -> BOARD_ID[2]/SPI0_MISO
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CFG_DISABLED, // SPI0_SSIN -> LCD_TO_AP_PIFA
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CFG_OUT_0, // SPI2_SCLK -> AP_TO_WLAN_HSIC2_RDY
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CFG_DISABLED, // SPI2_MOSI -> BB_TO_AP_IPC_GPIO
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/* Port 7 */
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CFG_OUT_0, // SPI2_MISO -> FCAM_TO_AP_ALS_INT_L
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CFG_IN | PULL_DOWN, // SPI2_SSIN -> WLAN_TO_AP_HSIC2_RDY
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SDA -> AP_TO_I2C0_SDA_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C0_SCL -> AP_BI_I2C0_SCL_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SDA -> AP_TO_I2C1_SDA_1V8
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CFG_FUNC0 | I2C_DRIVE_STR, // I2C1_SCL -> AP_BI_I2C1_SCL_1V8
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CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP0_SDA -> AP_BI_CAM_RF_SDA
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CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP0_SCL -> AP_TO_CAM_RF_SCL
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/* Port 8 */
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CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP1_SDA -> AP_BI_CAM_FF_SDA
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CFG_FUNC0 | CAM_I2C_DRIVE_STR, // ISP1_SCL -> AP_TO_CAM_FF_SCL
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CFG_DISABLED | PULL_DOWN, // MIPI_VSYNC -> MIPI_VSYNC
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CFG_FUNC0 | PULL_DOWN, // TMR32_PWM0 -> GYRO_TO_AP_INT2
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CFG_FUNC0, // TMR32_PWM1 -> VIB_PWM
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CFG_FUNC0, // TMR32_PWM2 -> 45_AP_TO_TOUCH_CLK32K_RESET_L
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CFG_DISABLED | PULL_DOWN, // SWI_DATA -> N/C
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CFG_FUNC0, // DWI_DI -> 45_AP_TO_PMU_DWI_DI
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/* Port 9 */
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CFG_FUNC0 | DWI_DRIVE_STR, // DWI_DO -> 45_AP_TO_PMU_DWI_DO
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CFG_FUNC0 | DWI_DRIVE_STR, // DWI_CLK -> 45_AP_TO_PMU_DWI_CLK
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CFG_OUT_0, // SENSOR0_RST -> AP_TO_CAM_RF_SHUTDOWN
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CFG_FUNC0 | CAM_CLK_DRIVE_STR, // SENSOR0_CLK -> 45_CAM0_CLK_R
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CFG_OUT_0, // SENSOR1_RST -> AP_TO_CAM_FF_SHUTDOWN
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CFG_FUNC0 | CAM_CLK_DRIVE_STR, // SENSOR1_CLK -> 45_CAM1_CLK_R
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CFG_FUNC0, // CPU0_SWITCH -> CPU0_SWITCH
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CFG_FUNC0, // CPU1_SWITCH -> CPU1_SWITCH
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/* Port 10 */
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CFG_OUT_0, // ISP0_PRE_FLASH -> CAM0_TORCH
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CFG_DISABLED | PULL_DOWN, // ISP0_FLASH -> N/C
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CFG_DISABLED | PULL_DOWN, // ISP1_PRE_FLASH -> N/C
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CFG_DISABLED | PULL_DOWN, // ISP1_FLASH -> N/C
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CFG_FUNC0, // SPI3_MOSI -> AP_TO_CODEC_SPI3_MOSI
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CFG_FUNC0, // SPI3_MISO -> AP_TO_CODEC_SPI3_MISO
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CFG_FUNC0, // SPI3_SCLK -> AP_TO_CODEC_SPI3_CLK
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CFG_OUT_1, // SPI3_SSIN -> AP_TO_CODEC_SPI3_CS_L
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/* Port 11 */
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CFG_FUNC0, // I2C2_SDA -> AP_BI_I2C2_SDA
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CFG_FUNC0, // I2C2_SCL -> AP_TO_I2C2_SCL
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CFG_OUT_0, // GPIO_3V0 -> AP_TO_HEADSET_HS3_CONTROL
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CFG_OUT_0, // GPIO_3V1 -> AP_TO_HEADSET_HS4_CONTROL
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CFG_DISABLED | PULL_DOWN, // DP_HPD -> N/C
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CFG_DISABLED | PULL_DOWN, // LPDP_HPD -> N/C
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CFG_OUT_1, // UART0_TXD -> AP_TO_LEDDRV_EN
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CFG_OUT_0, // UART0_RXD -> VIB_LDO_EN
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/* Port 12 */
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CFG_DISABLED, // TST_CLKOUT -> AP_TO_PMU_TEST_CLKOUT
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CFG_DISABLED, // TST_STPCLK -> GND
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CFG_FUNC0, // WDOG -> WDOG
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 13 */
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 14 */
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 15 */
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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CFG_DISABLED, // ->
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/* Port 16 */
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CFG_FUNC0 | SLOW_SLEW, // I2S0_MCK -> AP_TO_CODEC_I2S0_MCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_LRCK -> AP_TO_CODEC_I2S0_LRCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_BCLK -> AP_TO_CODEC_I2S0_BCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S0_DOUT -> AP_TO_CODEC_I2S0_DOUT
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CFG_FUNC0, // I2S0_DIN -> AP_TO_CODEC_I2S0_DIN
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CFG_DISABLED | PULL_DOWN, // I2S1_MCK -> N/C
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_LRCK -> AP_TO_BB_I2S1_LRCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_BCLK -> AP_TO_BB_I2S1_BCLK
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/* Port 17 */
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S1_DOUT -> AP_TO_BB_I2S1_DOUT
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CFG_FUNC0, // I2S1_DIN -> AP_TO_BB_I2S1_DIN
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CFG_FUNC0 | SLOW_SLEW, // I2S2_MCK -> 45_AP_TO_SPKAMP_I2S2_MCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_LRCK -> AP_TO_CODEC_XSP_I2S2_LRCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_BCLK -> 45_AP_TO_CODEC_XSP_I2S2_BCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S2_DOUT -> AP_TO_CODEC_XSP_I2S2_DOUT
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CFG_FUNC0, // I2S2_DIN -> AP_TO_CODEC_XSP_I2S2_DIN
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CFG_DISABLED | PULL_DOWN, // I2S3_MCK -> N/C
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/* Port 18 */
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_LRCK -> AP_TO_BT_I2S3_BCLK
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CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_BCLK -> 45_AP_TO_BT_I2S3_LRCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S3_DOUT -> AP_TO_BT_I2S3_DOUT
|
||||
CFG_FUNC0, // I2S3_DIN -> AP_TO_BT_I2S3_DIN
|
||||
CFG_DISABLED | PULL_DOWN, // I2S4_MCK -> N/C
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_LRCK -> AP_TO_CODEC_VSP_I2S2_LRCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_BCLK -> 45_AP_TO_CODEC_VSP_I2S2_BCLK
|
||||
CFG_FUNC0 | I2S_DRIVE_STR, // I2S4_DOUT -> AP_TO_CODEC_VSP_I2S2_DOUT
|
||||
|
||||
/* Port 19 */
|
||||
CFG_FUNC0, // I2S4_DIN -> AP_TO_CODEC_VSP_I2S2_DIN
|
||||
CFG_DISABLED | PULL_DOWN, // SPDIF -> N/C
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN3 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN2 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN1 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN0 -> FMI0_CEN0_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_CLE -> FMI0_CLE
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI0_ALE -> FMI0_ALE
|
||||
|
||||
/* Port 20 */
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_REN -> FMI0_RE_N
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_WEN -> FMI0_WE_L
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_DOWN | FMI_HI_SPEED_DRIVE_STR, // FMI0_WENN -> FMI0_RE_P
|
||||
#else
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI0_WENN -> FMI0_RE_P
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO7 -> FMI0_IO[7]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO6 -> FMI0_IO[6]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO5 -> FMI0_IO[5]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO4 -> FMI0_IO[4]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQS -> FMI0_DQS_P
|
||||
|
||||
/* Port 21 */
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_UP | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQSN -> FMI0_DQS_N
|
||||
#else
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_DQSN -> FMI0_DQS_N
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO3 -> FMI0_IO[3]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO2 -> FMI0_IO[2]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO1 -> FMI0_IO[1]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI0_IO0 -> FMI0_IO[0]
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN7 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN6 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN5 ->
|
||||
|
||||
/* Port 22 */
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI0_CEN4 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN3 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN2 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN1 ->
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN0 -> FMI1_CEN0_L
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_CLE -> FMI1_CLE
|
||||
CFG_FUNC0 | FMI_LO_SPEED_DRIVE_STR, // FMI1_ALE -> FMI1_ALE
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_REN -> FMI1_RE_N
|
||||
|
||||
/* Port 23 */
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_WEN -> FMI1_WE_L
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_DOWN | FMI_HI_SPEED_DRIVE_STR, // FMI1_WENN -> FMI1_RE_P
|
||||
#else
|
||||
CFG_FUNC0 | FMI_HI_SPEED_DRIVE_STR, // FMI1_WENN -> FMI1_RE_P
|
||||
#endif
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO7 -> FMI1_IO[7]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO6 -> FMI1_IO[6]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO5 -> FMI1_IO[5]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO4 -> FMI1_IO[4]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQS -> FMI1_DQS_P
|
||||
#if DISABLE_OPTIONAL_SIGNALS
|
||||
CFG_DISABLED | PULL_UP | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQSN -> FMI1_DQS_N
|
||||
#else
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_DQSN -> FMI1_DQS_N
|
||||
#endif
|
||||
|
||||
/* Port 24 */
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO3 -> FMI1_IO[3]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO2 -> FMI1_IO[2]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO1 -> FMI1_IO[1]
|
||||
CFG_FUNC0 | BUS_HOLD | FMI_HI_SPEED_DRIVE_STR, // FMI1_IO0 -> FMI1_IO[0]
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN7 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN6 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN5 ->
|
||||
CFG_DISABLED | FMI_LO_SPEED_DRIVE_STR, // FMI1_CEN4 ->
|
||||
|
||||
/* Port 25 */
|
||||
CFG_OUT_0 | PULL_DOWN, // GPIO20 -> WLAN_HSIC3_RESUME
|
||||
CFG_IN | PULL_DOWN, // GPIO21 -> TOUCH_TO_AP_INT_L
|
||||
CFG_OUT_0, // GPIO22 -> LCD_RESET_L
|
||||
CFG_IN, // GPIO23 -> LCD_HIFA_BSYNC
|
||||
CFG_IN, // GPIO24 -> BB_RESET_L
|
||||
CFG_DISABLED, // GPIO25 -> BOOT_CONFIG[1]
|
||||
CFG_IN | PULL_DOWN, // GPIO26 -> FORCE_DFU
|
||||
CFG_DISABLED | PULL_DOWN, // GPIO27 -> DFU_STATUS
|
||||
|
||||
/* Port 26 */
|
||||
CFG_DISABLED, // GPIO28 -> BOOT_CONFIG[2]
|
||||
CFG_DISABLED, // GPIO29 -> BOOT_CONFIG[3]
|
||||
CFG_IN | PULL_UP, // GPIO30 -> CODEC_INT_L
|
||||
CFG_IN | PULL_DOWN, // GPIO31 -> PBL_RUN_BB_HSIC1_RDY
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 27 */
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
CFG_DISABLED, // ->
|
||||
|
||||
/* Port 28 */
|
||||
CFG_IN, // GPIO32 -> AP_TO_RADIO_ON_L
|
||||
CFG_IN | PULL_DOWN, // GPIO33 -> GYRO_TO_AP_INT1
|
||||
CFG_IN | PULL_UP, // GPIO34 -> COMPASS_INT_2
|
||||
CFG_OUT_0, // GPIO35 -> AP_TO_BB_WAKE_MODEM
|
||||
CFG_IN | PULL_DOWN, // GPIO36 -> AP_TO_ACCEL_INT2_L
|
||||
CFG_DISABLED | PULL_DOWN, // GPIO37 -> N/C
|
||||
CFG_IN | PULL_UP, // GPIO38 -> ALS_TO_AP_INT_L
|
||||
CFG_OUT_0, // GPIO39 -> AP_TO_TOUCH_GRAPE_RESET
|
||||
};
|
||||
|
||||
#undef HI_DRIVE_STR
|
||||
#undef BB_UART_DRIVE_STR
|
||||
#undef BT_UART_DRIVE_STR
|
||||
#undef DOCK_UART_DRIVE_STR
|
||||
#undef SWI_UART_DRIVE_STR
|
||||
#undef WIFI_UART_DRIVE_STR
|
||||
#undef FMI_LO_SPEED_DRIVE_STR
|
||||
#undef FMI_HI_SPEED_DRIVE_STR
|
||||
#undef GRAPE_IO_DRIVE_STR
|
||||
#undef GRAPE_CLK_DRIVE_STR
|
||||
#undef DWI_DRIVE_STR
|
||||
#undef I2C_DRIVE_STR
|
||||
#undef I2S_DRIVE_STR
|
||||
#undef CAM_I2C_DRIVE_STR
|
||||
#undef CAM_STROBE_DRIVE_STR
|
||||
#undef CAM_CLK_DRIVE_STR
|
||||
#undef DISABLE_OPTIONAL_SIGNALS
|
||||
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright (C) 2010-2012 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define PMU_IIC_BUS 0
|
||||
|
||||
/* this configuration is very PMU specific and must be included exactly once in power.c */
|
||||
#ifdef POWERCONFIG_PMU_SETUP
|
||||
|
||||
/* Matched to D1972A2-OTP-AE-v2 */
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1972_LDO1, 0x0A }, // PP3V0_ALWAYS 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO2, 0x2A }, // PP1V7_VA_L19 1.70V
|
||||
{ PMU_IIC_BUS, kD1972_LDO3, 0x10 }, // PP3V3_USB 3.30V
|
||||
{ PMU_IIC_BUS, kD1972_LDO4, 0x0F }, // PP2V8_CAM0_AF 2.55V
|
||||
{ PMU_IIC_BUS, kD1972_LDO5, 0x0A }, // PP3V0_NAND 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO6, 0x10 }, // PP3V3_ACC 3.30V
|
||||
{ PMU_IIC_BUS, kD1972_LDO7, 0x0F }, // P3V0_IMU 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO8, 0x14 }, // PP3V0_PROX_ALS 3.00V
|
||||
|
||||
// <rdar://problem/12061759>
|
||||
{ PMU_IIC_BUS, kD1972_TEST_MODE, 0x1D },
|
||||
{ PMU_IIC_BUS, 0xF5, 0x01 },
|
||||
{ PMU_IIC_BUS, kD1972_LDO9, 0x13 }, // PP3V0_VIB 3.10V
|
||||
{ PMU_IIC_BUS, 0xF5, 0x00 },
|
||||
{ PMU_IIC_BUS, kD1972_TEST_MODE, 0x00 },
|
||||
|
||||
{ PMU_IIC_BUS, kD1972_LDO10, 0x0A }, // PP3V0_PROX_IRLED 3.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO11, 0x17 }, // PP2V8_CAM_AVDD 2.85V
|
||||
{ PMU_IIC_BUS, kD1972_LDO12, 0x10 }, // PP1V0 1.00V
|
||||
{ PMU_IIC_BUS, kD1972_LDO16, 0xA0 }, // PP1V0_SRAM_PMU 1.00V
|
||||
{ PMU_IIC_BUS, kDIALOG_LDO_CONTROL, 0x00 }, // no bypass
|
||||
{ PMU_IIC_BUS, kD1972_BUCK_CTRL5, 0xD3 }, // Enable x_DWI_EN and CPUx_EN_CTRL
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE1, 0xFF }, // Everything on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE2, 0xF5 }, // Everything but LDO4, LDO6 on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE3, 0x23 }, // LDO16, LDO12, LDO11 on
|
||||
{ PMU_IIC_BUS, kD1972_ACTIVE4, 0xAD }, // CPU1V8, CPU1V2, CPUA_SW on
|
||||
{ PMU_IIC_BUS, kD1972_HIBERNATE1, 0x70 }, // BUCK3, BUCK4, LDO1 on
|
||||
{ PMU_IIC_BUS, kD1972_HIBERNATE2, 0x00 }, // Everything off
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL1, 0x02 }, // PP5V1_GRAPE_VDDH_PMU 5.10V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL2, 0x0E }, // PP5V7_LCD_AVDDH_PMU 5.70V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_CONTROL3, 0x00 }, // BB_VBUS_DET 5.00V
|
||||
{ PMU_IIC_BUS, kD1972_LCM_BST_CONTROL, 0x14 }, // LCM_VBOOST 6.00V
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_warm_init[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_ADC_CONTROL, kDIALOG_ADC_CONTROL_DEFAULTS },
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_cold_init[] =
|
||||
{
|
||||
/* Note: the following differences from OTP are intentional:
|
||||
- GPIO2,6,7,10 enable wake
|
||||
- GPIO5 enables CLK32
|
||||
- GPIO8 enables wake up and state change
|
||||
- GPIO10 pullup
|
||||
*/
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_2, 0x7A }, // BB_WAKE_AP In, L High, Wake, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_3, 0x09 }, // BB_PMU_ON_R_L Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_4, 0x7A }, // TRISTAR_INT In, L High, Wake, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_5, 0x49 }, // CLK32K_WIFI Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_6, 0xDA }, // BATTERY_SWI In, F Edge, Out Hib, Wake, PD, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_7, 0xBB }, // HOST_WAKE_WLAN In, R Edge, Wake, PD, No PU
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_8, 0xEA }, // MIKEY_INT_L In, Any Edge, Wake, PU, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_9, 0x09 }, // BT_REG_ON_R Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_10, 0xAA }, // HOST_WAKE_BT In, R Edge, Wake, PU, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_11, 0x09 }, // WIFI_REG_ON_R Out 0, Push-Pull, VBUCK3
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_12, 0x01 }, // PMU_TO_BB_VBUS_DET Out 0, Push-Pull, VCC_MAIN
|
||||
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB1, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB2, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB3, 0x02 }, // no debounce on GPIO6 [OTP: 0x12]
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB4, 0x02 }, // no debounce on GPIO8 [OTP: 0x12]
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB5, 0x12 },
|
||||
{ PMU_IIC_BUS, kD1972_SYS_GPIO_DEB6, 0x12 },
|
||||
|
||||
{ PMU_IIC_BUS, kDIALOG_SYS_CONTROL2, 0x11 }, // enable HIB_32kHz (for WIFI/BT) & DWI
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_enable[] =
|
||||
{
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_disable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_CONTROL, 0x0 } // disable LED power
|
||||
};
|
||||
|
||||
static const struct core_rails_struct soc_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK2 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct cpu_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kDIALOG_BUCK0 }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct ram_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kD1972_LDO16 }
|
||||
};
|
||||
|
||||
#endif /* POWERCONFIG_PMU_SETUP */
|
||||
|
||||
#define NO_BATTERY_VOLTAGE 2700
|
||||
#define MIN_BOOT_BATTERY_VOLTAGE 3600
|
||||
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
|
||||
#define TARGET_BOOT_BATTERY_CAPACITY 50
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 824
|
||||
|
||||
#define TARGET_DISPLAY_VOLTAGE_BASE 6000
|
||||
#define TARGET_DISPLAY_VOLTAGE_SCALE 50
|
||||
#define TARGET_DISPLAY_BOOST_LDO kD1972_LCM_CONTROL2
|
||||
#define TARGET_DISPLAY_BOOST_OFFSET 300
|
||||
|
||||
#define ACC_PWR_LDO (6)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_RADIOCONFIG_H
|
||||
#define __TARGET_RADIOCONFIG_H
|
||||
|
||||
/* configuration per target */
|
||||
|
||||
#define RADIO_VERIFY_BASEBAND_EXISTS 1
|
||||
|
||||
static const gpio_t target_radio_quiesce_pins[] =
|
||||
{
|
||||
GPIO_UART1_TXD
|
||||
};
|
||||
|
||||
#define RADIO_ENABLE_IMEI_OVERRIDE 0
|
||||
|
||||
#endif /* ! __TARGET_RADIOCONFIG_H */
|
||||
@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define two debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (6)
|
||||
|
||||
/* define radio serial port */
|
||||
#define RADIO_SERIAL_PORT (1)
|
||||
#define RADIO_MAX_READ_ERRORS (10)
|
||||
|
||||
/* define HDQ serial port */
|
||||
#define HDQGAUGE_SERIAL_PORT (5)
|
||||
|
||||
#define UART_FLOWCONTROL_MASK (0x08)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,686 @@
|
||||
/*
|
||||
* Copyright (C) 2011-2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <debug.h>
|
||||
#include <drivers/display.h>
|
||||
#if WITH_HW_DISPLAY_PMU
|
||||
#include <drivers/display_pmu.h>
|
||||
#endif
|
||||
#include <drivers/flash_nor.h>
|
||||
#include <drivers/iic.h>
|
||||
#include <drivers/power.h>
|
||||
#include <lib/devicetree.h>
|
||||
#include <lib/env.h>
|
||||
#include <lib/mib.h>
|
||||
#include <lib/syscfg.h>
|
||||
#include <platform.h>
|
||||
#include <platform/gpio.h>
|
||||
#include <platform/gpiodef.h>
|
||||
#include <platform/memmap.h>
|
||||
#include <sys.h>
|
||||
#include <sys/boot.h>
|
||||
#include <sys/menu.h>
|
||||
#include <sys/task.h>
|
||||
#include <target.h>
|
||||
|
||||
// Board ID/Board Rev matrix:
|
||||
|
||||
// Board ID: N48 MLB: 1010, N49 MLB: 1110
|
||||
// Board Rev 1111: PreProto+Tristar1+Chestnut Combined Rail (Not supported by SW)
|
||||
// Board Rev 1101: Proto1+Tristar1+Chestnut Split Rail+d404 display panel
|
||||
// Board Rev 1100: Proto1+Tristar2+Chestnut Split Rail+d404 display panel
|
||||
// Board Rev 1011: EVT1+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
// Board Rev 1010: EVT2+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
// Board Rev 1001: DVT+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
|
||||
// Board ID: N48 Dev: 1011, N49 DEV: 1111
|
||||
// Board Rev 1111: Dev1+Tristar1+Chestnut Combined Rail+d401 display panel
|
||||
// Board Rev 1101: Proto1+Tristar1+Chestnut Split Rail+d404 display panel
|
||||
// Board Rev 1100: Proto1+Tristar2+Chestnut Split Rail+d404 display panel
|
||||
// Board Rev 1011: EVT1+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
// Board Rev 1010: EVT2+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
// Board Rev 1001: DVT+Tristar2+Chestnut Split Rail+d404 display panel+L81 audio
|
||||
|
||||
#define N48_AP_BOARD_ID (0xA) // AP board ID
|
||||
#define N48_DEV_BOARD_ID (0xB) // DEV board ID
|
||||
|
||||
#define N49_AP_BOARD_ID (0xE) // AP board ID
|
||||
#define N49_DEV_BOARD_ID (0xF) // DEV board ID
|
||||
|
||||
#define DEV1_BOARD (0xF) // Dev1 + Tristar1 + Chestnut Combined Rail
|
||||
#define DEV1A_BOARD (0xE) // Dev1 + Tristar2 + Chestnut Combined Rail
|
||||
#define DEV1B_BOARD (0xC) // Dev1 + Tristar2 + Chestnut Split Rail
|
||||
#define DEV1C_BOARD (0xB) // Dev1 + Tristar2 + Chestnut Split Rail + L81 audio
|
||||
#define PROTO1A_BOARD (0xD) // Proto1 + Tristar1 + Chestnut Split Rail
|
||||
#define PROTO1B_BOARD (0xC) // Proto1 + Tristar2 + Chestnut Split Rail
|
||||
#define EVT1_BOARD (0xB) // EVT1 + Tristar2 + Chestnut Split Rail + L81 audio
|
||||
#define EVT2_BOARD (0xA) // EVT2 + Tristar2 + Chestnut Split Rail + L81 audio
|
||||
#define DVT_BOARD (0x9) // DVT + Tristar2 + Chestnut Split Rail + L81 audio
|
||||
|
||||
static u_int32_t iphone5b_get_board_rev(void);
|
||||
static bool iphone5b_with_chestnut_split_rail(void);
|
||||
static uint32_t display_config;
|
||||
|
||||
MIB_CONSTANT(kMIBTargetBacklight0I2CBus, kOIDTypeUInt32, 0);
|
||||
MIB_CONSTANT(kMIBTargetBacklight0I2CAddress, kOIDTypeUInt32, 0xC6);
|
||||
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 2);
|
||||
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 0);
|
||||
|
||||
// Don't panic for these targets because of <rdar://problem/14236421>.
|
||||
MIB_CONSTANT(kMIBTargetPanicOnUnknownDclrVersion, kOIDTypeBoolean, false);
|
||||
|
||||
void target_early_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_late_init(void)
|
||||
{
|
||||
if (iphone5b_get_board_rev() > DEV1_BOARD) {
|
||||
platform_not_supported();
|
||||
}
|
||||
}
|
||||
|
||||
void target_init(void)
|
||||
{
|
||||
#if WITH_HW_FLASH_NOR
|
||||
flash_nor_init(SPI_NOR0);
|
||||
#endif
|
||||
|
||||
// All AP and PMU GPIOS for the radios are set by pinconfig.h
|
||||
// and powerconfig.h. While the AP settings are compatible with wake,
|
||||
// the BB PMU will be in reset thanks to powerconfig.h providing
|
||||
// dedicated cold boot settings. The AppleARMFunctions in the device
|
||||
// tree will take care of the rest for a cold boot.
|
||||
|
||||
if (iphone5b_get_board_rev() == EVT1_BOARD) {
|
||||
// <rdar://problem/12982626> Switch Tristar to Pulsing Con Detect mode for n5x and n48/n49
|
||||
iic_write(0, 0x35, (uint8_t[]){ 0x1e, 0x30 }, 2);
|
||||
}
|
||||
}
|
||||
|
||||
void target_quiesce_hardware(void)
|
||||
{
|
||||
}
|
||||
|
||||
void target_poweroff(void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
int target_bootprep(enum boot_target target)
|
||||
{
|
||||
switch (target) {
|
||||
case BOOT_DARWIN:
|
||||
case BOOT_DARWIN_RESTORE:
|
||||
case BOOT_DIAGS:
|
||||
break;
|
||||
|
||||
default:
|
||||
; // do nothing
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool target_should_recover(void)
|
||||
{
|
||||
return platform_get_request_dfu2() && power_has_usb();
|
||||
}
|
||||
|
||||
bool target_should_poweron(bool *cold_button_boot)
|
||||
{
|
||||
#if WITH_HW_POWER
|
||||
if (power_get_boot_flag() == kPowerBootFlagColdButton) *cold_button_boot = true;
|
||||
#else
|
||||
*cold_button_boot = false;
|
||||
#endif
|
||||
|
||||
return !*cold_button_boot || platform_get_request_dfu1();
|
||||
}
|
||||
|
||||
bool target_should_poweroff(bool at_boot)
|
||||
{
|
||||
return platform_get_request_dfu1() && (!at_boot || !power_has_usb());
|
||||
}
|
||||
|
||||
#if APPLICATION_IBOOT
|
||||
void target_watchdog_tickle(void)
|
||||
{
|
||||
u_int32_t value = gpio_read(GPIO_WDOG_TICKLE);
|
||||
gpio_write(GPIO_WDOG_TICKLE, value ^ 1);
|
||||
}
|
||||
#endif // APPLICATION_IBOOT
|
||||
|
||||
void * target_get_display_configuration(void)
|
||||
{
|
||||
display_config = 0x00000964;
|
||||
return ((void *)(&display_config));
|
||||
}
|
||||
|
||||
#if WITH_ENV
|
||||
|
||||
void target_setup_default_environment(void)
|
||||
{
|
||||
env_set("boot-device", "nand0", 0);
|
||||
env_set("display-color-space","RGB888", 0);
|
||||
env_set("display-timing", "n41", 0);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
bool target_has_tristar2(void)
|
||||
{
|
||||
u_int32_t board_rev = iphone5b_get_board_rev();
|
||||
return board_rev != DEV1_BOARD && board_rev != PROTO1A_BOARD;
|
||||
}
|
||||
|
||||
#if WITH_HW_CHESTNUT
|
||||
uint8_t target_get_lcm_ldos(void)
|
||||
{
|
||||
// N48 dev and ap boards have different display PMU rail topologes:
|
||||
|
||||
// Split rail topology (ap boards with D404 display module)
|
||||
// LDO1: PP5V7_SAGE_AVDDH
|
||||
// LDO2: PP5V7_TO_LCD_AVDDH
|
||||
// LDO3: PP5V1_GRAPE_VDDH
|
||||
|
||||
// Combined rail topology (dev boards with D401 display module)
|
||||
// LDO1: PP5V7_SAGE_AND_LCM_AVDDH
|
||||
// LDO2: PP5V1_GRAPE_VDDH
|
||||
// LDO3: Unused
|
||||
|
||||
if (iphone5b_with_chestnut_split_rail()) {
|
||||
return (DISPLAY_PMU_LDO(0) | DISPLAY_PMU_LDO(1));
|
||||
}
|
||||
// The combined rail topology requires only LDO1 to be enabled.
|
||||
return DISPLAY_PMU_LDO(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if WITH_DEVICETREE
|
||||
|
||||
int target_update_device_tree(void)
|
||||
{
|
||||
#if WITH_HW_DISPLAY_PINOT
|
||||
DTNode *clcd_node, *backlight_node;
|
||||
#endif
|
||||
DTNode *node;
|
||||
uint32_t propSize;
|
||||
char *propName, *propStr;
|
||||
void *propData;
|
||||
|
||||
#if WITH_HW_DISPLAY_PINOT
|
||||
// Find the CLCD node
|
||||
FindNode(0, "arm-io/clcd", &clcd_node);
|
||||
|
||||
if (FindNode(0, "arm-io/mipi-dsim/lcd", &node)) {
|
||||
extern int pinot_update_device_tree(DTNode *pinot_node, DTNode *clcd_node, DTNode *backlight_node);
|
||||
|
||||
FindNode(0, "backlight", &backlight_node);
|
||||
pinot_update_device_tree(node, clcd_node, backlight_node);
|
||||
|
||||
// Set Chestnut LDO based upon split/combined rail topology.
|
||||
propName = "function-lcd_ldo";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
if (iphone5b_with_chestnut_split_rail())
|
||||
((uint8_t *)propData)[8] = 1; // V02 -> PP5V7_CHESTNUT_LDO2
|
||||
else
|
||||
((uint8_t *)propData)[8] = 0; // V01 -> PP5V7_CHESTNUT_LDO1
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
// Update the highland-park node with acoustic transducer scale data
|
||||
if (FindNode(0, "arm-io/highland-park", &node)) {
|
||||
propName = "at-scale";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ATSc', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the codec and speaker nodes with acoustic transducer scale data
|
||||
{
|
||||
uint8_t atscData[20];
|
||||
|
||||
if (syscfgCopyDataForTag('ATSc', atscData, sizeof(atscData)) > 0) {
|
||||
// Update codec
|
||||
if (FindNode(0, "arm-io/spi3/audio-codec", &node)) {
|
||||
propName = "at-scale-imic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[0], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-smic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[4], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-fmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[8], sizeof(uint32_t));
|
||||
}
|
||||
propName = "at-scale-rcvr";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[12], sizeof(uint32_t));
|
||||
}
|
||||
}
|
||||
// Update speaker
|
||||
if (FindNode(0, "arm-io/i2c0/audio-speaker", &node)) {
|
||||
propName = "at-scale";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, &atscData[16], sizeof(uint32_t));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Update the speaker calibration data
|
||||
if (FindNode(0, "arm-io/i2c0/audio-speaker", &node)) {
|
||||
propName = "speaker-rdc";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('SRdc', propData, propSize);
|
||||
}
|
||||
propName = "speaker-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint8_t vpbr;
|
||||
if (syscfgCopyDataForTag('VPBR', &vpbr, sizeof(vpbr)) == 1) {
|
||||
((uint8_t *)propData)[12] = (((uint8_t *)propData)[12] & ~0x1f) | (vpbr & 0x1f);
|
||||
}
|
||||
uint8_t vbst;
|
||||
if (syscfgCopyDataForTag('VBST', &vbst, sizeof(vbst)) == 1) {
|
||||
((uint8_t *)propData)[16] = vbst;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
switch ( iphone5b_get_board_rev() ) {
|
||||
case DEV1_BOARD:
|
||||
case DEV1A_BOARD:
|
||||
case PROTO1A_BOARD:
|
||||
case PROTO1B_BOARD: // DEV1B_BOARD same as PROTO1B_BOARD
|
||||
{
|
||||
static const uint8_t l20cfg[]={0x90,0x00,0x01,0x90,0x62,0x03,0x12,0x1e,0x02,0x04,0x0A,0x05,0x6b,0x63,0x06,0x32,0x74,0x03,0x00,0x00 };
|
||||
|
||||
if (FindNode(0, "arm-io/i2c0/audio-speaker", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propData, "audio-control,cs35l20", kPropNameLength);
|
||||
}
|
||||
|
||||
propName = "speaker-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
memcpy(propData, (void*)l20cfg, sizeof(l20cfg));
|
||||
}
|
||||
|
||||
propName = "l67_func-ext_active";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-ext_active", kPropNameLength);
|
||||
}
|
||||
|
||||
propName = "l67_func-ext_master";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-ext_master", kPropNameLength);
|
||||
}
|
||||
}
|
||||
|
||||
// MCLK provides 6MHz for L20 on I2S2_MCLK pin
|
||||
if (FindNode(0, "arm-io/i2s2/audio-bluetooth", &node)) {
|
||||
propName = "reg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint32_t*)propData)[2] = 0x005b8d80;
|
||||
}
|
||||
}
|
||||
|
||||
if (FindNode(0, "arm-io/spi3/audio-codec", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propData, "audio-control,cs42l67", propSize);
|
||||
}
|
||||
propName = "function-xsp_active";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-vsp_active", kPropNameLength);
|
||||
}
|
||||
propName = "function-xsp_master";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-vsp_master", kPropNameLength);
|
||||
}
|
||||
propName = "function-l67_xsp_active";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-xsp_active", kPropNameLength);
|
||||
}
|
||||
propName = "function-l67_xsp_master";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-xsp_master", kPropNameLength);
|
||||
}
|
||||
propName = "function-xsp_sidetone_active";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
propName = "l67_aout2-hac";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "aout2-hac", kPropNameLength);
|
||||
}
|
||||
propName = "mic3-intmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "ain1-intmic", kPropNameLength);
|
||||
}
|
||||
propName = "mic2-extmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "ain2-extmic", kPropNameLength);
|
||||
}
|
||||
propName = "mic1-intmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "ain5-intmic", kPropNameLength);
|
||||
}
|
||||
propName = "mic4-intmic";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "ain6-intmic", kPropNameLength);
|
||||
}
|
||||
}
|
||||
if (FindNode(0, "arm-io/i2s0/audio-codec", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propData, "audio-data,cs42l67", propSize);
|
||||
}
|
||||
propName = "reg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint8_t *)propData)[0] = 0x11;
|
||||
}
|
||||
propName = "l67_func-clock_src_system";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-clock_src_system", kPropNameLength);
|
||||
}
|
||||
propName = "l67_func-clock_src_baseband";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-clock_src_baseband", kPropNameLength);
|
||||
}
|
||||
}
|
||||
if (FindNode(0, "arm-io/mca0/audio-codec-reference", &node)) {
|
||||
propName = "AAPL,ignore";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
propName[0] = '~';
|
||||
}
|
||||
}
|
||||
if (FindNode(0, "arm-io/mca0/audio-codec-sidetone", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "AAPL,ignore", kPropNameLength);
|
||||
}
|
||||
}
|
||||
if (FindNode(0, "arm-io/mca1/audio-codec-voice", &node)) {
|
||||
propName = "reg";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
((uint8_t *)propData)[0] = 0x01;
|
||||
}
|
||||
propName = "l67_clock-sources";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "clock-sources", kPropNameLength);
|
||||
}
|
||||
propName = "l67_func-clock_src_route_i2sM";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-clock_src_route_i2sM", kPropNameLength);
|
||||
}
|
||||
propName = "l67_func-clock_src_route_bb2w";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propName, "function-clock_src_route_bb2w", kPropNameLength);
|
||||
}
|
||||
}
|
||||
|
||||
} break;
|
||||
}
|
||||
|
||||
// Update the backlight calibration data
|
||||
if (FindNode(0, "backlight", &node)) {
|
||||
propName = "backlight-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('BLCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the compass calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/compass", &node)) {
|
||||
propName = "compass-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPAS', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the compass calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/compass1", &node)) {
|
||||
propName = "compass-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CPAS', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the als calibration data
|
||||
if (FindNode(0, "arm-io/i2c2/als", &node)) {
|
||||
propName = "alsCalibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AlsC', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update the gyro calibration data
|
||||
if (FindNode(0, "arm-io/i2c0/gyro", &node)) {
|
||||
propName = "low-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTGO', propData, propSize);
|
||||
}
|
||||
propName = "high-temp-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('HTGO', propData, propSize);
|
||||
}
|
||||
propName = "gyro-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GSCl', propData, propSize);
|
||||
}
|
||||
propName = "gyro-temp-table";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GYTT', propData, propSize);
|
||||
}
|
||||
propName = "gyro-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('GICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update accelerometer calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/accelerometer", &node)) {
|
||||
propName = "low-temp-accel-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTAO', propData, propSize);
|
||||
}
|
||||
propName = "accel-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ASCl', propData, propSize);
|
||||
}
|
||||
propName = "accel-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update accelerometer calibration data
|
||||
if (FindNode(0, "arm-io/i2c1/accelerometer1", &node)) {
|
||||
propName = "low-temp-accel-offset";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('LTAO', propData, propSize);
|
||||
}
|
||||
propName = "accel-sensitivity-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('ASCl', propData, propSize);
|
||||
}
|
||||
propName = "accel-interrupt-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('AICl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// Update prox calibration data
|
||||
if (FindNode(0, "arm-io/spi1/multi-touch", &node)) {
|
||||
// Set multi-touch compatibility based upon split/combined rail topology.
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
if (iphone5b_with_chestnut_split_rail())
|
||||
propStr = "multi-touch,n48";
|
||||
else
|
||||
propStr = "multi-touch,n41";
|
||||
|
||||
memset(propData, 0, propSize);
|
||||
strlcpy(propData, propStr, propSize);
|
||||
}
|
||||
|
||||
// Set Chestnut LDO based upon split/combined rail topology.
|
||||
propName = "function-power_ana";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
if (iphone5b_with_chestnut_split_rail())
|
||||
((uint8_t *)propData)[8] = 2; // V03 -> PP5V1_CHESTNUT_LDO3
|
||||
else
|
||||
((uint8_t *)propData)[8] = 1; // V02 -> PP5V1_CHESTNUT_LDO2
|
||||
}
|
||||
|
||||
propName = "prox-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('PxCl', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// vibrator calibration
|
||||
if (FindNode(0, "arm-io/pwm/vibrator", &node)) {
|
||||
propName = "duty-cycle";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint32_t pct;
|
||||
if (syscfgCopyDataForTag('VLSg', (void *)&pct, sizeof(pct)) > 0) {
|
||||
((uint32_t *)propData)[0] = ((uint64_t)pct << 32) / 100;
|
||||
}
|
||||
}
|
||||
propName = "intensity-config";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
uint32_t pct;
|
||||
if (syscfgCopyDataForTag('VLWk', (void *)&pct, sizeof(pct)) > 0) {
|
||||
((uint32_t *)propData)[1] = ((uint64_t)pct << 32) / 100;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Update charger calibration data
|
||||
if (FindNode(0, "charger", &node)) {
|
||||
propName = "usb-input-limit-calibration";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
syscfgCopyDataForTag('CBAT', propData, propSize);
|
||||
}
|
||||
}
|
||||
|
||||
// TriStar 1 on older systems
|
||||
if (!target_has_tristar2()) {
|
||||
if (FindNode(0, "arm-io/i2c0/tristar", &node)) {
|
||||
propName = "compatible";
|
||||
if (FindProperty(node, &propName, &propData, &propSize)) {
|
||||
strlcpy(propData, "tristar,cbtl1608", kPropNameLength);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if WITH_HW_DISPLAY_PMU
|
||||
display_pmu_update_device_tree("arm-io/i2c0/display-pmu");
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static bool gpio_board_rev_valid;
|
||||
static u_int32_t gpio_board_rev;
|
||||
|
||||
static u_int32_t iphone5b_get_board_rev(void)
|
||||
{
|
||||
|
||||
if (!gpio_board_rev_valid) {
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
|
||||
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_IN);
|
||||
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PDN);
|
||||
gpio_configure_pupdn(GPIO_BOARD_REV3, GPIO_PDN);
|
||||
|
||||
spin(100); // Wait 100us
|
||||
|
||||
gpio_board_rev =
|
||||
(gpio_read(GPIO_BOARD_REV3) << 3) |
|
||||
(gpio_read(GPIO_BOARD_REV2) << 2) |
|
||||
(gpio_read(GPIO_BOARD_REV1) << 1) |
|
||||
(gpio_read(GPIO_BOARD_REV0) << 0);
|
||||
|
||||
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
|
||||
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_DFLT);
|
||||
|
||||
gpio_board_rev_valid = true;
|
||||
}
|
||||
|
||||
return gpio_board_rev;
|
||||
}
|
||||
|
||||
static bool iphone5b_with_chestnut_split_rail(void)
|
||||
{
|
||||
if ((platform_get_board_id() == N48_DEV_BOARD_ID)
|
||||
|| (platform_get_board_id() == N49_DEV_BOARD_ID)) {
|
||||
u_int32_t board_rev = iphone5b_get_board_rev();
|
||||
if ((board_rev == DEV1_BOARD) || (board_rev == DEV1A_BOARD)) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
#if WITH_PAINT
|
||||
|
||||
// The default background is expected to to be black and the artwork is expected
|
||||
// to be white. This arrangement will be inverted depending upon the cover glass
|
||||
// color of the device.
|
||||
|
||||
// Sample DClr_override values for testing devices without DClr syscfg entries (enclosure/cover glass):
|
||||
// white/black: setenv DClr_override 00020000F7F4F5003C3B3B0000000000
|
||||
// yellow/black: setenv DClr_override 0002000089F1FA003C3B3B0000000000
|
||||
// pink/black: setenv DClr_override 000200007A76FE003C3B3B0000000000
|
||||
// blue/black: setenv DClr_override 00020000E0AB46003C3B3B0000000000
|
||||
// green/black: setenv DClr_override 0002000077E8A1003C3B3B0000000000
|
||||
|
||||
static color_policy_invert_t target_cover_glass_color_table[] = {
|
||||
{ RGB( 59, 59, 60), false }, // Black - black background, white logo
|
||||
};
|
||||
|
||||
color_policy_t *target_color_map_init(enum colorspace cs, color_policy_t *color_policy)
|
||||
{
|
||||
// Must have a color policy structure passed in.
|
||||
if (color_policy == NULL)
|
||||
goto fail;
|
||||
|
||||
// We only support the RGB888 colorspace.
|
||||
if (cs != CS_RGB888)
|
||||
goto fail;
|
||||
|
||||
color_policy->policy_type = COLOR_MAP_POLICY_INVERT;
|
||||
color_policy->color_table = (void *)target_cover_glass_color_table;
|
||||
color_policy->color_count = ARRAY_SIZE(target_cover_glass_color_table);
|
||||
color_policy->map_color = NULL; // Use standard remapper
|
||||
|
||||
return color_policy;
|
||||
|
||||
fail:
|
||||
return NULL;
|
||||
}
|
||||
#endif // WITH_PAINT
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2014 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#include <drivers/apple/gpio.h>
|
||||
#include <platform/soc/hwregbase.h>
|
||||
#include <target.h>
|
||||
|
||||
#define PIN_CFG_AP 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_AP
|
||||
|
||||
#define PIN_CFG_DEV 1
|
||||
#include <target/pinconfig.h>
|
||||
#undef PIN_CFG_DEV
|
||||
|
||||
const uint32_t *target_get_default_gpio_cfg(uint32_t gpioc)
|
||||
{
|
||||
if (target_config_ap())
|
||||
return gpio_default_cfg_ap;
|
||||
else
|
||||
return gpio_default_cfg_dev;
|
||||
}
|
||||
@@ -0,0 +1,37 @@
|
||||
# Copyright (C) 2011-2012 Apple Inc. All rights reserved.
|
||||
#
|
||||
# This document is the property of Apple Inc.
|
||||
# It is considered confidential and proprietary.
|
||||
#
|
||||
# This document may not be reproduced or transmitted in any form,
|
||||
# in whole or in part, without the express written permission of
|
||||
# Apple Inc.
|
||||
#
|
||||
LOCAL_DIR := $(GET_LOCAL_DIR)
|
||||
TARGET_DIR := $(LOCAL_DIR)
|
||||
|
||||
OPTIONS += \
|
||||
DIALOG_D1972=1 \
|
||||
TARGET_BOOT_CPU_VOLTAGE=0 \
|
||||
TARGET_BOOT_RAM_VOLTAGE=CHIPID_RAM_VOLTAGE_LOW \
|
||||
TARGET_BOOT_SOC_VOLTAGE=CHIPID_SOC_VOLTAGE_MED \
|
||||
TARGET_RAM_VOLTAGE_OFFSET=17 \
|
||||
TARGET_DWI_FREQUENCY=24000000 \
|
||||
TARGET_DWI_TRANSFER_GAP_US=5 \
|
||||
TARGET_USE_HSIC=1 \
|
||||
TARGET_DSIM_CONFIG=0x00400000 \
|
||||
TARGET_DSIM_DPHYCTL=0x30 \
|
||||
TARGET_DSIM_UP_CODE=0x5 \
|
||||
TARGET_DSIM_DOWN_CODE=0x1 \
|
||||
TARGET_DSIM_SUPPRESS=0x1 \
|
||||
AMC_NUM_CHANNELS=2 \
|
||||
AMC_NUM_RANKS=1 \
|
||||
AMC_CHANNEL_WIDTH=4 \
|
||||
MULTITOUCH_DTPATH=\"arm-io/spi1/multi-touch\" \
|
||||
BASEBAND_DTPATH=\"baseband\" \
|
||||
WIFI_DTPATH=\"arm-io/usb-complex/usb-ehci/wlan\"
|
||||
|
||||
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
|
||||
|
||||
ALL_OBJS += $(LOCAL_DIR)/init.o \
|
||||
$(LOCAL_DIR)/pinconfig.o
|
||||
Reference in new issue
Block a user