AMC Initialization Sequence

0. AMC Prolog

Program SPLL registers

1. AMC Initial Configuration

Perform the proper configurations of the AMC. Note that all the timing parameters should be programmed with respect to the normal clock, not the slow boot clock.

Setting up MCU registers and FSP for Freq change

2. AMP Initial Configurations

Perform the proper configurations of the AMP. There are two separate AMP register blocks; the code below must be repeated on both AMP0 and AMP1. (N=0..1)

3. Self-Refresh Exit

Prior to this step, the DRAM is assumed to be in the self-refresh state, and CKE has been kept low, either by retention circuitry in the PHY/IO, or, after SOC power is up and the reset is done, by the controller. This step will take DRAM out of the self-refresh mode. Software must guarantee that at least 50 us have passed since the de- assertion of AMC reset before self-refresh exit, in the resume-boot case. The frequency change to 50MHz here is initiated by PMGR. For ResumeBoot, the auto-refresh must be enabled before exiting self-refresh state.

4. DRAM Reset, ZQ Calibration & Configuration (Cold Boot Only).

This step is only required for ColdBoot. This step is to be repeated for each of the number of ranks per channel. The dramcmd.mrcmdch{N}.MRCmdCsCh{N} bit (Noted by letter R in the section) should be incremented in each loop.

5. Topology-specific configuration.

Here we perform MRR's to the memory to find out device density and program addrcfg, DramAccCtrl and mccchnldec registers

6. Prepare for switch from boot-clock speed to normal operation speed

The frequency change is initiated by PMGR.

11. Setup registers for CA calibration for bucket 0

12. AMP Dynamic Address Timing Calibration

13. Setup registers for DQ calibration for bucket 0

14. AMP Dynamic DQ Calibration

15. Setup registers for boot.

16. Enable other features

17. Enable the Fast Critical Word Forwarding feature (optional)

18. Enable Power & ClockGating features and Configure the MCC and Global Timer