/* * Copyright (C) 2013 Apple Inc. All rights reserved. * * This document is the property of Apple Inc. * It is considered confidential and proprietary. * * This document may not be reproduced or transmitted in any form, * in whole or in part, without the express written permission of * Apple Inc. */ #ifndef _LPDP_REGS_H #define _LPDP_REGS_H #define DPTX_VERSION 0x0010 #define DPTX_FUNCTION_ENABLE_1 0x0018 #define DPTX_VID_CAP_FUNC_EN_N (1 << 6) #define DPTX_VID_FIFO_FUNC_EN_N (1 << 5) #define DPTX_LINK_CONTROLLER_RESET (1 << 1) #define DPTX_SW_FUNC_EN_N (1 << 0) #define DPTX_FUNCTION_ENABLE_2 0x001C #define DPTX_SSC_FUNC_EN_N (1 << 7) #define DPTX_AUX_FUNC_EN_N (1 << 2) #define DPTX_SERDES_FIFO_FUNC_EN_N (1 << 1) #define DPTX_LS_CLK_DOMAIN_FUNC_EN_N (1 << 0) #define DPTX_VIDEO_CONTROL_1 0x0020 #define DPTX_VIDEO_EN (1 << 7) #define DPTX_VIDEO_MUTE (1 << 6) #define DPTX_FRAME_CHANGE_EN (1 << 0) #define DPTX_VIDEO_CONTROL_2 0x0024 #define DPTX_VIDEO_CTL_2_IN_D_RANGE_SHIFT 7 #define DPTX_IN_D_RANGE (1 << 7) #define DPTX_IN_BPC_12_BITS (3 << 4) #define DPTX_IN_BPC_10_BITS (2 << 4) #define DPTX_IN_BPC_8_BITS (1 << 4) #define DPTX_IN_BPC_6_BITS (0 << 4) #define DPTX_IN_COLOR_F_YCBCR444 (2 << 0) #define DPTX_IN_COLOR_F_YCBCR422 (1 << 0) #define DPTX_IN_COLOR_F_RGB (0 << 0) #define DPTX_VIDEO_CONTROL_3 0x0028 #define DPTX_IN_YC_COEFFI (1 << 7) #define DPTX_IN_YC_COEFFI_SHIFT (7) #define DPTX_IN_YC_COEFFI_MASK (1 << 7) #define DPTX_VID_CHK_UPDATE_TYPE (1 << 4) #define DPTX_VIDEO_CONTROL_4 0x002C #define DPTX_BIST_EN (1 << 3) #define DPTX_BIST_WIDTH (1 << 2) #define DPTX_BIST_TYPE(n) ((n) << 0) #define DPTX_VIDEO_CONTROL_8 0x003C #define DPTX_VID_HRES_TH(n) (n << 4) #define DPTX_VID_VRES_TH(n) (n << 0) #define DPTX_VIDEO_CONTROL_10 0x0044 #define DPTX_F_SEL (1 << 4) #define DPTX_SLAVE_I_SCAN_CFG (1 << 2) #define DPTX_SLAVE_VSYNC_P_CFG (1 << 1) #define DPTX_SLAVE_HSYNC_P_CFG (1 << 0) #define DPTX_TOTAL_LINE_CFG 0x0048 #define DPTX_ACTIVE_LINE_CFG 0x004C #define DPTX_VERTICAL_FRONT_PORCH_CFG 0x0050 #define DPTX_V_F_PORCH_CFG(n) ((n) << 0) #define DPTX_VERTICAL_SYNC_WIDTH_CFG 0x0054 #define DPTX_V_SYNC_WIDTH_CFG(n) ((n) << 0) #define DPTX_VERTICAL_BACK_PORCH_CFG 0x0058 #define DPTX_V_B_PORCH_CFG(n) ((n) << 0) #define DPTX_TOTAL_PIXEL_CFG 0x005C #define DPTX_ACTIVE_PIXEL_CFG 0x0060 #define DPTX_HORIZON_FRONT_PORCH_CFG 0x0064 #define DPTX_H_F_PORCH_CFG(n) ((n) << 0) #define DPTX_HORIZON_SYNC_WIDTH_CFG 0x0068 #define DPTX_H_SYNC_CFG(n) ((n) << 0) #define DPTX_HORIZON_BACK_PORCH_CFG 0x006C #define DPTX_H_B_PORCH_CFG(n) ((n) << 0) #define DPTX_AUX_LINES_START 0x0070 #define DPTX_AUX_LINES_END 0x0074 #define DPTX_VIDEO_STATUS 0x008C #define DPTX_FIELD_S (1 << 3) #define DPTX_I_SCAN_S (1 << 2) #define DPTX_VSYNC_P_S (1 << 1) #define DPTX_HSYNC_P_S (1 << 0) #define DPTX_TOTAL_LINE_STATUS 0x0090 #define DPTX_TOTAL_LINE_STA(n) ((n) << 0) #define DPTX_ACTIVE_LINE_STATUS 0x0094 #define DPTX_ACTIVE_LINE_STA(n) ((n) << 0) #define DPTX_VERTICAL_FRONT_PORCH_STATUS 0x0098 #define DPTX_V_F_PORCH_STA(n) ((n) << 0) #define DPTX_VERTICAL_SYNC_WIDTH_STATUS 0x009C #define DPTX_V_SYNC_STA(n) ((n) << 0) #define DPTX_VERTICAL_BACK_PORCH_STATUS 0x00A0 #define DPTX_V_B_PORCH_STA(n) ((n) << 0) #define DPTX_TOTAL_PIXEL_STATUS 0x00A4 #define DPTX_TOTAL_PIXEL_STA(n) ((n) << 0) #define DPTX_ACTIVE_PIXEL_STATUS 0x00A8 #define DPTX_ACTIVE_PIXEL_STA(n) ((n) << 0) #define DPTX_HORIZON_FRONT_PORCH_STATUS 0x00AC #define DPTX_H_F_PORCH_STA(n) ((n) << 0) #define DPTX_HORIZON_SYNC_WIDTH_STATUS 0x00B0 #define DPTX_H_SYNC_STA(n) ((n) << 0) #define DPTX_HORIZON_BACK_PORCH_STATUS 0x00B4 #define DPTX_H_B_PORCH_STA(n) ((n) << 0) #define DPTX_ADVANCED_LINK_POWER_MANAGEMENT_CONTROL_1 0x0110 #define DPTX_ALPM_PARA_UPDATE_EN (1 << 7) #define DPTX_ALPM_MODE (1 << 6) #define DPTX_ML_PHY_SLEEP_EN (1 << 5) #define DPTX_ML_PHY_STANDBY_EN (1 << 4) #define DPTX_WAKE_F_CHANGE_EN (1 << 3) #define DPTX_AUX_WAKE_UP_EN (1 << 2) #define DPTX_WAKE_ACK_STATE (1 << 1) #define DPTX_PLL_PWRDWN_TIMER_SEL (1 << 0) #define DPTX_ADVANCED_LINK_POWER_MANAGEMENT_CONTROL_2 0x0114 #define DPTX_SEND_SR_OPTION (1 << 6) #define DPTX_PHY_SLEEP_EN (1 << 5) #define DPTX_PHY_PLL_PWRDWN_EN (1 << 4) #define DPTX_AUX_WAKEUP_TO_MAIN_LINK (1 << 3) #define DPTX_PHY_SLEEP_ASSERT_TIME (1 << 2) #define DPTX_PLL_PWRDWN_ASSERT_TIME (1 << 1) #define DPTX_PHY_SLEEP_DEASSERT_TIME (1 << 0) #define DPTX_PLL_POWER_DOWN_TO_ML_WAKEUP_TIMER 0x0118 #define DPTX_PLL_PWD_TO_ML_WAKEUP(n) ((n) << 0) #define DPTX_WAIT_AUX_PHY_WAKE_ACK_TIMER 0x011C #define DPTX_WAIT_WAKE_ACK_TIMER(n) ((n) << 0) #define DPTX_WAKEUP_LINES 0x0120 #define DPTX_WAKEUP_CR_SYMBOLS 0x0124 #define DPTX_SYMBOL_LOCK_PATTERN 0x0130 #define DPTX_PLL_POWER_DOWN_TO_ML_WAKEUP_LINES 0x0134 #define DPTX_PLL_PWD_TO_LINK_LINES(n) ((n) << 0) #define DPTX_PLL_POWER_DOWN_TO_ML_WAKEUP_TIME 0x0138 #define DPTX_PLL_PWD_TO_LINK_TIME(n) ((n) << 0) #define DPTX_WAKEUP_F_CHANGE_M_VID_7_0 0x0140 #define DPTX_WAKEUP_F_CHANGE_M_VID_0(n) ((n) << 0) #define DPTX_WAKEUP_F_CHANGE_M_VID_15_8 0x0144 #define DPTX_WAKEUP_F_CHANGE_M_VID_1(n) ((n) << 0) #define DPTX_WAKEUP_F_CHANGE_M_VID_23_16 0x0148 #define DPTX_WAKEUP_F_CHANGE_M_VID_2(n) ((n) << 0) #if DISPLAYPORT_VERSION >= 4 #define DPTX_SLEEP_STANDBY_DELAY_REG 0x0154 #define DPTX_SLEEP_STANDBY_DELAY(n) ((n) << 0) #endif #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_1 0x01D0 #define DPTX_AVI_DB1(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_2 0x01D4 #define DPTX_AVI_DB2(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_3 0x01D8 #define DPTX_AVI_DB3(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_4 0x01DC #define DPTX_AVI_DB4(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_5 0x01E0 #define DPTX_AVI_DB5(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_6 0x01E4 #define DPTX_AVI_DB6(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_7 0x01E8 #define DPTX_AVI_DB7(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_8 0x01EC #define DPTX_AVI_DB8(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_9 0x01F0 #define DPTX_AVI_DB9(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_10 0x01F4 #define DPTX_AVI_DB10(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_11 0x01F8 #define DPTX_AVI_DB11(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_12 0x01FC #define DPTX_AVI_DB12(n) ((n) << 0) #define DPTX_AVI_INFOFRAME_PACKET_DATA_BYTE_13 0x0200 #define DPTX_AVI_DB13(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_TYPE_CODE 0x0244 #define DPTX_IF_TYPE(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_1 0x0254 #define DPTX_IF_PKT_DB1(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_2 0x0258 #define DPTX_IF_PKT_DB2(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_3 0x025C #define DPTX_IF_PKT_DB3(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_4 0x0260 #define DPTX_IF_PKT_DB4(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_5 0x0264 #define DPTX_IF_PKT_DB5(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_6 0x0268 #define DPTX_IF_PKT_DB6(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_7 0x026C #define DPTX_IF_PKT_DB7(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_8 0x0270 #define DPTX_IF_PKT_DB8(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_9 0x0274 #define DPTX_IF_PKT_DB9(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_10 0x0278 #define DPTX_IF_PKT_DB10(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_11 0x027C #define DPTX_IF_PKT_DB11(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_12 0x0280 #define DPTX_IF_PKT_DB12(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_13 0x0284 #define DPTX_IF_PKT_DB13(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_14 0x0288 #define DPTX_IF_PKT_DB14(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_15 0x028C #define DPTX_IF_PKT_DB15(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_16 0x0290 #define DPTX_IF_PKT_DB16(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_17 0x0294 #define DPTX_IF_PKT_DB17(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_18 0x0298 #define DPTX_IF_PKT_DB18(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_19 0x029C #define DPTX_IF_PKT_DB19(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_20 0x02A0 #define DPTX_IF_PKT_DB20(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_21 0x02A4 #define DPTX_IF_PKT_DB21(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_22 0x02A8 #define DPTX_IF_PKT_DB22(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_23 0x02AC #define DPTX_IF_PKT_DB23(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_24 0x02B0 #define DPTX_IF_PKT_DB24(n) ((n) << 0) #define DPTX_INFOFRAME_PACKET_DATA_BYTE_25 0x02B4 #define DPTX_IF_PKT_DB25(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_1 0x02D0 #define DPTX_MPEG_DB1(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_2 0x02D4 #define DPTX_MPEG_DB2(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_3 0x02D8 #define DPTX_MPEG_DB3(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_4 0x02DC #define DPTX_MPEG_DB4(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_5 0x02E0 #define DPTX_MPEG_DB5(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_6 0x02E4 #define DPTX_MPEG_DB6(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_7 0x02E8 #define DPTX_MPEG_DB7(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_8 0x02EC #define DPTX_MPEG_DB8(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_9 0x02F0 #define DPTX_MPEG_DB9(n) ((n) << 0) #define DPTX_MPEG_SOURCE_INFOFRAME_PACKET_DATA_BYTE_10 0x02F4 #define DPTX_MPEG_DB10(n) ((n) << 0) #define DPTX_BIST_AUX_CH_RELATED_REGISTER 0x0390 #define DPTX_BIST_AUX_AUX_TC_MASK 3 #define DPTX_BIST_YCBCR422_CONTROL (1 << 5) #define DPTX_AUX_TC_1us (3 << 3) #define DPTX_AUX_TC_d999 (2 << 3) #define DPTX_AUX_TC_d799 (1 << 3) #define DPTX_AUX_TC_d599 (0 << 3) #define DPTX_BIST_AUX_AUX_RETRY_TIMER_SHIFT 0 #define DPTX_BIST_AUX_AUX_RETRY_TIMER_MASK (7 << DPTX_BIST_AUX_AUX_RETRY_TIMER_SHIFT) #define DPTX_BIST_AUX_AUX_RETRY_TIMER(n) ((n) << 0) #define DPTX_INTERRUPT_STATUS 0x03C0 #define DPTX_INT_STATE (1 << 0) #define DPTX_COMMON_INTERRUPT_STATUS_1 0x03C4 #define DPTX_VSYNC_DET (1 << 7) #define DPTX_PLL_LOCK_CHG (1 << 6) #define DPTX_VID_FORMAT_CHG (1 << 3) #define DPTX_VID_CLK_STABLE (1 << 1) #define DPTX_SW_INT (1 << 0) #define DPTX_COMMON_INTERRUPT_STATUS_4 0x03D0 #define DPTX_HOTPLUG_CHG (1 << 2) #define DPTX_HPD_LOST (1 << 1) #define DPTX_PLUG (1 << 0) #define DPTX_DISPLAYPORT_INTERRUPT_STATUS 0x03DC #define DPTX_INT_HPD (1 << 6) #define DPTX_HW_TRAINING_FINISH (1 << 5) #define DPTX_POLLING_ERROR (1 << 4) #define DPTX_SINK_LOST (1 << 3) #define DPTX_LINK_LOST (1 << 2) #define DPTX_RPLY_RECEIV (1 << 1) #define DPTX_AUX_ERR (1 << 0) #define DPTX_INTERRUPT_MASK_1 0x03E0 #define DPTX_INTERRUPT_MASK_4 0x03EC #define DPTX_INTERRUPT_ENABLE 0x03F8 #define DPTX_INTERRUPT_CONTROL 0x03FC #define DPTX_SOFT_INT_CTRL (1 << 2) #define DPTX_INT_POL_HIGH (1 << 0) #define DPTX_INT_POL_LOW (0 << 0) #define DPTX_SYSTEM_CONTROL_1 0x0600 #define DPTX_AUX_DEGLITCH_BYPASS (1 << 3) #define DPTX_DET_STA (1 << 2) #define DPTX_FORCE_DET (1 << 1) #define DPTX_DET_CTRL (1 << 0) #define DPTX_SYSTEM_CONTROL_2 0x0604 #define DPTX_CHA_CRI(n) ((n) << 4) #define DPTX_CHA_STA (1 << 2) #define DPTX_FORCE_CHA (1 << 1) #define DPTX_CHA_CTRL (1 << 0) #define DPTX_SYSTEM_CONTROL_3 0x0608 #define DPTX_HPD_POLARITY (1 << 7) #define DPTX_HPD_STATUS (1 << 6) #define DPTX_F_HPD (1 << 5) #define DPTX_HPD_CTRL (1 << 4) #define DPTX_STRM_VALID (1 << 2) #define DPTX_VIDEO_SENDING_EN (1 << 1) #define DPTX_SYSTEM_CONTROL_4 0x060C #define DPTX_ENHANCED (1 << 3) #define DPTX_FIX_M_VID (1 << 2) #define DPTX_M_VID_UPDATE_CTRL(n) ((n) << 0) #define DPTX_DP_VIDEO_CONTROL 0x0610 #define DPTX_YC_COEFF (1 << 4) #define DPTX_D_RANGE (1 << 3) #define DPTX_DP_VIDEO_CONTROL_BPC_SHIFT 5 #define DPTX_DP_VIDEO_CONTROL_BPC_MASK (0x7<