124 lines
3.7 KiB
C
124 lines
3.7 KiB
C
/*
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* Copyright (C) 2010 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __PL080DMAC_AE2__
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#define __PL080DMAC_AE2__
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#include <stdint.h>
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#include <platform/int.h>
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#include "ae2_dma.h"
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#define kDMACClockGating 0x341A0004
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#define kDMAChannelsPerController 8
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#define kDMACBase 0x341A3000
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#define kDMAC0Base 0x341A3100
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#define kDMACIntStatus 0x0
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#define kDMACIntTCStatus 0x4
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#define kDMACIntTCClear 0x8
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#define kDMACIntErrStatus 0xC
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#define kDMACIntErrClear 0x10
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#define kDMACConfiguration 0x30
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#define kDMACSourceOffset 0x0
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#define kDMACDestOffset 0x4
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#define kDMACLLIOffset 0x8
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#define kDMACCtrlOffset 0xC
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#define kDMACConfigOffset 0x10
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#define kDMACRegisterSize 0x20
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#define DMACConfiguration_M2_Mask (1 << 2)
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#define DMACConfiguration_M2_Little (0 << 2)
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#define DMACConfiguration_M2_Big (1 << 2)
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#define DMACConfiguration_M1_Mask (1 << 1)
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#define DMACConfiguration_M1_Little (0 << 1)
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#define DMACConfiguration_M1_Big (1 << 1)
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#define DMACConfiguration_E_Mask (1 << 0)
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#define DMACConfiguration_E_Disable (0 << 0)
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#define DMACConfiguration_E_Enable (1 << 0)
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#define DMACCxConfiguration_Halt (1 << 18)
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#define DMACCxConfiguration_Active (1 << 17)
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#define DMACCxConfiguration_ITC_Enable (1 << 15)
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#define DMACCxConfiguration_IError_Enable (1 << 14)
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#define DMACCxConfiguration_E_Enable (1 << 0)
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#define DMACCxControl_I_Mask (1 << 31)
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#define DMACCxControl_I_Disable (0 << 31)
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#define DMACCxControl_I_Enable (1 << 31)
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#define DMACCxControl_SI_Mask (1 << 26)
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#define DMACCxControl_SI_No_Increment (0 << 26)
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#define DMACCxControl_SI_Increment (1 << 26)
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#define DMACCxControl_DI_Mask (1 << 27)
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#define DMACCxControl_DI_No_Increment (0 << 27)
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#define DMACCxControl_DI_Increment (1 << 27)
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#define DMACCxControl_D_Master1 (0 << 25)
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#define DMACCxControl_S_Master1 (0 << 24)
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#define DMACCxControl_SWidth_Halfword (1 << 18)
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#define DMACCxControl_DWidth_Halfword (1 << 21)
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#define DMACCxControl_DBSize_1 (0 << 15)
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#define DMACCxControl_DBSize_4 (1 << 15)
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#define DMACCxControl_SBSize_1 (0 << 12)
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#define DMACCxControl_SBSize_4 (1 << 12)
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#define DMACCxControl_TransferSizeMask (0x0FFF)
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#define DMACCxConfiguration_FlowCntrl_Memory_to_Memory_DMA (0 << 11)
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#define DMACCxConfiguration_FlowCntrl_Memory_to_Peripheral_DMA (1 << 11)
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#define DMACCxConfiguration_FlowCntrl_Peripheral_to_Memory_DMA (2 << 11)
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void handleAudioDeviceDMAInterrupt();
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void handleAudioDeviceDMAInterruptError();
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/*
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Get a free DMA channel
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*/
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uint32_t acquireDMAChannel(void);
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/*
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Free a DMA channel
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*/
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void freeDMAChannel(uint32_t dmaChannel);
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/*
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Make sure the pl080 clock is enabled and initialize DMA channels 0 and 1
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*/
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void configureDMA(uint32_t dmaChannel);
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/*
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Startup DMA from address src to destination dst
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If chain is not NULL, will setup that in the LLI to auto-restart DMA from the chain
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*/
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void setupDMA(uint32_t dmaChannel, void *src, void *dst, DMALinkedListItem *chain, DMADirection direction, uint32_t peripheral, size_t bytesToTransfer);
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/*
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Startup DMA from address src to destination dst
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If chain is not NULL, will setup that in the LLI to auto-restart DMA from the chain
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*/
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void startDMA(uint32_t dmaChannel);
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/*
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Halts the channel, then blocks until the DMA is complete and then fully disables it
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*/
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void disableDMA(uint32_t dmaChannel);
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/*
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Blocks until the DMA is complete and then fully disables it
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*/
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void disableDMAImmediate(uint32_t dmaChannel);
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#endif /* __PL080DMAC_AE2__ */
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