29 lines
1023 B
C
29 lines
1023 B
C
/*
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* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Computer, Inc.
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*/
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#include <arch.h>
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#include <platform/memmap.h>
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#include <sys.h>
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void arm_mpu_init(void)
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{
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/* set everything as fully cached, except for the hardware register region */
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arm_write_iprot_region_0(0x0000003f);
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arm_write_dprot_region_0(0x0000003f);
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#ifdef PERIPH_BASE
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arm_write_dprot_region_1((PERIPH_BASE | (0x1F - ((PERIPH_LEN == 0) ? 0 : (__builtin_clz(PERIPH_LEN) + 1))) << 1) | 1);
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#endif
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arm_write_ins_prot_register(0x3); // region 0 full access
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arm_write_data_prot_register(0xf); // region 0 & 1 full access
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arm_write_cacheable_registers(0x1, 0x1); // region 0 data and instruction is cacheable
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arm_write_bufferable_register(0x1); // data region 0 is write bufferable
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}
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