108 lines
2.3 KiB
ArmAsm
108 lines
2.3 KiB
ArmAsm
/*
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* Copyright (c) 2011-2012 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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/*
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* Task context switch support.
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*
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*/
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/*
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* Code here must remain synchronized with the structure and offsets defined in arch_task.h:
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*
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* struct arch_task {
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* uint64_t regs[29]; // x0-x28
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* uint64_t fp;
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* uint64_t lr;
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* uint64_t sp;
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*
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* union {
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* uint128_t q;
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* uint64_t d;
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* uint32_t s;
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* } vregs[32]; // v0-v31
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* uint32_t fpsr;
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* uint32_t fpcr;
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* };
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*/
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/* AAPCS-64 5.1.1 Page 13:
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* Preserve r16-17, r19-r28, FP, and SP.
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*
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* AAPCS-64 5.1.2 Page 14:
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* Registers d8-d15 (s8-s15) must be preserved by a callee across subroutine
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* calls; the remaining registers (v0-v7, v16-v31) do not need to be preserved
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* (or should be preserved by the caller).
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*/
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/*
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* void arch_task_context_switch(struct arch_task *old, struct arch_task *new_task);
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*/
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.text
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.align 2
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.globl _arch_task_context_switch
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_arch_task_context_switch:
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stp x16, x17, [x0, #120]
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stp x19, x20, [x0, #152]
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stp x21, x22, [x0, #168]
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stp x23, x24, [x0, #184]
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stp x25, x26, [x0, #200]
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stp x27, x28, [x0, #216]
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stp fp, lr, [x0, #232]
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mov x2, sp
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str x2, [x0, #248]
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#if WITH_VFP
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str d8, [x0, #384]
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str d9, [x0, #400]
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str d10, [x0, #416]
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str d11, [x0, #432]
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str d12, [x0, #448]
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str d13, [x0, #464]
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str d14, [x0, #480]
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str d15, [x0, #496]
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#endif
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mov x0, x1
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b _arch_task_context_restore
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/*
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* void arch_task_context_restore(struct arch_task *restore_context)
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*/
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.text
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.align 2
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.globl _arch_task_context_restore
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_arch_task_context_restore:
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ldp x16, x17, [x0, #120]
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ldp x19, x20, [x0, #152]
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ldp x21, x22, [x0, #168]
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ldp x23, x24, [x0, #184]
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ldp x25, x26, [x0, #200]
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ldp x27, x28, [x0, #216]
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ldp fp, lr, [x0, #232]
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ldr x1, [x0, #248]
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mov sp, x1
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#if WITH_VFP
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ldr d8, [x0, #384]
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ldr d9, [x0, #400]
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ldr d10, [x0, #416]
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ldr d11, [x0, #432]
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ldr d12, [x0, #448]
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ldr d13, [x0, #464]
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ldr d14, [x0, #480]
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ldr d15, [x0, #496]
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#endif
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ret
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