139 lines
4.7 KiB
C
139 lines
4.7 KiB
C
/*
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* Copyright (C) 2011-2012 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#include <debug.h>
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#include <arch.h>
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#include <arch/arch_task.h>
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#include <arch/arm/arm.h>
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#include <arch/arm64/proc_reg.h>
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#include <sys.h>
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#include <lib/libc.h>
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#include <platform.h>
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extern void platform_irq(void);
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typedef enum {
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ESR_EC_UNCATEGORIZED = 0x00,
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ESR_EC_TRAP_SIMD_FP = 0x07,
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ESR_EC_ILLEGAL_INSTR_SET = 0x0c,
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ESR_EC_SVC_32 = 0x11,
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ESR_EC_SVC_64 = 0x15,
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ESR_EC_MSR_TRAP = 0x18,
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ESR_EC_IABORT_EL0 = 0x20,
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ESR_EC_IABORT_EL1 = 0x21,
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ESR_EC_PC_ALIGN = 0x22,
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ESR_EC_DABORT_EL0 = 0x24,
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ESR_EC_DABORT_EL1 = 0x25,
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ESR_EC_SP_ALIGN = 0x26
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} esr_exception_class_t;
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typedef enum {
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FSC_TRANSLATION_FAULT_L0 = 0x04,
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FSC_TRANSLATION_FAULT_L1 = 0x05,
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FSC_TRANSLATION_FAULT_L2 = 0x06,
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FSC_TRANSLATION_FAULT_L3 = 0x07,
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FSC_ACCESS_FLAG_FAULT_L1 = 0x09,
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FSC_ACCESS_FLAG_FAULT_L2 = 0x0A,
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FSC_ACCESS_FLAG_FAULT_L3 = 0x0B,
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FSC_PERMISSION_FAULT_L1 = 0x0D,
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FSC_PERMISSION_FAULT_L2 = 0x0E,
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FSC_PERMISSION_FAULT_L3 = 0x0F,
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FSC_SYNC_EXT_ABORT = 0x10,
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FSC_ASYNC_EXT_ABORT = 0x11,
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FSC_SYNC_EXT_ABORT_TT_L1 = 0x15,
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FSC_SYNC_EXT_ABORT_TT_L2 = 0x16,
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FSC_SYNC_EXT_ABORT_TT_L3 = 0x17,
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FSC_SYNC_PARITY = 0x18,
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FSC_ASYNC_PARITY = 0x19,
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FSC_SYNC_PARITY_TT_L1 = 0x1D,
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FSC_SYNC_PARITY_TT_L2 = 0x1E,
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FSC_SYNC_PARITY_TT_L3 = 0x1F,
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FSC_ALIGNMENT_FAULT = 0x21,
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FSC_DEBUG_FAULT = 0x22
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} fault_status_t;
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static const char *exception_codes[50] = {
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[0x00] = "Unknown",
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[0x0E] = "Illegal Instruction Set",
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[0x21] = "Instruction Abort",
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[0x22] = "PC Alignment",
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[0x25] = "Data Abort",
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[0x26] = "Stack Pointer Alignment",
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[0x2F] = "SError",
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};
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void
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arm_synchronous_exception(struct arm_exception_frame64 *frame)
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{
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const char **kind;
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kind = &exception_codes[ESR_EC(frame->esr)];
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panic("ARM synchronous abort at 0x%016llx:\n"
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" esr 0x%08x (ec: %s, iss: 0x%08x) far 0x%016llx\n"
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" x0 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x4 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x8 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x12 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x16 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x20 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x24 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x28 0x%016llx sp 0x%016llx lr 0x%016llx spsr 0x%08x\n",
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frame->pc,
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frame->esr, *kind, ESR_ISS(frame->esr), frame->far,
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frame->regs[0], frame->regs[1], frame->regs[2], frame->regs[3],
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frame->regs[4], frame->regs[5], frame->regs[6], frame->regs[7],
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frame->regs[8], frame->regs[9], frame->regs[10], frame->regs[11],
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frame->regs[12], frame->regs[13], frame->regs[14], frame->regs[15],
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frame->regs[16], frame->regs[17], frame->regs[18], frame->regs[19],
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frame->regs[20], frame->regs[21], frame->regs[22], frame->regs[23],
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frame->regs[24], frame->regs[25], frame->regs[26], frame->regs[27],
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frame->regs[28], frame->sp, frame->lr, frame->spsr);
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}
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void
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arm_serror_exception(struct arm_exception_frame64 *frame)
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{
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const char **kind;
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kind = &exception_codes[ESR_EC(frame->esr)];
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platform_asynchronous_exception();
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panic("ARM SError abort at 0x%016llx:\n"
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" esr 0x%08x (ec: %s, iss: 0x%08x) far 0x%016llx\n"
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" x0 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x4 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x8 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x12 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x16 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x20 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x24 0x%016llx 0x%016llx 0x%016llx 0x%016llx\n"
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" x28 0x%016llx sp 0x%016llx lr 0x%016llx spsr 0x%08x\n",
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frame->pc,
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frame->esr, *kind, ESR_ISS(frame->esr), frame->far,
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frame->regs[0], frame->regs[1], frame->regs[2], frame->regs[3],
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frame->regs[4], frame->regs[5], frame->regs[6], frame->regs[7],
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frame->regs[8], frame->regs[9], frame->regs[10], frame->regs[11],
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frame->regs[12], frame->regs[13], frame->regs[14], frame->regs[15],
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frame->regs[16], frame->regs[17], frame->regs[18], frame->regs[19],
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frame->regs[20], frame->regs[21], frame->regs[22], frame->regs[23],
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frame->regs[24], frame->regs[25], frame->regs[26], frame->regs[27],
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frame->regs[28], frame->sp, frame->lr, frame->spsr);
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}
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void
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arm_irq()
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{
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_irq_enter_critical_section();
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platform_irq();
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_irq_exit_critical_section();
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}
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