120 lines
4.6 KiB
C
120 lines
4.6 KiB
C
/*
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* Copyright (C) 2011 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef _ANC_BOOTROM_PRIVATE_H_
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#define _ANC_BOOTROM_PRIVATE_H_
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#if SUB_PLATFORM_S7002
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# include "anc_bootrom_regs_m7.h"
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#else
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# include "anc_bootrom_regs.h"
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#endif
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#include "ppn_npl_regs.h"
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#include "anc_bootrom_cmds.h"
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#define ANC_MAX_CES_PER_BUS (1)
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#define ANC_NAND_ID_SIZE (6)
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#define NAND_BOOT_PAGES_PER_BLOCK 128
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#define NAND_BOOT_BYTES_PER_META 16
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#define NAND_BOOT_BYTES_PER_PAGE 8192
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#define NAND_BOOT_LOGICAL_PAGE_SIZE 4096
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// NAND Commands
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#define NAND_CMD__RESET ((uint8_t)0xFF)
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#define NAND_CMD__READ_ID ((uint8_t)0x90)
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#define NAND_CMD__READ_STATUS ((uint8_t)0x70)
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#define NAND_CMD__READ ((uint8_t)0x00)
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#define NAND_CMD__READ_CONFIRM ((uint8_t)0x30)
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#define NAND_CMD__MULTIPAGE_READ ((uint8_t)0x07)
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#define NAND_CMD__MULTIPAGE_READ_LAST ((uint8_t)0x0A)
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#define NAND_CMD__MULTIPAGE_READ_CONFIRM ((uint8_t)0x37)
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#define NAND_CMD__MULTIPAGE_PROGRAM ((uint8_t)0x87)
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#define NAND_CMD__MULTIPAGE_PROGRAM_LAST ((uint8_t)0x8A)
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#define NAND_CMD__MULTIPAGE_PROGRAM_CONFIRM ((uint8_t)0x17)
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#define NAND_CMD__MULTIPAGE_PREP ((uint8_t)0xB0)
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#define NAND_CMD__MULTIPAGE_PREP__CONFIRM ((uint8_t)0xB8)
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#define NAND_CMD__MULTIBLOCK_ERASE ((uint8_t)0x67)
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#define NAND_CMD__MULTIBLOCK_ERASE_LAST ((uint8_t)0x6A)
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#define NAND_CMD__MULTIBLOCK_ERASE_CONFIRM ((uint8_t)0xD7)
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#define NAND_CMD__LOW_POWER_READ_STATUS ((uint8_t)0x70)
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#define NAND_CMD__GET_NEXT_OPERATION_STATUS ((uint8_t)0x77)
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#define NAND_CMD__OPERATION_STATUS ((uint8_t)0x7D)
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#define NAND_CMD__READ_SERIAL_OUTPUT ((uint8_t)0x7A)
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#define NAND_CMD__CONTROLLER_STATUS ((uint8_t)0x79)
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#define NAND_CMD__READ_DEVICE_PARAMETERS ((uint8_t)0x92)
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#define NAND_CMD__READ_DEVICE_PARAMETERS_CONFIRM ((uint8_t)0x97)
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#define NAND_CMD__SET_FEATURES ((uint8_t)0xEF)
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#define NAND_CMD__GET_FEATURES ((uint8_t)0xEE)
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#define NAND_CMD__SET_GET_FEATURES_CONFIRM ((uint8_t)0xE7)
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#define NAND_CMD__SET_DEBUG_DATA ((uint8_t)0xE9)
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#define NAND_CMD__GET_DEBUG_DATA ((uint8_t)0xE8)
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#define NAND_CMD__UPDATE_FW ((uint8_t)0xED)
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#define NAND_CMD__PPN_STATUS_CONFIRM ((uint8_t)0xED)
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#define PPN_LOW_POWER_STATUS__FAIL (1 << 0)
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#define PPN_LOW_POWER_STATUS__READY (1 << 6)
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#define PPN_LOW_POWER_STATUS__WRITE_PROTECT_BAR (1 << 7)
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#define PPN_FEATURE__POWER_STATE ((uint16_t)0x0180)
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#define PPN_FEATURE__POWER_STATE__LOW_POWER 0x1
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#define PPN_FEATURE__POWER_STATE__NORMAL_ASYNC 0x2
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#define PPN_FEATURE__POWER_STATE__NORMAL_DDR 0xA
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#define PPN_FEATURE__POWER_STATE__STANDBY 0x4
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#define CHIPID_ADDR (0x00)
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#define PPN_BLOCK_PAIRING__NO_PAIRING (0x00)
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#define PPN_BLOCK_PAIRING__EVEN_ODD (0x10)
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#define PPN_BLOCK_PAIRING__FOUR_PLANE (0x20)
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#define ROUNDUPTO(num, gran) ((((num) + (gran) - 1) / (gran)) * (gran))
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#define MIN(a,b) (((a) < (b)) ? (a) : (b))
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#define ANC_BOOT_MAX_TIMING_REG_VALUE (M_ANC_LINK_SDR_DATA_TIMING_REN_SETUP_TIME >> S_ANC_LINK_SDR_DATA_TIMING_REN_SETUP_TIME)
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typedef uint8_t anc_chip_id_t[ANC_NAND_ID_SIZE];
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typedef struct anc_t
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{
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uint32_t bus_id;
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bool initialized;
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uint32_t *regs;
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uint32_t pages_per_block;
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uint32_t bytes_per_meta;
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uint32_t meta_words;
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uint32_t bytes_per_page;
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uint32_t logical_page_size;
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uint32_t lbas_per_page;
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anc_chip_id_t chip_id;
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} anc_t;
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extern anc_t g_boot_anc[ANC_BOOT_CONTROLLERS];
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#define anc_wr(anc, reg, val) (*((anc)->regs + ((reg) >> 2)) = (val))
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#define anc_wr64(anc, reg, val) anc_store64((volatile uint64_t *)((anc)->regs + ((reg) >> 2)), (val))
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#define anc_rd(anc, reg) (*(volatile uint32_t *)((uint8_t *)((anc)->regs) + (reg)))
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#define anc_npl_wr(npl, reg, val) (*(npl + ((reg) >> 2)) = (val))
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void anc_boot_put_link_command(anc_t *anc, uint32_t value);
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void anc_boot_put_dma_command(anc_t *anc, uint64_t value);
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uint32_t anc_boot_wait_interrupt(anc_t *anc, uint32_t mask);
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bool anc_boot_wait_reg(anc_t *anc, uint32_t reg, uint32_t mask, uint32_t value);
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#if !APPLICATION_SECUREROM
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bool anc_boot_wait_reg_int_timeout(anc_t *anc, uint32_t reg, uint32_t mask, uint32_t value, uint32_t tomask);
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#endif // !APPLICATION_SECUREROM
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#endif // _ANC_BOOTROM_PRIVATE_H_
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