140 lines
3.2 KiB
Makefile
140 lines
3.2 KiB
Makefile
# Copyright (C) 2013-2014 Apple Inc. All rights reserved.
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#
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# This document is the property of Apple Inc.
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# It is considered confidential and proprietary.
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#
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# This document may not be reproduced or transmitted in any form,
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# in whole or in part, without the express written permission of
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# Apple Inc.
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#
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LOCAL_DIR := $(GET_LOCAL_DIR)
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GLOBAL_INCLUDES += $(LOCAL_DIR)/include
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# modules implied by this platform
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MODULES += \
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platform/defaults \
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platform/generic \
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arch/$(ARCH)
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ARM_CPU := cortex-a7
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# Devmap chip ID
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DEVMAP_CHIP_ID := 8002
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SPDS_CHIP_REV := b0
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IRQ_STACK_SIZE := 4096
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# srom is always defined in here
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ifeq ($(TEXT_BANK),srom)
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TEXT_BASE := 0x00000000
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endif
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# Overriding SRAM_LEN is not allowed.
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ifeq ($(TEXT_BANK),sram)
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# SRAM TEXT_BASE is fixed by SecureROM.
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TEXT_BASE := 0x48818000
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# iBSS/LLB memory configuration
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ifeq ($(TEXT_FOOTPRINT),)
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TEXT_FOOTPRINT:= 1024*1024
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endif
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endif
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# platform target can override sdram config by specifying this in target config file (apps/iBoot/$target-config.mk)
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ifeq ($(SDRAM_LEN),)
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SDRAM_LEN := 512*1024*1024
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# iBoot/iBEC memory configuration
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ifeq ($(TEXT_BANK),sdram)
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# SDRAM TEXT_BASE is now set such that you don't have to do lots of math to
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# calulate the correct value if you change any of the other region sizes:
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# TEXT_BASE = SDRAM_BASE + SDRAM_LEN - 64MB
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TEXT_BASE := 0x9C000000
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ifeq ($(TEXT_FOOTPRINT),)
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TEXT_FOOTPRINT := 1024*1024
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endif
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endif
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endif
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ifeq ($(TEXT_BANK),srom)
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MAX_DFU_SIZE := 128*1024
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endif
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ifeq ($(TEXT_BANK),sram)
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MAX_DFU_SIZE := 1056*1024
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endif
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# Platform target can override any of these sizes by specifying in target config file (apps/iBoot/$target-config.mk)
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ifeq ($(TZ0_SIZE),)
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TZ0_SIZE := 8*1024*1024
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endif
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ifeq ($(DISPLAY_SIZE),)
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DISPLAY_SIZE := 4*1024*1024
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endif
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OPTIONS += \
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AIC_CPU_ID=0 \
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L2_CACHE_SIZE=512*1024 \
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L2_CACHE_SETS=10 \
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WITH_NON_COHERENT_DMA=1 \
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ANC_PPNNPL_DS_DRIVE_STRENGTH=6 \
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ANC_LINK_CMD_ADDR_PULSE_TIMING_CA_HOLD_TIME=1 \
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ANC_LINK_CMD_ADDR_PULSE_TIMING_CA_SETUP_TIME=1 \
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ANC_LINK_SDR_REN_HOLD_TIME=0 \
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ANC_LINK_SDR_REN_SETUP_TIME=1 \
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ANC_LINK_SDR_WEN_HOLD_TIME=0 \
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ANC_LINK_SDR_WEN_SETUP_TIME=1 \
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ANC_LINK_SDR_DATA_CAPTURE_DELAY=0 \
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ANC_LINK_SDR_CLE_ALE_SETUP_TIME=1 \
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ANC_BOOT_CONTROLLERS=1 \
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ANC_TOGGLE_SUPPORTED=0 \
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DISPLAY_SIZE="$(DISPLAY_SIZE)ULL" \
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PLATFORM_ENTROPY_RATIO=200 \
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PLATFORM_IRQ_COUNT=256 \
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PLATFORM_SPDS_CHIP_REV=$(PLATFORM)/$(SPDS_CHIP_REV) \
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SDRAM_LEN="$(SDRAM_LEN)ULL" \
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TZ0_SIZE="$(TZ0_SIZE)ULL" \
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TEXT_BASE="$(TEXT_BASE)" \
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TEXT_FOOTPRINT="$(TEXT_FOOTPRINT)" \
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WITH_DPA=1 \
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WITH_DMA_CLEAR=1
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# This platform contains corecrypto, needs large idle task stack for DFU stages.
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ifeq ($(PRODUCT),iBSS)
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OPTIONS += \
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IDLE_TASK_SIZE=0x3000 \
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PLATFORM_START_FUNCTION=_platform_start
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endif
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ifeq ($(PRODUCT),LLB)
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OPTIONS += \
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IDLE_TASK_SIZE=0x3000 \
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PLATFORM_START_FUNCTION=_platform_start
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endif
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ifeq ($(APPLICATION),SecureROM)
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DATA_BASE := 0x48800000
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OPTIONS += \
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IDLE_TASK_SIZE=0x3000 \
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WITH_ROM_TRAMPOLINE=1 \
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DATA_BASE="$(DATA_BASE)"
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GLOBAL_LDFLAGS += \
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-segaddr __DATA $(DATA_BASE)
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ifeq ($(CONFIGS),fpga)
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OPTIONS += \
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SUPPORT_FPGA=1
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endif
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endif
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GLOBAL_LDFLAGS += \
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-seg1addr $(TEXT_BASE)
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ALL_OBJS += \
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$(LOCAL_DIR)/asm.o \
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$(LOCAL_DIR)/trampoline.o \
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$(LOCAL_DIR)/init.o
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