152 lines
4.7 KiB
C
152 lines
4.7 KiB
C
/*
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* Copyright (C) 2015 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Inc.
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*/
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#ifndef __PLATFORM_PMGR_H
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#define __PLATFORM_PMGR_H
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#include <sys/types.h>
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enum pmgr_binning_type_t {
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PMGR_BINNING_NONE = 0,
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PMGR_BINNING_CPU,
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PMGR_BINNING_CPU_SRAM,
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PMGR_BINNING_GPU,
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PMGR_BINNING_GPU_SRAM,
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PMGR_BINNING_SRAM,
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PMGR_BINNING_SOC,
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PMGR_BINNING_BASE,
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PMGR_BINNING_REV,
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PMGR_BINNING_GROUP,
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PMGR_BINNING_END_OF_LIST,
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};
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#define PMGR_BINNING_GROUP_ALL 0xf
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#define PMGR_BINNING_NOTFOUND UINT32_MAX
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#define PMGR_BINNING_MODE_NONE 0x3f
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struct pmgr_binning_fuse_to_register {
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uint32_t binning_low:12;
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uint32_t binning_high:12;
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uint32_t register_low:6;
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uint32_t register_64bit:1;
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uint64_t register_address;
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};
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struct pmgr_binning_mode_to_fuse {
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enum pmgr_binning_type_t type;
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uint32_t mode:16;
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uint32_t bingroup:16;
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uint32_t low:11;
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uint32_t high:11;
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const struct pmgr_binning_fuse_to_register *fuse_to_register;
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};
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struct pmgr_binning_mode_to_const {
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uint32_t mv:12;
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uint32_t mode:4;
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uint32_t type:4;
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uint32_t bingroup:4;
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uint32_t fuse_revision_minimum:8;
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};
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struct pmgr_binning_voltage_config {
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uint32_t safe_voltage:11;
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uint32_t mode:6;
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uint32_t type:4;
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};
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struct pmgr_binning_voltage_index_to_config {
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uint32_t voltage_index:8;
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uint32_t safe_voltage:11;
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uint32_t mode:6;
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uint32_t type:4;
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uint32_t bingroup:4;
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uint32_t fuse_revision_minimum:8;
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};
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struct pmgr_binning_voltage_index_to_offset {
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uint32_t voltage_index:8;
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uint32_t fuse_revision_minimum:8;
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int32_t offset:15;
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};
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struct pmgr_binning_board_id_to_offsets {
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enum pmgr_binning_type_t type;
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const struct pmgr_binning_voltage_index_to_offset *voltage_offsets;
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uint32_t size:5;
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uint32_t chip_rev_min:8;
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uint32_t board_id:5;
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uint32_t bingroup;
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};
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struct pmgr_binning_vol_adj {
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uint64_t volAdj0:20;
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uint64_t volAdj1:20;
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uint64_t volAdj2:20;
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uint64_t volAdj3:20;
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uint64_t dvfmMaxAdj:20;
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uint64_t dvmrAdj0:20;
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uint64_t dvmrAdj1:20;
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uint64_t dvmrAdj2:20;
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};
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struct __attribute__((packed)) pmgr_binning_voltadj_entry {
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uint32_t voltage_index:8;
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uint32_t chip_rev_min:8;
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uint32_t fuse_rev_min:8;
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struct pmgr_binning_vol_adj voltages;
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};
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//
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// Must be defined in platform/SOC/chipid/pmgr_binning_SOC.c
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//
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extern const struct pmgr_binning_mode_to_fuse pmgr_binning_mode_to_fuse_data[];
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extern const struct pmgr_binning_voltage_config pmgr_binning_voltage_config_sram_data[];
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extern const struct pmgr_binning_mode_to_const pmgr_binning_mode_to_const_data[];
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extern const struct pmgr_binning_voltadj_entry pmgr_binning_voltadj_entry_data[];
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extern const struct pmgr_binning_voltage_index_to_config pmgr_binning_voltage_index_to_config_data[];
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extern const struct pmgr_binning_voltage_index_to_offset pmgr_binning_voltage_index_to_offset_data[];
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extern const struct pmgr_binning_board_id_to_offsets pmgr_binning_board_id_to_offsets_data[];
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extern const uint32_t pmgr_binning_voltage_config_sram_data_size;
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extern const uint32_t pmgr_binning_mode_to_const_data_size;
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extern const uint32_t pmgr_binning_voltadj_entry_data_size;
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extern const uint32_t pmgr_binning_voltage_index_to_config_data_size;
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extern const uint32_t pmgr_binning_board_id_to_offsets_data_size;
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//
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// Must be defined in platform/SOC/pmgr/pmgr.c
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//
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extern bool pmgr_platform_set_perf_state(bool gpu, uint32_t state_num, uint32_t *voltage_indexes, uint32_t voltage_index_size);
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extern uint32_t pmgr_platform_get_freq(bool gpu, uint32_t voltage_index);
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extern bool pmgr_platform_get_perf_state(enum pmgr_binning_type_t type, uint32_t state, uint32_t *voltage, uint32_t *freq);
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//
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// Defined in platform/generic/pmgr/pmgr_binning.c
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//
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// Return values are PMGR_BINNING_NOTFOUND if not found/unknown
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//
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extern uint32_t pmgr_binning_get_mv(uint32_t voltage_index, bool sram, bool use_binning);
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extern uint32_t pmgr_binning_mode_get_mv(enum pmgr_binning_type_t type, uint32_t mode);
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extern uint32_t pmgr_binning_mode_get_value(enum pmgr_binning_type_t binning_type, uint32_t mode);
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extern uint32_t pmgr_binning_get_base(void);
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extern uint32_t pmgr_binning_get_group(void);
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extern uint32_t pmgr_binning_get_revision(void);
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extern uint32_t pmgr_binning_from_config_data(uint32_t voltage_index, const struct pmgr_binning_voltage_index_to_config **config_data);
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extern int32_t pmgr_binning_get_voltage_offset(uint32_t voltage_index, enum pmgr_binning_type_t type);
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extern const struct pmgr_binning_vol_adj *pmgr_binning_get_vol_adj(uint32_t chipdid, uint32_t chip_rev, uint32_t voltage_index);
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//
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// Defined in platform/generic/pmgr/pmgr_binning_menu.c
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//
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extern void pmgr_binning_menu_update_states(void);
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#endif
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