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iBoot/target/ipad4b/pinconfig-mesa.c

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/*
* Copyright (C) 2014 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
/* THIS FILE IS AUTOMATICALLY GENERATED BY tools/csvtopinconfig.py. DO NOT EDIT!
I/O Spreadsheet version: rev 0.4
I/O Spreadsheet tracker: 16055666
Conversion command: csvtopinconfig.py --soc h6p --copyright 2014 --config-column 'J85M:J85 Config' --config-column 'J86M:J86 Config' --config-column 'J87M:J87 Config' --pupd-column 'J85M:J85 PU/PD' --pupd-column 'J86M:J86 PU/PD' --pupd-column 'J87M:J87 PU/PD' --radar 16055666 <filename>
*/
#include <debug.h>
#include <drivers/apple/gpio.h>
#include <platform.h>
#include <platform/soc/hwregbase.h>
#include <stdint.h>
#include <target/boardid.h>
static const uint32_t pinconfig_j85map_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_DISABLED | PULL_DOWN | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_DISABLED | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | SLOW_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | SLOW_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_FUNC0 | SLOW_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_DISABLED | PULL_DOWN | SLOW_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_DISABLED | PULL_DOWN, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | SLOW_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | SLOW_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | SLOW_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_DISABLED | PULL_DOWN | SLOW_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_DISABLED | PULL_DOWN | SLOW_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_DISABLED | PULL_DOWN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | SLOW_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | SLOW_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED | PULL_DOWN, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED | PULL_DOWN, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED | PULL_DOWN, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED | PULL_DOWN, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED | PULL_DOWN, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | SLOW_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_DISABLED | PULL_DOWN | SLOW_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_DISABLED | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_DISABLED | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | SLOW_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | SLOW_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
static const uint32_t pinconfig_j85mdev_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_DISABLED | PULL_DOWN | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_DISABLED | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | DRIVE_X4 | FAST_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_DISABLED | PULL_DOWN | DRIVE_X4 | FAST_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_DISABLED | PULL_DOWN, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | FAST_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | FAST_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | FAST_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_DISABLED | PULL_DOWN | FAST_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_DISABLED | PULL_DOWN | FAST_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_DISABLED | PULL_DOWN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | FAST_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | FAST_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED | PULL_DOWN, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED | PULL_DOWN, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED | PULL_DOWN, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED | PULL_DOWN, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED | PULL_DOWN, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | FAST_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_DISABLED | PULL_DOWN | FAST_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_DISABLED | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_DISABLED | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | FAST_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
static const uint32_t pinconfig_j86map_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_IN | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | SLOW_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | SLOW_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_IN | SLOW_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_IN | SLOW_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_FUNC0, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | SLOW_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | SLOW_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | SLOW_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_IN | SLOW_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_IN | SLOW_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_IN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | SLOW_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | SLOW_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | SLOW_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_OUT_0 | SLOW_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_IN | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_IN | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | SLOW_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | SLOW_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
static const uint32_t pinconfig_j86mdev_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_IN | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | DRIVE_X4 | FAST_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_IN | DRIVE_X4 | FAST_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_IN | DRIVE_X4 | FAST_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_FUNC0, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | FAST_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | FAST_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | FAST_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_IN | FAST_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_IN | FAST_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_IN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | FAST_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | FAST_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | FAST_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_OUT_0 | FAST_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_IN | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_IN | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | FAST_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
static const uint32_t pinconfig_j87map_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_IN | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | SLOW_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | SLOW_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_IN | SLOW_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_IN | SLOW_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_FUNC0, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | SLOW_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | SLOW_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | SLOW_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_IN | SLOW_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_IN | SLOW_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_IN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | SLOW_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | SLOW_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | SLOW_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | SLOW_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_OUT_0 | SLOW_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_IN | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_IN | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | SLOW_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | SLOW_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
static const uint32_t pinconfig_j87mdev_0[GPIO_GROUP_COUNT * GPIOPADPINS] = {
/* Port 0 */
CFG_DISABLED, // 0 : TST_CLKOUT -> SOC_TST_CLKOUT
CFG_FUNC0 | FAST_SLEW, // 1 : WDOG -> WDOG_SOC
CFG_IN, // 2 : GPIO[0] -> GPIO_BTN_HOME_L
CFG_IN, // 3 : GPIO[1] -> GPIO_BTN_ONOFF_L
CFG_IN | PULL_UP, // 4 : GPIO[2] -> GPIO_BTN_VOL_UP_L
CFG_IN | PULL_UP, // 5 : GPIO[3] -> GPIO_BTN_VOL_DOWN_L
CFG_IN, // 6 : GPIO[4] -> GPIO_BTN_SRL_L
CFG_DISABLED, // 7 : GPIO[5] -> GPIO_SOC2BEACON_EN
/* Port 1 */
CFG_OUT_0 | FAST_SLEW, // 8 : GPIO[6] -> GPIO_SOC2AJ_HS4_SHUNT_EN
CFG_OUT_0 | FAST_SLEW, // 9 : GPIO[7] -> GPIO_SOC2AJ_HS3_SHUNT_EN
CFG_DISABLED, // 10 : GPIO[8] -> GPIO_BOARD_REV0
CFG_DISABLED, // 11 : GPIO[9] -> GPIO_BOARD_REV1
CFG_DISABLED, // 12 : GPIO[10] -> GPIO_BOARD_REV2
CFG_IN | PULL_UP, // 13 : GPIO[11] -> GPIO_CODEC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 14 : GPIO[12] -> GPIO_SOC2BB_WAKE_MODEM
CFG_IN | PULL_UP, // 15 : GPIO[13] -> GPIO_GRAPE_IRQ_L
/* Port 2 */
CFG_DISABLED, // 16 : GPIO[14] -> BB_IPC_GPIO
CFG_IN | PULL_UP, // 17 : GPIO[15] -> GPIO_ALS_IRQ_L
CFG_DISABLED, // 18 : GPIO[16] -> GPIO_BOARD_ID3
CFG_IN | PULL_DOWN, // 19 : GPIO[17] -> GPIO_BB2SOC_RESET_DET_L
CFG_DISABLED, // 20 : GPIO[18] -> GPIO_BOOT_CONFIG0
CFG_IN | PULL_UP, // 21 : GPIO[19] -> GPIO_PMU2SOC_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 22 : GPIO[20] -> GPIO_SOC2PMU_KEEPACT
CFG_OUT_0 | FAST_SLEW, // 23 : GPIO[21] -> GPIO_GRAPE_RST_L
/* Port 3 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 4 */
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 32 : UART1_TXD -> UART1_SOC2BT_TX
CFG_FUNC0, // 33 : UART1_RXD -> UART1_BT2SOC_TX
CFG_OUT_1 | DRIVE_X4 | FAST_SLEW, // 34 : UART1_RTSN -> UART1_SOC2BT_RTS_L
CFG_FUNC0, // 35 : UART1_CTSN -> UART1_BT2SOC_RTS_L
CFG_IN | PULL_UP | SLOW_SLEW, // 36 : UART2_TXD -> UART2_SOC2OSLO_TX
CFG_FUNC0, // 37 : UART2_RXD -> UART2_OSLO2SOC_TX
CFG_IN | PULL_UP | SLOW_SLEW, // 38 : UART2_RTSN -> UART2_SOC2OSLO_RTS_L
CFG_FUNC0, // 39 : UART2_CTSN -> UART2_OSLO2SOC_RTS_L
/* Port 5 */
CFG_IN | DRIVE_X4 | FAST_SLEW, // 40 : UART3_TXD -> UART3_SOC2BB_TX / UART2_SOC2WLAN_TX
CFG_FUNC0, // 41 : UART3_RXD -> UART3_BB2SOC_TX / UART2_WLAN2SOC_TX
CFG_IN | DRIVE_X4 | FAST_SLEW, // 42 : UART3_RTSN -> UART3_SOC2BB_RTS_L
CFG_FUNC0, // 43 : UART3_CTSN -> UART3_BB2SOC_RTS_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 44 : UART5_RTXD -> UART5_BATT_RTXD
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 6 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 7 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 8 */
CFG_IN | PULL_DOWN | FAST_SLEW, // 64 : UART4_TXD -> UART4_SOC2OSCAR_TXD
CFG_FUNC0, // 65 : UART4_RXD -> UART4_OSCAR2SOC_RXD
CFG_IN | FAST_SLEW, // 66 : UART4_RTSN -> GPIO_OSCAR_RESET_L
CFG_IN, // 67 : UART4_CTSN -> PMU_GPIO_OSCAR2PMU_HOST_WAKE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 68 : SPI1_SCLK -> SPI1_GRAPE_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 69 : SPI1_MOSI -> SPI1_GRAPE_MOSI
CFG_FUNC0, // 70 : SPI1_MISO -> SPI1_GRAPE_MISO
CFG_OUT_1 | FAST_SLEW, // 71 : SPI1_SSIN -> SPI1_GRAPE_CS_L
/* Port 9 */
CFG_DISABLED, // 72 : SPI0_SCLK -> GPIO_BOARD_ID0
CFG_DISABLED, // 73 : SPI0_MOSI -> GPIO_BOARD_ID1
CFG_DISABLED, // 74 : SPI0_MISO -> GPIO_BOARD_ID2
CFG_DISABLED, // 75 : SPI0_SSIN -> NC
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 76 : SPI2_SCLK -> SPI2_CODEC_SCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 77 : SPI2_MOSI -> SPI2_CODEC_MOSI
CFG_FUNC0, // 78 : SPI2_MISO -> SPI2_CODEC_MISO
CFG_OUT_1 | FAST_SLEW, // 79 : SPI2_SSIN -> SPI2_CODEC_CS_L
/* Port 10 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 80 : I2C0_SDA -> I2C0_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 81 : I2C0_SCL -> I2C0_SCL_1V8
CFG_FUNC0 | SLOW_SLEW, // 82 : I2C1_SDA -> I2C1_SDA_1V8
CFG_FUNC0 | SLOW_SLEW, // 83 : I2C1_SCL -> I2C1_SCL_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 84 : ISP0_SDA -> ISP0_CAM_REAR_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 85 : ISP0_SCL -> ISP0_CAM_REAR_SCL
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 86 : ISP1_SDA -> ISP1_CAM_FRONT_SDA
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 87 : ISP1_SCL -> ISP1_CAM_FRONT_SCL
/* Port 11 */
CFG_OUT_0 | FAST_SLEW, // 88 : SENSOR0_RST -> ISP0_CAM_REAR_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 89 : SENSOR0_CLK -> ISP0_CAM_REAR_CLK_R
CFG_DISABLED, // 90 : SENSOR0_XSHUTDOWN -> NC
CFG_DISABLED, // 91 : SENSOR0_ISTRB -> NC
CFG_OUT_0 | FAST_SLEW, // 92 : SENSOR1_RST -> ISP1_CAM_FRONT_SHUTDOWN_L
CFG_OUT_0 | DRIVE_X4 | FAST_SLEW, // 93 : SENSOR1_CLK -> ISP1_CAM_FRONT_CLK_R
CFG_DISABLED, // 94 : SENSOR1_XSHUTDOWN -> I2C1_SOC2OSCAR_SWDIO_1V8
CFG_DISABLED, // 95 : SENSOR1_ISTRB -> I2C1_SOC2OSCAR_SWDCLK_1V8
/* Port 12 */
CFG_FUNC0 | SLOW_SLEW, // 96 : SPI3_MOSI -> SPI_MESA_MOSI
CFG_FUNC0, // 97 : SPI3_MISO -> SPI_MESA_MISO
CFG_FUNC0 | SLOW_SLEW, // 98 : SPI3_SCLK -> SPI_MESA_SCLK_R
CFG_IN | PULL_DOWN, // 99 : SPI3_SSIN -> GPIO_MESA2SOC_INT
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 100 : I2C2_SDA -> I2C2_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 101 : I2C2_SCL -> I2C2_SCL_1V8
CFG_DISABLED | PULL_DOWN, // 102 : GPIO[22] -> GPIO_BB2SOC_GPS_SYNC
CFG_IN | FAST_SLEW, // 103 : GPIO[23] -> GPIO_SOC2BB_RADIO_ON_L
/* Port 13 */
CFG_IN | PULL_DOWN | SLOW_SLEW, // 104 : GPIO[24] -> GPIO_SOC2OSLO_FW_DWL_REQ
CFG_DISABLED, // 105 : GPIO[25] -> GPIO_BOOT_CONFIG1
CFG_IN, // 106 : GPIO[26] -> GPIO_FORCE_DFU
CFG_DISABLED, // 107 : GPIO[27] -> TP_GPIO_DFU_STATUS
CFG_DISABLED, // 108 : GPIO[28] -> GPIO_BOOT_CONFIG2
CFG_DISABLED, // 109 : GPIO[29] -> GPIO_BOOT_CONFIG3
CFG_IN | FAST_SLEW, // 110 : GPIO[30] -> GPIO_SOC2OSCAR_DBGEN
CFG_IN | FAST_SLEW, // 111 : GPIO[31] -> GPIO_SOC2BB_RST_L
/* Port 14 */
CFG_IN, // 112 : GPIO[32] -> GPIO_PROX_IRQ_L
CFG_DISABLED | PULL_DOWN, // 113 : GPIO[33] -> GPIO_BB2SOC_GSM_TXBURST
CFG_OUT_0 | FAST_SLEW, // 114 : GPIO[34] -> GPIO_SPKAMP_RST_L
CFG_OUT_0 | FAST_SLEW, // 115 : GPIO[35] -> GPIO_BT_WAKE
CFG_IN, // 116 : GPIO[36] -> GPIO_TS2SOC2PMU_INT
CFG_IN | PULL_UP, // 117 : GPIO[37] -> GPIO_SPKAMP_LEFT_IRQ_L
CFG_OUT_0 | FAST_SLEW, // 118 : GPIO[38] -> GPIO_SOC2LCD_PWREN
CFG_OUT_0 | PULL_DOWN, // 119 : DISP_VSYNC -> DISPLAY_SYNC
/* Port 15 */
CFG_FUNC0 | FAST_SLEW, // 120 : SOCHOT0 -> SOCHOT0_L
CFG_FUNC0 | FAST_SLEW, // 121 : SOCHOT1 -> SOCHOT1_L
CFG_FUNC0 | FAST_SLEW, // 122 : UART0_TXD -> UART0_SOC_TXD
CFG_FUNC0, // 123 : UART0_RXD -> UART0_SOC_RXD
CFG_DISABLED, // 124 : UNSPECIFIED -> UNSPECIFIED
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 125 : DWI_DO -> DWI_AP_DO - to be checked again
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 126 : DWI_CLK -> DWI_AP_CLK - to be checked again
CFG_DISABLED, // 127 : UNSPECIFIED -> UNSPECIFIED
/* Port 16 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 128 : I2S0_LRCK -> I2S0_CODEC_ASP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 129 : I2S0_BCLK -> I2S0_CODEC_ASP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 130 : I2S0_DOUT -> I2S0_CODEC_ASP_DOUT
CFG_FUNC0, // 131 : I2S0_DIN -> I2S0_CODEC_ASP_DIN
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 132 : I2S1_MCK -> I2S1_SPKAMP_MCK_R
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 133 : I2S1_LRCK -> I2S1_SPKAMP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 134 : I2S1_BCLK -> I2S1_SPKAMP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 135 : I2S1_DOUT -> I2S1_SPKAMP_DOUT
/* Port 17 */
CFG_FUNC0, // 136 : I2S1_DIN -> I2S1_SPKAMP_DIN
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 137 : I2S2_LRCK -> I2S2_CODEC_XSP_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 138 : I2S2_BCLK -> I2S2_CODEC_XSP_BCLK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 139 : I2S2_DOUT -> I2S2_CODEC_XSP_DOUT
CFG_FUNC0, // 140 : I2S2_DIN -> I2S2_CODEC_XSP_DIN
CFG_IN | PULL_UP, // 141 : I2S3_MCK -> GPIO_SPKAMP_RIGHT_IRQ_L
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 142 : I2S3_LRCK -> I2S3_SOC2BT_LRCK
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 143 : I2S3_BCLK -> I2S3_SOC2BT_BCLK
/* Port 18 */
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 144 : I2S3_DOUT -> I2S3_SOC2BT_DATA
CFG_FUNC0, // 145 : I2S3_DIN -> I2S3_BT2SOC_DATA
CFG_DISABLED, // 146 : I2S4_MCK -> BB_JTAG_TCK
CFG_DISABLED, // 147 : I2S4_LRCK -> BB_JTAG_TDI
CFG_DISABLED, // 148 : I2S4_BCLK -> BB_JTAG_TMS
CFG_DISABLED, // 149 : I2S4_DOUT -> BB_JTAG_TRST_L
CFG_DISABLED, // 150 : I2S4_DIN -> BB_JTAG_TDO
CFG_DISABLED,
/* Port 19 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 20 */
CFG_OUT_0 | FAST_SLEW, // 160 : TMR32_PWM0 -> OSCAR_TIME_SYNC_HOST_INT
CFG_OUT_0 | FAST_SLEW, // 161 : TMR32_PWM1 -> GPIO_SPKAMP_KEEPALIVE
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 162 : TMR32_PWM2 -> CLK_32K_SOC2CUMULUS
CFG_OUT_0 | FAST_SLEW, // 163 : SIO_7816UART0_SDA -> HSIC1_SOC2WLAN_HOST_RDY
CFG_IN, // 164 : SIO_7816UART0_SCL -> HSIC1_WLAN2SOC_DEVICE_RDY
CFG_IN | PULL_DOWN, // 165 : SIO_7816UART0_RST -> HSIC1_WLAN2SOC_REMOTE_WAKE
CFG_OUT_0 | FAST_SLEW, // 166 : SIO_7816UART1_SDA -> HSIC2_SOC2BB_HOST_RDY
CFG_IN | PULL_DOWN, // 167 : SIO_7816UART1_SCL -> HSIC2_BB2SOC_DEVICE_RDY
/* Port 21 */
CFG_IN | PULL_DOWN, // 168 : SIO_7816UART1_RST -> HSIC2_BB2SOC_REMOTE_WAKE
CFG_FUNC0 | FAST_SLEW, // 169 : UART6_TXD -> UART6_TS_ACC_TXD
CFG_FUNC0, // 170 : UART6_RXD -> UART6_TS_ACC_RXD
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 171 : I2C3_SDA -> I2C3_SDA_1V8
CFG_FUNC0 | DRIVE_X2 | FAST_SLEW, // 172 : I2C3_SCL -> I2C3_SCL_1V8
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 22 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 23 */
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
/* Port 24 */
CFG_FUNC0, // 192 : EDP_HPD -> EDP_HPD
CFG_FUNC0 | DRIVE_X4 | FAST_SLEW, // 193 : I2S0_MCK -> I2S0_CODEC_ASP_MCK_R
CFG_IN | PULL_DOWN | SLOW_SLEW, // 194 : I2S2_MCK -> GPIO_SOC2OSLO_EN
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
CFG_DISABLED,
};
struct pinconfig_map {
uint32_t board_id;
uint32_t board_id_mask;
const uint32_t *pinconfigs[GPIOC_COUNT];
};
static const struct pinconfig_map cfg_map[] = {
{ TARGET_BOARD_ID_J85MAP, ~0, { pinconfig_j85map_0 } },
{ TARGET_BOARD_ID_J85MDEV, ~0, { pinconfig_j85mdev_0 } },
{ TARGET_BOARD_ID_J86MAP, ~0, { pinconfig_j86map_0 } },
{ TARGET_BOARD_ID_J86MDEV, ~0, { pinconfig_j86mdev_0 } },
{ TARGET_BOARD_ID_J87MAP, ~0, { pinconfig_j87map_0 } },
{ TARGET_BOARD_ID_J87MDEV, ~0, { pinconfig_j87mdev_0 } },
};
const uint32_t * target_get_default_gpio_cfg(int gpioc)
{
static const struct pinconfig_map *selected_map = NULL;
if (selected_map == NULL) {
uint32_t board_id = platform_get_board_id();
for (unsigned i = 0; i < sizeof(cfg_map)/sizeof(cfg_map[0]); i++) {
if ((board_id & cfg_map[i].board_id_mask) == cfg_map[i].board_id) {
selected_map = &cfg_map[i];
break;
}
}
if (selected_map == NULL)
panic("no default pinconfig for board id %u", board_id);
}
ASSERT(gpioc < GPIOC_COUNT);
return selected_map->pinconfigs[gpioc];
}
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