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@@ -0,0 +1,37 @@
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#ifndef __BREADCRUMBS_H
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||||
#define __BREADCRUMBS_H
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#define kBCImgLoadImageTooLarge 1
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#define kBCImgLoadCountNotZero 2
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#define kBCImgLoadCountIsZero 3
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||||
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||||
#define kBCImg4TooLarge 1
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||||
#define kBCImg4NullPtr 2
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||||
#define kBCImg4HeaderErr 3
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||||
#define kBCImg4Truncated 4
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||||
#define kBCImg4DecodeInitFail 5
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||||
#define kBCImg4ImageTypeMismatch 6
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#define kBCImg4ManifestInvalid 7
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#define kBCImg4TrustEvalFail 8
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#define kBCImg4BootManifestFail 9
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#define kBCImg4ProdStatusMismatch 10
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||||
#define kBCImg4SecureModeMismatch 11
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#define kBCImg4PayloadDecodeFail 12
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/* gonna skip this value given my luck with OTA changes */
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||||
#define kBCImg4PayloadDecryptFail 14
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||||
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#define kBCImg3TooLarge 1
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#define kBCImg3NullPtr 2
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||||
#define kBCImg3BDEVReadFail 3
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||||
#define kBCImg3BadMagic 4
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||||
#define kBCImg3UnknownPrivateMagic 5
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||||
#define kBCImg3InstantiationFailed 6
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#define kBCImg3UnacceptedType 7
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||||
#define kBCImg3SignatureValidationFail 8
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#define kBCImg3ConstraintValidationFail 9
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#define kBCImg3GetTagStructFailed 10
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#define kBCImg3DecryptFailed 11
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||||
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#endif
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@@ -0,0 +1,56 @@
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||||
/*
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||||
* Copyright (C) 2007-2012 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
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||||
*/
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||||
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||||
#ifndef __PLATFORM_CHIPID_H
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#define __PLATFORM_CHIPID_H
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#include <sys/types.h>
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__BEGIN_DECLS
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#define CHIP_REVISION_A0 0x00
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#define CHIP_REVISION_A1 0x01
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#define CHIP_REVISION_B0 0x10
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#define CHIP_REVISION_B1 0x11
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#define CHIP_REVISION_C0 0x20
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#define CHIP_REVISION_C1 0x21
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bool chipid_get_production_mode(void);
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bool chipid_get_current_production_mode(void);
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bool chipid_get_raw_production_mode(void);
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void chipid_clear_production_mode(void);
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bool chipid_get_secure_mode(void);
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u_int32_t chipid_get_security_domain(void);
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u_int32_t chipid_get_minimum_epoch(void);
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u_int32_t chipid_get_board_id(void);
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u_int32_t chipid_get_chip_id(void);
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u_int32_t chipid_get_chip_revision(void);
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u_int32_t chipid_get_osc_frequency(void);
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u_int64_t chipid_get_ecid_id(void);
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u_int64_t chipid_get_die_id(void);
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uint32_t chipid_get_fuse_revision(void);
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bool chipid_get_fuse_lock(void);
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void chipid_set_fuse_lock(bool locked);
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bool chipid_get_fuse_seal(void);
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u_int32_t chipid_get_memory_density(void);
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u_int32_t chipid_get_memory_manufacturer(void);
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u_int32_t chipid_get_memory_ranks(void);
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u_int32_t chipid_get_memory_width(void);
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bool chipid_get_memory_dqcal(u_int32_t *cal_data);
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u_int32_t chipid_get_package_id(void);
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bool chipid_get_read_done(void);
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uint32_t chipid_get_pid(void);
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__END_DECLS
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#endif /* __PLATFORM_CHIPID_H */
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@@ -0,0 +1,47 @@
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/*
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* Copyright (C) 2007-2009 Apple Inc. All rights reserved.
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* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
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*
|
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* This document is the property of Apple Inc.
|
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* It is considered confidential and proprietary.
|
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
|
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* Apple Inc.
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*/
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#ifndef __PLATFORM_CLOCKS_H
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#define __PLATFORM_CLOCKS_H
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#include <sys/types.h>
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__BEGIN_DECLS
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/* generic clock descriptors */
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#define CLK_CPU 0
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#define CLK_PERIPH 1
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#define CLK_MEM 2
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#define CLK_BUS 3
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#define CLK_FIXED 4
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#define CLK_TIMEBASE 5
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#define HWCLOCK_BASE 6
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void clock_get_frequencies(u_int32_t *clocks, u_int32_t count);
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u_int32_t clock_get_frequency(int clock);
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void clock_set_frequency(int clock, u_int32_t divider, u_int32_t pll_p, u_int32_t pll_m, u_int32_t pll_s, u_int32_t pll_t);
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u_int32_t clocks_get_performance_divider(void);
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void clock_gate(int device, bool enable);
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void power_on(int device);
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void clock_reset_device(int device);
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void clock_set_device_reset(int device, bool set);
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bool clock_get_pcie_refclk_good(void);
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void platform_diag_gate_clocks(void);
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int clocks_init(void);
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int clocks_set_default(void);
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void clocks_quiesce(void);
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u_int32_t clocks_set_performance(u_int32_t performance_level);
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__END_DECLS
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#endif /* ! __PLATFORM_CLOCKS_H */
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@@ -0,0 +1,93 @@
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/*
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* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
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* Copyright (C) 2007-2013 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
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*
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* This document may not be reproduced or transmitted in any form,
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* in whole or in part, without the express written permission of
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* Apple Computer, Inc.
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*/
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#ifndef __PLATFORM_GPIO_H
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#define __PLATFORM_GPIO_H
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#include <sys/types.h>
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__BEGIN_DECLS
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typedef uint32_t gpio_t;
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// Macro trickery to allow specifying GPIOs as either port and pin (Samsung GPIO style)
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// or by ID number (Apple GPIO controller)
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// For compatiblity reasons, the Apple GPIO controller driver expects the packing of the
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// ID number to skip bits 4-7
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#define GPIO_PORT_PIN(port, pin) ((gpio_t)(((port) & 0xFF) << 8) | ((pin) & 0xFF))
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#define GPIO_COMPAT_SELECT(_1, _2, NAME, ...) NAME
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#define GPIO(...) GPIO_COMPAT_SELECT(__VA_ARGS__, GPIO_PORT_PIN, GPIO_ID)(__VA_ARGS__)
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#define GPIOC(controller, port, pin) ((gpio_t)(((controller) & 0xFF) << 24) | (((port) & 0xFF) << 8) | ((pin) & 0xFF))
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#define GPIO_ID(gpio_id) (GPIO_PORT_PIN(((gpio_id) / 8), ((gpio_id) % 8)))
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#define GPIO_PORT(gpio) (((gpio) >> 8) & 0xFF)
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#define GPIO_PIN(gpio) ((gpio) & 0xFF)
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#define GPIOC_0 (0)
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#define GPIOC_1 (1)
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#define GPIO_NONE (0xFFFFFFFF)
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#define GPIO_CFG_IN 0
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#define GPIO_CFG_OUT 1
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#define GPIO_CFG_OUT_0 2
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#define GPIO_CFG_OUT_1 3
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#define GPIO_CFG_DFLT 4
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#define GPIO_CFG_FUNC0 5
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#define GPIO_CFG_FUNC1 6
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#define GPIO_CFG_FUNC2 7
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#define GPIO_CFG_FUNC(_n) (GPIO_CFG_FUNC0 + (_n))
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#define GPIO_CFG_MAX GPIO_CFG_FUNC(16)
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#define GPIO_NO_PUPDN (0)
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#define GPIO_PUP (1)
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#define GPIO_PUP_STRONG (2)
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#define GPIO_PDN (-1)
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#define GPIO_DRIVE_X1 (0)
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#define GPIO_DRIVE_X2 (1)
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#define GPIO_DRIVE_X3 (2)
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#define GPIO_DRIVE_X4 (3)
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#define GPIO_DRIVE_X6 (4)
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#define GPIO_DRIVE_S0 (0)
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#define GPIO_DRIVE_S1 (1)
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#define GPIO_DRIVE_S2 (2)
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#define GPIO_DRIVE_S3 (3)
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#define GPIO_DRIVE_S4 (4)
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#define GPIO_DRIVE_S5 (5)
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#define GPIO_DRIVE_S6 (6)
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#define GPIO_DRIVE_S7 (7)
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#define GPIO_DRIVE_S8 (8)
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#define GPIO_DRIVE_S9 (9)
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#define GPIO_DRIVE_S10 (10)
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#define GPIO_DRIVE_S11 (11)
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#define GPIO_DRIVE_S12 (12)
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#define GPIO_DRIVE_S13 (13)
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#define GPIO_DRIVE_S14 (14)
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#define GPIO_DRIVE_S15 (15)
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int gpio_init_pinconfig(void); /* set up default pin configuration */
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int gpio_init_memory(uint32_t drive_strength);
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int gpio_diag_pinconfig(void); /* set up pins for diag use */
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uint32_t gpio_read(gpio_t gpio);
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void gpio_write(gpio_t gpio, uint32_t val);
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void gpio_configure(gpio_t gpio, uint32_t config);
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void gpio_configure_pupdn(gpio_t gpio, int32_t pupdn);
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void gpio_fixup_pinconfig(const uint32_t *fixup_list);
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uint32_t gpio_get_board_id(void);
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#define gpio_configure_in(gpio) gpio_configure((gpio), GPIO_CFG_IN)
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#define gpio_configure_out(gpio, val) gpio_configure((gpio), (val) ? GPIO_CFG_OUT_1 : GPIO_CFG_OUT_0);
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__END_DECLS
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#endif
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@@ -0,0 +1,62 @@
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/*
|
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* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
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||||
* in whole or in part, without the express written permission of
|
||||
* Apple Computer, Inc.
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||||
*/
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#ifndef __PLATFORM_INT_H
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#define __PLATFORM_INT_H
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#include <sys/types.h>
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__BEGIN_DECLS
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/* interrupt controller */
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int interrupt_init(void);
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void interrupt_mask_all(void);
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void unmask_int(uint32_t vector);
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void mask_int(uint32_t vector);
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/* optional for platforms requiring polling masked interrupts */
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bool test_int(uint32_t vector);
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int eint_init(void);
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void eint_mask_all(void);
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void unmask_eint(uint32_t eint, uint32_t vector);
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void mask_eint(uint32_t eint, uint32_t vector);
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void eint_trig(uint32_t eint, uint32_t vector, uint32_t trig);
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void eint_pol(uint32_t eint, uint32_t vector, uint32_t trig);
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#define INT_TYPE_IRQ 0
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#define INT_TYPE_FIQ 1
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#define INT_TYPE_LEVEL 0
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#define INT_TYPE_EDGE 2
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void set_int_type(uint32_t vector, int type);
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typedef void (*int_handler)(void *arg);
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int install_int_handler(uint32_t vector, int_handler handler, void *arg);
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int install_eint_handler(uint32_t eint, uint32_t vector, int_handler handler, void *arg);
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struct interrupt_entry {
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int_handler handler;
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void *arg;
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bool edge;
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bool int_mask_requested; /* interrupt controller client requested interrupt mask state */
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};
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/* interprocessor interrupts */
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void interrupt_generate_ipc(uint32_t vector);
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void interrupt_clear_ipc(uint32_t vector);
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/* interrupt routines */
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void platform_irq(void);
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void platform_fiq(void);
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__END_DECLS
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#endif
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@@ -0,0 +1,30 @@
|
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/*
|
||||
* Copyright (C) 2009-2011 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
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#ifndef __PLATFORM_MEMMAP_DEFAULTS_H
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#define __PLATFORM_MEMMAP_DEFAULTS_H
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// Defines for the default load areas
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#define DEFAULT_LOAD_ADDRESS (INSECURE_MEMORY_BASE)
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#if SDRAM_LEN >= (1*1024*1024*1024)
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# define DEFAULT_LOAD_SIZE (0x10000000ULL)
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#else
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# define DEFAULT_LOAD_SIZE (0x04000000ULL)
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#endif
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#define DEFAULT_KERNEL_ADDRESS (DEFAULT_LOAD_ADDRESS + DEFAULT_LOAD_SIZE)
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#define DEFAULT_KERNEL_SIZE (0x03F00000ULL)
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#define DEFAULT_DEVICETREE_ADDRESS (DEFAULT_KERNEL_ADDRESS + DEFAULT_KERNEL_SIZE)
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#define DEFAULT_DEVICETREE_SIZE (0x00100000ULL)
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#define DEFAULT_RAMDISK_ADDRESS (DEFAULT_DEVICETREE_ADDRESS + DEFAULT_DEVICETREE_SIZE)
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#define DEFAULT_RAMDISK_SIZE (DEFAULT_LOAD_SIZE)
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#define DEFAULT_FREE_ADDRESS (DEFAULT_RAMDISK_ADDRESS + DEFAULT_RAMDISK_SIZE)
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#endif /* __PLATFORM_MEMMAP_DEFAULTS_H */
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@@ -0,0 +1,26 @@
|
||||
/*
|
||||
* Copyright (C) 2007 Apple Inc. All rights reserved.
|
||||
* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __PLATFORM_MIU_H
|
||||
#define __PLATFORM_MIU_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
__BEGIN_DECLS
|
||||
|
||||
int miu_init(void);
|
||||
int miu_initialize_dram(bool resume);
|
||||
int miu_initialize_internal_ram(void);
|
||||
void miu_suspend(void);
|
||||
|
||||
__END_DECLS
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,151 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_PMGR_H
|
||||
#define __PLATFORM_PMGR_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
enum pmgr_binning_type_t {
|
||||
PMGR_BINNING_NONE = 0,
|
||||
PMGR_BINNING_CPU,
|
||||
PMGR_BINNING_CPU_SRAM,
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||||
PMGR_BINNING_GPU,
|
||||
PMGR_BINNING_GPU_SRAM,
|
||||
PMGR_BINNING_SRAM,
|
||||
PMGR_BINNING_SOC,
|
||||
PMGR_BINNING_BASE,
|
||||
PMGR_BINNING_REV,
|
||||
PMGR_BINNING_GROUP,
|
||||
PMGR_BINNING_END_OF_LIST,
|
||||
};
|
||||
|
||||
#define PMGR_BINNING_GROUP_ALL 0xf
|
||||
#define PMGR_BINNING_NOTFOUND UINT32_MAX
|
||||
#define PMGR_BINNING_MODE_NONE 0x3f
|
||||
|
||||
struct pmgr_binning_fuse_to_register {
|
||||
uint32_t binning_low:12;
|
||||
uint32_t binning_high:12;
|
||||
uint32_t register_low:6;
|
||||
uint32_t register_64bit:1;
|
||||
uint64_t register_address;
|
||||
};
|
||||
|
||||
struct pmgr_binning_mode_to_fuse {
|
||||
enum pmgr_binning_type_t type;
|
||||
uint32_t mode:16;
|
||||
uint32_t bingroup:16;
|
||||
uint32_t low:11;
|
||||
uint32_t high:11;
|
||||
const struct pmgr_binning_fuse_to_register *fuse_to_register;
|
||||
};
|
||||
|
||||
struct pmgr_binning_mode_to_const {
|
||||
uint32_t mv:12;
|
||||
uint32_t mode:4;
|
||||
uint32_t type:4;
|
||||
uint32_t bingroup:4;
|
||||
uint32_t fuse_revision_minimum:8;
|
||||
};
|
||||
|
||||
struct pmgr_binning_voltage_config {
|
||||
uint32_t safe_voltage:11;
|
||||
uint32_t mode:6;
|
||||
uint32_t type:4;
|
||||
};
|
||||
|
||||
struct pmgr_binning_voltage_index_to_config {
|
||||
uint32_t voltage_index:8;
|
||||
uint32_t safe_voltage:11;
|
||||
uint32_t mode:6;
|
||||
uint32_t type:4;
|
||||
uint32_t bingroup:4;
|
||||
uint32_t fuse_revision_minimum:8;
|
||||
};
|
||||
|
||||
struct pmgr_binning_voltage_index_to_offset {
|
||||
uint32_t voltage_index:8;
|
||||
uint32_t fuse_revision_minimum:8;
|
||||
int32_t offset:15;
|
||||
};
|
||||
|
||||
struct pmgr_binning_board_id_to_offsets {
|
||||
enum pmgr_binning_type_t type;
|
||||
const struct pmgr_binning_voltage_index_to_offset *voltage_offsets;
|
||||
uint32_t size:5;
|
||||
uint32_t chip_rev_min:8;
|
||||
uint32_t board_id:5;
|
||||
uint32_t bingroup;
|
||||
};
|
||||
|
||||
struct pmgr_binning_vol_adj {
|
||||
uint64_t volAdj0:20;
|
||||
uint64_t volAdj1:20;
|
||||
uint64_t volAdj2:20;
|
||||
uint64_t volAdj3:20;
|
||||
uint64_t dvfmMaxAdj:20;
|
||||
uint64_t dvmrAdj0:20;
|
||||
uint64_t dvmrAdj1:20;
|
||||
uint64_t dvmrAdj2:20;
|
||||
};
|
||||
|
||||
struct __attribute__((packed)) pmgr_binning_voltadj_entry {
|
||||
uint32_t voltage_index:8;
|
||||
uint32_t chip_rev_min:8;
|
||||
uint32_t fuse_rev_min:8;
|
||||
struct pmgr_binning_vol_adj voltages;
|
||||
};
|
||||
|
||||
//
|
||||
// Must be defined in platform/SOC/chipid/pmgr_binning_SOC.c
|
||||
//
|
||||
extern const struct pmgr_binning_mode_to_fuse pmgr_binning_mode_to_fuse_data[];
|
||||
extern const struct pmgr_binning_voltage_config pmgr_binning_voltage_config_sram_data[];
|
||||
extern const struct pmgr_binning_mode_to_const pmgr_binning_mode_to_const_data[];
|
||||
extern const struct pmgr_binning_voltadj_entry pmgr_binning_voltadj_entry_data[];
|
||||
extern const struct pmgr_binning_voltage_index_to_config pmgr_binning_voltage_index_to_config_data[];
|
||||
extern const struct pmgr_binning_voltage_index_to_offset pmgr_binning_voltage_index_to_offset_data[];
|
||||
extern const struct pmgr_binning_board_id_to_offsets pmgr_binning_board_id_to_offsets_data[];
|
||||
extern const uint32_t pmgr_binning_voltage_config_sram_data_size;
|
||||
extern const uint32_t pmgr_binning_mode_to_const_data_size;
|
||||
extern const uint32_t pmgr_binning_voltadj_entry_data_size;
|
||||
extern const uint32_t pmgr_binning_voltage_index_to_config_data_size;
|
||||
extern const uint32_t pmgr_binning_board_id_to_offsets_data_size;
|
||||
|
||||
//
|
||||
// Must be defined in platform/SOC/pmgr/pmgr.c
|
||||
//
|
||||
extern bool pmgr_platform_set_perf_state(bool gpu, uint32_t state_num, uint32_t *voltage_indexes, uint32_t voltage_index_size);
|
||||
extern uint32_t pmgr_platform_get_freq(bool gpu, uint32_t voltage_index);
|
||||
extern bool pmgr_platform_get_perf_state(enum pmgr_binning_type_t type, uint32_t state, uint32_t *voltage, uint32_t *freq);
|
||||
|
||||
//
|
||||
// Defined in platform/generic/pmgr/pmgr_binning.c
|
||||
//
|
||||
// Return values are PMGR_BINNING_NOTFOUND if not found/unknown
|
||||
//
|
||||
extern uint32_t pmgr_binning_get_mv(uint32_t voltage_index, bool sram, bool use_binning);
|
||||
extern uint32_t pmgr_binning_mode_get_mv(enum pmgr_binning_type_t type, uint32_t mode);
|
||||
extern uint32_t pmgr_binning_mode_get_value(enum pmgr_binning_type_t binning_type, uint32_t mode);
|
||||
extern uint32_t pmgr_binning_get_base(void);
|
||||
extern uint32_t pmgr_binning_get_group(void);
|
||||
extern uint32_t pmgr_binning_get_revision(void);
|
||||
extern uint32_t pmgr_binning_from_config_data(uint32_t voltage_index, const struct pmgr_binning_voltage_index_to_config **config_data);
|
||||
extern int32_t pmgr_binning_get_voltage_offset(uint32_t voltage_index, enum pmgr_binning_type_t type);
|
||||
extern const struct pmgr_binning_vol_adj *pmgr_binning_get_vol_adj(uint32_t chipdid, uint32_t chip_rev, uint32_t voltage_index);
|
||||
|
||||
//
|
||||
// Defined in platform/generic/pmgr/pmgr_binning_menu.c
|
||||
//
|
||||
extern void pmgr_binning_menu_update_states(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,40 @@
|
||||
/*
|
||||
* Copyright (C) 2007-2008 Apple Inc. All rights reserved.
|
||||
* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __PLATFORM_POWER_H
|
||||
#define __PLATFORM_POWER_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
__BEGIN_DECLS
|
||||
|
||||
void platform_power_init(void);
|
||||
void platform_power_spin(u_int32_t usecs);
|
||||
|
||||
#if WITH_HW_POWER_GATING
|
||||
|
||||
#include <platform/hwpower.h>
|
||||
|
||||
void platform_power_set_gate(uint32_t device, bool state);
|
||||
|
||||
#else /* ! WITH_HW_POWER_GATING */
|
||||
|
||||
#define PWRBIT_ALL (0)
|
||||
#define PWRBIT_OFF_DEFAULT (0)
|
||||
#define PWRBIT_OFF_DIAG (0)
|
||||
|
||||
#define platform_power_set_gate(device, state)
|
||||
|
||||
#endif /* WITH_HW_POWER_GATING */
|
||||
|
||||
__END_DECLS
|
||||
|
||||
#endif /* ! __PLATFORM_POWER_H */
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* Copyright (C) 2007-2010 Apple Inc. All rights reserved.
|
||||
* Copyright (C) 2006 Apple Computer, Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __PLATFORM_TIMER_H
|
||||
#define __PLATFORM_TIMER_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
__BEGIN_DECLS
|
||||
|
||||
/*
|
||||
* One-time timer initialisation.
|
||||
*/
|
||||
int timer_init(u_int32_t timer);
|
||||
|
||||
/*
|
||||
* Returns the current time in ticks.
|
||||
*/
|
||||
u_int64_t timer_get_ticks(void);
|
||||
|
||||
/*
|
||||
* Returns the tick rate per second.
|
||||
*/
|
||||
u_int32_t timer_get_tick_rate(void);
|
||||
|
||||
/*
|
||||
* Returns the number of microseconds that are equivalent to number of ticks passed in.
|
||||
*/
|
||||
utime_t timer_ticks_to_usecs(u_int64_t ticks);
|
||||
|
||||
/*
|
||||
* Returns the number of ticks that are equivalent to number of microseconds passed in.
|
||||
*/
|
||||
u_int64_t timer_usecs_to_ticks(utime_t usecs);
|
||||
|
||||
/*
|
||||
* Registers a single callback at (at_ticks).
|
||||
*
|
||||
* Passing NULL will delete the current callback.
|
||||
*/
|
||||
void timer_deadline_enter(u_int64_t at_ticks, void (* callback)(void));
|
||||
|
||||
/*
|
||||
* Stop all timers; used when shutting down or handing off to another image.
|
||||
*/
|
||||
void timer_stop_all(void);
|
||||
|
||||
/*
|
||||
* Return a word containing entropy.
|
||||
*/
|
||||
u_int32_t timer_get_entropy(void);
|
||||
|
||||
void wdt_enable(void);
|
||||
void wdt_system_reset(void);
|
||||
void wdt_chip_reset(void);
|
||||
|
||||
|
||||
/******************************************
|
||||
Wrapper MACRO for a Register Spin-Loop with Time-Out
|
||||
*/
|
||||
#define SPIN_TIMEOUT_WHILE(__expr,__max) \
|
||||
do { \
|
||||
bool __tmo = false; \
|
||||
uint64_t __start = timer_get_ticks(); \
|
||||
for (;;) { \
|
||||
if ((timer_get_ticks() - __start) >= __max) \
|
||||
__tmo = true; \
|
||||
if (!(__expr)) \
|
||||
break; \
|
||||
if (USE_TMO_IN_REGSPIN_LOOP && __tmo) \
|
||||
panic("%s:%d spin loop has timed out", \
|
||||
__FILE__, __LINE__); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
// If this is ZERO, there will be no Time-Out nor panic
|
||||
#define USE_TMO_IN_REGSPIN_LOOP 1
|
||||
|
||||
// Standard Timeout is 1 second
|
||||
#define SPIN_W_TMO_WHILE(__expr) SPIN_TIMEOUT_WHILE(__expr, 1000000)
|
||||
#define SPIN_W_TMO_UNTIL(__expr) SPIN_W_TMO_WHILE(!(__expr))
|
||||
|
||||
__END_DECLS
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,69 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_SOC_TUNABLES_H
|
||||
#define __PLATFORM_SOC_TUNABLES_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
struct __attribute__((packed)) tunable_struct {
|
||||
int32_t offset:27;
|
||||
int32_t size:5;
|
||||
uint32_t mask;
|
||||
uint32_t value;
|
||||
};
|
||||
|
||||
struct __attribute__((packed)) tunable_struct64 {
|
||||
int32_t offset:27;
|
||||
int32_t size:5;
|
||||
uint64_t mask;
|
||||
uint64_t value;
|
||||
};
|
||||
|
||||
struct tunable_struct_unpacked {
|
||||
int32_t offset;
|
||||
int32_t size;
|
||||
uint64_t mask;
|
||||
uint64_t value;
|
||||
};
|
||||
|
||||
struct tunable_chip_struct {
|
||||
uint32_t chip_rev;
|
||||
uint64_t base_address;
|
||||
const struct tunable_struct *tunable;
|
||||
const struct tunable_struct64 *tunable64;
|
||||
bool reconfig;
|
||||
};
|
||||
|
||||
struct tunable_filtered_chip_struct {
|
||||
uint32_t chip_rev;
|
||||
uint32_t starting_address;
|
||||
uint32_t ending_address;
|
||||
bool cold_boot;
|
||||
bool reconfig;
|
||||
};
|
||||
|
||||
struct tunable_chip_array {
|
||||
const struct tunable_chip_struct *tunable_chip;
|
||||
size_t num_tunable_chips;
|
||||
uintptr_t dt_base;
|
||||
};
|
||||
|
||||
#define TUNABLE_TABLE_END_MARKER { -1, -1, -1, -1 }
|
||||
|
||||
void platform_apply_tunables(const struct tunable_chip_struct *tunable_chips,
|
||||
uint32_t num_tunable_chips, const char* type);
|
||||
|
||||
uint8_t *platform_apply_dt_tunables(const struct tunable_chip_struct *tunable_chips,
|
||||
uint32_t num_tunable_chips, uint8_t *buffer,
|
||||
uintptr_t dt_base, const char *type);
|
||||
#endif
|
||||
|
||||
Reference in new issue
Block a user