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Chris Nutter committed 2023-07-08 13:03:17 -07:00
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Computer, Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_ADBE_SETTINGS_H
#define __TARGET_ADBE_SETTINGS_H
static struct adbe_v2_tuneable adbe_tuneables[] = {
{
.name = "ipad6b",
.adbe0_vftgctl_idle_frame_vblank_enable = 1,
.adbe0_vblank_pos_vbi_pulse = 0x012d,
.adbe0_vblank_clk_gate_wakeup = 0x0007,
.adbe0_vblank_clk_gate_idle = 0x0000,
.adbe0_vblank_busy_finish = 0,
.adbe0_tunable_mode_ctrl = (DBEMODECNTL_PMGR_CLK_GATE_ENABLE | \
DBEMODECNTL_DYN_CLK_GATE_ENABLE | \
DBEMODECNTL_BLK_CLK_GATE_ENABLE),
.adbe0_aap_support = 1,
.adbe0_aap_format_control_reg1 = (AAP_FORMAT_CONTROL_REG1_AUTOPOS |
AAP_FORMAT_CONTROL_REG1_FCMODE(2) |
AAP_FORMAT_CONTROL_REG1_RSVD(0) |
AAP_FORMAT_CONTROL_REG1_VS_POL),
},
};
#endif
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef TARGET_BOARDID_H
#define TARGET_BOARDID_H
// Board ids
#define TARGET_BOARD_ID_J127AP (0x8)
#define TARGET_BOARD_ID_J127DEV (0x9)
#define TARGET_BOARD_ID_J128AP (0xA)
#define TARGET_BOARD_ID_J128DEV (0xB)
// Board revs - for info purposes
/*
J127_DEV1_BOARD_REV (0x0) // DEPRECIATED
J127_DEV2_BOARD_REV (0x4)
J127_PROTO0_BOARD_REV (0x0) // DEPRECIATED
J127_PROTO0_A_BOARD_REV (0x1) // DEPRECIATED
J127_PROTO0_B_BOARD_REV (0x2) // DEPRECIATED
J127_PROTO1_BOARD_REV (0x3) // DEPRECIATED
J127_PRE_PROTO2_BOARD_REV (0x4) // DEPRECIATED
J127_PROTO2_MOHAVE_A1_BOARD_REV (0x5)
J127_PROTO2_MOHAVE_A0_POR_BOARD_REV (0x6)
*/
#endif
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
static inline
void dcs_init_config_fixup_params(dcs_config_params_t *dcs_params, dcs_target_t targtype)
{
dcs_params->chnldec = 0x00050110;
};
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/*
* Copyright (C) 2013-2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Computer, Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_DISPLAY_GAMMA_TABLES_H
#define __TARGET_DISPLAY_GAMMA_TABLES_H
/* display gamma tables */
#define ADP_CM_DEGAMMA_PAIRED_LUT_COUNT 65
#define ADP_CM_DEGAMMA_PAIRED_LUT_SIZE (ADP_CM_DEGAMMA_PAIRED_LUT_COUNT - 1)
static const uint32_t target_blend_degamma_tables[ADP_CM_DEGAMMA_PAIRED_LUT_COUNT] = {
0x00050000,
0x000F000A,
0x00190014,
0x0024001E,
0x0031002A,
0x00410039,
0x0054004A,
0x006A005F,
0x00820076,
0x009E0090,
0x00BD00AD,
0x00DF00CD,
0x010400F1,
0x012C0118,
0x01590142,
0x01880170,
0x01BC01A2,
0x01F301D7,
0x022E0210,
0x026C024C,
0x02AF028D,
0x02F602D2,
0x0340031A,
0x038F0367,
0x03E203B8,
0x043A040D,
0x04950467,
0x04F504C5,
0x055A0527,
0x05C3058E,
0x063005F9,
0x06A20669,
0x071906DD,
0x07940756,
0x081407D4,
0x08990856,
0x092308DE,
0x09B2096A,
0x0A4609FB,
0x0ADF0A92,
0x0B7C0B2D,
0x0C1F0BCD,
0x0CC70C73,
0x0D740D1D,
0x0E270DCD,
0x0EDF0E82,
0x0F9C0F3C,
0x105E0FFC,
0x112610C1,
0x11F3118C,
0x12C6125C,
0x139E1331,
0x147C140D,
0x156014ED,
0x164915D4,
0x173816C0,
0x182C17B1,
0x192718A9,
0x1A2719A6,
0x1B2D1AA9,
0x1C391BB2,
0x1D4B1CC1,
0x1E621DD6,
0x1F801EF0,
0x29F42011,
};
#define ADP_CM_ENGAMMA_PAIRED_LUT_COUNT 513
#define ADP_CM_ENGAMMA_PAIRED_LUT_SIZE (ADP_CM_ENGAMMA_PAIRED_LUT_COUNT - 1)
static const uint32_t target_blend_engamma_tables[ADP_CM_ENGAMMA_PAIRED_LUT_COUNT] = {
0x000D0000,
0x0026001A,
0x003D0033,
0x004F0047,
0x005E0057,
0x006B0065,
0x00770071,
0x0081007C,
0x008B0087,
0x00950090,
0x009D0099,
0x00A500A2,
0x00AD00AA,
0x00B500B1,
0x00BC00B8,
0x00C300C0,
0x00CA00C6,
0x00D000CD,
0x00D600D3,
0x00DC00D9,
0x00E200DF,
0x00E800E5,
0x00ED00EB,
0x00F300F0,
0x00F800F5,
0x00FD00FA,
0x01020100,
0x01070104,
0x010C0109,
0x0110010E,
0x01150113,
0x01190117,
0x011E011C,
0x01220120,
0x01270124,
0x012B0129,
0x012F012D,
0x01330131,
0x01370135,
0x013B0139,
0x013F013D,
0x01430141,
0x01460144,
0x014A0148,
0x014E014C,
0x01510150,
0x01550153,
0x01590157,
0x015C015A,
0x015F015E,
0x01630161,
0x01660165,
0x016A0168,
0x016D016B,
0x0170016F,
0x01730172,
0x01770175,
0x017A0178,
0x017D017B,
0x0180017E,
0x01830181,
0x01860185,
0x01890188,
0x018C018B,
0x018F018E,
0x01920190,
0x01950193,
0x01980196,
0x019B0199,
0x019D019C,
0x01A0019F,
0x01A301A2,
0x01A601A4,
0x01A801A7,
0x01AB01AA,
0x01AE01AD,
0x01B101AF,
0x01B301B2,
0x01B601B5,
0x01B801B7,
0x01BB01BA,
0x01BE01BC,
0x01C001BF,
0x01C301C1,
0x01C501C4,
0x01C801C6,
0x01CA01C9,
0x01CD01CB,
0x01CF01CE,
0x01D201D0,
0x01D401D3,
0x01D601D5,
0x01D901D8,
0x01DB01DA,
0x01DE01DC,
0x01E001DF,
0x01E201E1,
0x01E501E3,
0x01E701E6,
0x01E901E8,
0x01EB01EA,
0x01EE01ED,
0x01F001EF,
0x01F201F1,
0x01F401F3,
0x01F701F5,
0x01F901F8,
0x01FB01FA,
0x01FD01FC,
0x01FF01FE,
0x02010200,
0x02040203,
0x02060205,
0x02080207,
0x020A0209,
0x020C020B,
0x020E020D,
0x0210020F,
0x02120211,
0x02140213,
0x02160215,
0x02180217,
0x021A0219,
0x021D021C,
0x021E021E,
0x02210220,
0x02220222,
0x02240224,
0x02260225,
0x02280227,
0x022A0229,
0x022C022B,
0x022E022D,
0x0230022F,
0x02320231,
0x02340233,
0x02360235,
0x02380237,
0x023A0239,
0x023C023B,
0x023D023D,
0x023F023E,
0x02410240,
0x02430242,
0x02450244,
0x02470246,
0x02490248,
0x024A0249,
0x024C024B,
0x024E024D,
0x0250024F,
0x02520251,
0x02530252,
0x02550254,
0x02570256,
0x02590258,
0x025A025A,
0x025C025B,
0x025E025D,
0x0260025F,
0x02610261,
0x02630262,
0x02650264,
0x02670266,
0x02680267,
0x026A0269,
0x026C026B,
0x026D026C,
0x026F026E,
0x02710270,
0x02720272,
0x02740273,
0x02760275,
0x02770276,
0x02790278,
0x027B027A,
0x027C027B,
0x027E027D,
0x0280027F,
0x02810280,
0x02830282,
0x02840284,
0x02860285,
0x02880287,
0x02890288,
0x028B028A,
0x028C028C,
0x028E028D,
0x028F028F,
0x02910290,
0x02930292,
0x02940293,
0x02960295,
0x02970297,
0x02990298,
0x029A029A,
0x029C029B,
0x029D029D,
0x029F029E,
0x02A102A0,
0x02A202A1,
0x02A402A3,
0x02A502A4,
0x02A702A6,
0x02A802A7,
0x02AA02A9,
0x02AB02AA,
0x02AD02AC,
0x02AE02AD,
0x02B002AF,
0x02B102B0,
0x02B202B2,
0x02B402B3,
0x02B502B5,
0x02B702B6,
0x02B802B8,
0x02BA02B9,
0x02BB02BB,
0x02BD02BC,
0x02BE02BD,
0x02C002BF,
0x02C102C0,
0x02C202C2,
0x02C402C3,
0x02C502C5,
0x02C702C6,
0x02C802C7,
0x02CA02C9,
0x02CB02CA,
0x02CC02CC,
0x02CE02CD,
0x02CF02CE,
0x02D102D0,
0x02D202D1,
0x02D302D3,
0x02D502D4,
0x02D602D5,
0x02D702D7,
0x02D902D8,
0x02DA02D9,
0x02DC02DB,
0x02DD02DC,
0x02DE02DE,
0x02E002DF,
0x02E102E0,
0x02E202E2,
0x02E402E3,
0x02E502E4,
0x02E602E6,
0x02E802E7,
0x02E902E8,
0x02EA02EA,
0x02EC02EB,
0x02ED02EC,
0x02EE02EE,
0x02F002EF,
0x02F102F0,
0x02F202F2,
0x02F402F3,
0x02F502F4,
0x02F602F6,
0x02F802F7,
0x02F902F8,
0x02FA02F9,
0x02FB02FB,
0x02FD02FC,
0x02FE02FD,
0x02FF02FF,
0x03010300,
0x03020301,
0x03030302,
0x03040304,
0x03060305,
0x03070306,
0x03080308,
0x03090309,
0x030B030A,
0x030C030B,
0x030D030D,
0x030E030E,
0x0310030F,
0x03110310,
0x03120312,
0x03130313,
0x03150314,
0x03160315,
0x03170317,
0x03180318,
0x031A0319,
0x031B031A,
0x031C031B,
0x031D031D,
0x031E031E,
0x0320031F,
0x03210320,
0x03220322,
0x03230323,
0x03250324,
0x03260325,
0x03270326,
0x03280328,
0x03290329,
0x032B032A,
0x032C032B,
0x032D032C,
0x032E032E,
0x032F032F,
0x03300330,
0x03320331,
0x03330332,
0x03340333,
0x03350335,
0x03360336,
0x03380337,
0x03390338,
0x033A0339,
0x033B033A,
0x033C033C,
0x033D033D,
0x033F033E,
0x0340033F,
0x03410340,
0x03420341,
0x03430343,
0x03440344,
0x03450345,
0x03470346,
0x03480347,
0x03490348,
0x034A0349,
0x034B034B,
0x034C034C,
0x034D034D,
0x034F034E,
0x0350034F,
0x03510350,
0x03520351,
0x03530352,
0x03540354,
0x03550355,
0x03560356,
0x03570357,
0x03590358,
0x035A0359,
0x035B035A,
0x035C035B,
0x035D035C,
0x035E035E,
0x035F035F,
0x03600360,
0x03610361,
0x03620362,
0x03640363,
0x03650364,
0x03660365,
0x03670366,
0x03680367,
0x03690368,
0x036A036A,
0x036B036B,
0x036C036C,
0x036D036D,
0x036E036E,
0x036F036F,
0x03710370,
0x03720371,
0x03730372,
0x03740373,
0x03750374,
0x03760375,
0x03770376,
0x03780377,
0x03790379,
0x037A037A,
0x037B037B,
0x037C037C,
0x037D037D,
0x037E037E,
0x037F037F,
0x03800380,
0x03810381,
0x03830382,
0x03840383,
0x03850384,
0x03860385,
0x03870386,
0x03880387,
0x03890388,
0x038A0389,
0x038B038A,
0x038C038B,
0x038D038C,
0x038E038D,
0x038F038E,
0x0390038F,
0x03910390,
0x03920391,
0x03930393,
0x03940394,
0x03950395,
0x03960396,
0x03970397,
0x03980398,
0x03990399,
0x039A039A,
0x039B039B,
0x039C039C,
0x039D039D,
0x039E039E,
0x039F039F,
0x03A003A0,
0x03A103A1,
0x03A203A2,
0x03A303A3,
0x03A403A4,
0x03A503A5,
0x03A603A6,
0x03A703A7,
0x03A803A8,
0x03A903A9,
0x03AA03AA,
0x03AB03AB,
0x03AC03AC,
0x03AD03AD,
0x03AE03AD,
0x03AF03AE,
0x03B003AF,
0x03B103B0,
0x03B203B1,
0x03B303B2,
0x03B403B3,
0x03B503B4,
0x03B603B5,
0x03B703B6,
0x03B803B7,
0x03B903B8,
0x03BA03B9,
0x03BB03BA,
0x03BC03BB,
0x03BD03BC,
0x03BD03BD,
0x03BE03BE,
0x03BF03BF,
0x03C003C0,
0x03C103C1,
0x03C203C2,
0x03C303C3,
0x03C403C4,
0x03C503C5,
0x03C603C6,
0x03C703C7,
0x03C803C7,
0x03C903C8,
0x03CA03C9,
0x03CB03CA,
0x03CC03CB,
0x03CD03CC,
0x03CE03CD,
0x03CF03CE,
0x03CF03CF,
0x03D003D0,
0x03D103D1,
0x03D203D2,
0x03D303D3,
0x03D403D4,
0x03D503D5,
0x03D603D6,
0x03D703D6,
0x03D803D7,
0x03D903D8,
0x03DA03D9,
0x03DB03DA,
0x03DC03DB,
0x03DC03DC,
0x03DD03DD,
0x03DE03DE,
0x03DF03DF,
0x03E003E0,
0x03E103E1,
0x03E203E2,
0x03E303E2,
0x03E403E3,
0x03E503E4,
0x03E603E5,
0x03E703E6,
0x03E703E7,
0x03E803E8,
0x03E903E9,
0x03EA03EA,
0x03EB03EB,
0x03EC03EB,
0x03ED03EC,
0x03EE03ED,
0x03EF03EE,
0x03F003EF,
0x03F003F0,
0x03F103F1,
0x03F203F2,
0x03F303F3,
0x03F403F4,
0x03F503F4,
0x03F603F5,
0x03F703F6,
0x03F803F7,
0x03F803F8,
0x03F903F9,
0x03FA03FA,
0x03FB03FB,
0x03FC03FC,
0x03FD03FC,
0x03FE03FD,
0x03FF03FE,
0x043503FF
};
#endif
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_GPIODEF_H
#define __TARGET_GPIODEF_H
/* ipad6,x specific gpio -> pin mappings */
#include <platform/gpio.h>
/* define target-specific gpios in a generic fashion here. */
/* Board Revision */
#define GPIO_BOARD_REV0 GPIO(14, 4) // 116 : GPIO[44]
#define GPIO_BOARD_REV1 GPIO(14, 5) // 117 : GPIO[45]
#define GPIO_BOARD_REV2 GPIO(14, 6) // 118 : GPIO[46]
#define GPIO_BOARD_REV3 GPIO(15, 1) // 121 : GPIO[49]
/* Miscellaneous Pins */
#define GPIO_DISPLAY_HPD GPIO(24, 2) // 194: EPD_HPD0 -> LPDP_TCON_TO_SOC_HPD
#define GPIO_S3E_BOOT_FROM_HOST GPIO_ID(76) // 76 : GPIO[2] -> GPIO_SOC_TO_NAND_FW_STRAP
#define GPIO_TOUCH_SENSOR_ID GPIO(10, 5) // 85 : GPIO[11] -> TOUCH_SENSOR_ID0
/* which IICs to initialize */
#define IICS_MASK (0xF)
#define TRISTAR_IIC_BUS (0)
#define BACKLIGHT_IIC_BUS (0)
#define DISPLAY_PMU_IIC_BUS (0)
#define GPIO_PMU_LCD_PWR_EN (17) // PMU GPIO 18 - GPIO_PMU_TO_LCD_PWREN
#define GPIO_PMU_NAND_LOW_POWER_MODE (15) // PMU GPIO 16 - GPIO_PMU_TO_NAND_LOW_BATT_L
#endif /* ! __TARGET_GPIODEF_H */
@@ -0,0 +1,20 @@
/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef LPDP_SETTINGS_H
#define LPDP_SETTINGS_H
static struct lpdp_port_calibration lpdp_port_calibration_table[1][1] = {
{ {LPDP_PHY_LANE_VREG_ADJ_450_mV, 0}, },
};
#define LPDP_PORT_CALIBRATION_TABLE_FIXED (true)
#endif
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#ifndef __TARGET_POWERCONFIG_H
#define __TARGET_POWERCONFIG_H
// Configuration per target
#define PMU_IIC_BUS 0
#define CHARGER_IIC_BUS 0
// This configuration is very PMU specific and must be included exactly
// once in power.c
#ifdef POWERCONFIG_PMU_SETUP
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
{
};
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
{
{ PMU_IIC_BUS, kD2257_EN_CMD0, (1<<7)|(1<<3)|(1<<2)|(1<<1)|(1<<0) },
{ PMU_IIC_BUS, kD2257_EN_CMD1, (1<<0) }, // buck8
{ PMU_IIC_BUS, kD2257_EN_CMD2, 1 }, // enable WLED SPI access
{ PMU_IIC_BUS, kD2257_SPI_CTRL, 1 } // enable SPI access
};
static const struct pmu_setup_struct pmu_warm_init[] =
{
};
// IO_CONFIG[7:6] 0=I 1=O_OD 2=O_PP 3=SS
// IO_TYPE[5:3] O 0=L 1=32K 2=nR 3=TI 4=L
// PUPD[2:1] O 0=NP 1=PU 2=NP 3=<0>
// WAKE_LVL[0] O 0=low 1=high
// IO_TYPE[5:3] I 0=L_AH 1=L_AL 2=RE 3=FE 4=AE
// PUPD[2:1] I 0=NP 1=PU 2=PD_GND 3=<0>
// WAKE_LVL[0] I 0=NW 1=W
//
// <rdar://problem/19493772> J127 GPIO Spreadsheet (master)
// J127_IO_spreadsheet_v26 (EVT).xlsx
static const struct pmu_setup_struct pmu_cold_init[] =
{
// TODO :This is a Bringup Hack, remove
{ PMU_IIC_BUS, kD2257_BUCK0_VSEL, 0xc0 }, // CPU rail
{ PMU_IIC_BUS, kD2257_BUCK1_VSEL, 0xc0 }, // GPU rail
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK1_EN, 0xf }, // GPU power rail (see <rdar://problem/19733370>)
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK8_EN, 0xf }, // GPU RAM power rail (see <rdar://problem/19733370>)
// TODO :This is a Bringup Hack, remove
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK3_SW2_EN, 0xf}, // <rdar://20080883> J99A/J127: Keep DVDD power rail on to avoid speaker pops (work around HW issue)
{ PMU_IIC_BUS, kD2257_PWRONOFF_LDO4_EN, 0x1 }, // Enable PP3V0_ALS
{ PMU_IIC_BUS, kD2257_PWRONOFF_LDO7_EN, 0x1 }, // Enable PP3V3_USB_SOC
{ PMU_IIC_BUS, kD2257_LDO2_BYPASS, 0x1}, // bypass when Active rdar://19773152
// Drive GPIO_PMU_TO_1V1_EXT_SW_ON (PMU GPIO 20) to enable PP1V1_S1_EXT_SW
// which inturn is SNSI_PP1V1_S1_DDR_VDDQ_x.
//
// Should be ON by default via OTP.
// Drive GPIO_PMU_TO_1V8_EXT_SW2_ON (PMU GPIO 21) to enable PP1V8_S2_EXT_SW2
// which inturn is PP1V8_S2_IO_EXPANDER.
//
// Should be ON by default via OTP.
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_ENA }, // Enable Test Mode
{ PMU_IIC_BUS, kD2257_EN_CMD3, 0}, // Enable SPI access for BUCKx (x=3)
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_DIS }, // Disable Test Mode
// GPIO1: GPIO_AJ_HALL_TO_PMU_IRQ_L
{ PMU_IIC_BUS, kD2257_GPIO1_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
{ PMU_IIC_BUS, kD2257_GPIO1_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO2: GPIO_ACC_TO_PMU_PWR_SW_OC_L
{ PMU_IIC_BUS, kD2257_GPIO2_CONF1, (0<<6)|(3<<3)|(0<<1)|(0<<0) }, // 0x18 Input, AnyE, No PU/PD
{ PMU_IIC_BUS, kD2257_GPIO2_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
// GPIO3: GPIO_ORION_TO_SOC_TO_PMU_IRQ
{ PMU_IIC_BUS, kD2257_GPIO3_CONF1, (0<<6)|(0<<3)|(2<<1)|(1<<0) }, // 0x25 Input, AH, PD, Wakeup
{ PMU_IIC_BUS, kD2257_GPIO3_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO4: GPIO_PMU_TO_ACC_PWR_SW (was GPIO_PMU_TO_ACC_PWR_SEL)
{ PMU_IIC_BUS, kD2257_GPIO4_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU, Low
{ PMU_IIC_BUS, kD2257_GPIO4_CONF2, (0<<3)|(0<<0) }, // 0x00 VCC_MAIN, no DEB
// GPIO6: UART_BATT_HDQ
{ PMU_IIC_BUS, kD2257_GPIO6_CONF1, (0<<6)|(3<<3)|(0<<1)|(1<<0) }, // 0x19 Input, FE, No PU/PD
{ PMU_IIC_BUS, kD2257_GPIO6_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
// GPIO7: GPIO_BT_TO_PMU_HOST_WAKE
{ PMU_IIC_BUS, kD2257_GPIO7_CONF1, (0<<6)|(2<<3)|(0<<1)|(1<<0) }, // 0x11 Input, RE, No PU/PD, Wakeup
{ PMU_IIC_BUS, kD2257_GPIO7_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO8: GPIO_WLAN_TO_PMU_HOST_WAKE
{ PMU_IIC_BUS, kD2257_GPIO8_CONF1, (0<<6)|(2<<3)|(2<<1)|(1<<0) }, // 0x15 Input, RE, PD, Wakeup
{ PMU_IIC_BUS, kD2257_GPIO8_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO10: GPIO_CODEC_TO_PMU_WAKE_L
{ PMU_IIC_BUS, kD2257_GPIO10_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, Wakeup
{ PMU_IIC_BUS, kD2257_GPIO10_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
// GPIO11: GPIO_STB_HALL_TO_PMU_IRQ_L
{ PMU_IIC_BUS, kD2257_GPIO11_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
{ PMU_IIC_BUS, kD2257_GPIO11_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO12: GPIO_TS_TO_SOC_TO_PMU_IRQ
{ PMU_IIC_BUS, kD2257_GPIO12_CONF1, (0<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x01 Input, AH, No PU/PD, Wakeup
{ PMU_IIC_BUS, kD2257_GPIO12_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
// GPIO13: GPIO_BELFIELD_TO_PMU_WAKE_L (was GPIO_IO_EXP_TO_PMU_IRQ)
{ PMU_IIC_BUS, kD2257_GPIO13_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
{ PMU_IIC_BUS, kD2257_GPIO13_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
// GPIO14: GPIO_EUPHRATES_TO_PMU_WAKE (was PCIE_WLAN_TO_PMU_WAKE_L)
{ PMU_IIC_BUS, kD2257_GPIO14_CONF1, (0<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x01 Input, AH, No PU/PD, WakeUp
{ PMU_IIC_BUS, kD2257_GPIO14_CONF2, (3<<3)|(1<<0) }, // 0x19 PP1V8_ALWAYS, 5ms
// GPIO15: GPIO_EUPHRATES_TO_SOC_TO_PMU_IRQ_L (was GPIO_PMU_TO_CODEC_RESET_L)
{ PMU_IIC_BUS, kD2257_GPIO15_CONF1, (0<<6)|(3<<3)|(1<<1)|(1<<0) }, // 0x1B Input, FE, PU, WakeUp
{ PMU_IIC_BUS, kD2257_GPIO15_CONF2, (3<<3)|(2<<0) }, // 0x1A PP1V8_ALWAYS, 10ms
// GPIO16: GPIO_PMU_TO_NAND_LOW_BATT_L
// kD2257_GPIO16_CONF1 gets set in target_late_init()
{ PMU_IIC_BUS, kD2257_GPIO16_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO18: Enable GPIO_PMU_TO_LCD_PWREN
{ PMU_IIC_BUS, kD2257_GPIO18_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO18_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO9: GPIO_BB_TO_PMU_HOST_WAKE_L
{ PMU_IIC_BUS, kD2257_GPIO9_CONF1, (0<<6)|(1<<3)|(2<<1)|(0<<0) }, // 0x0C Input, AL, PD
{ PMU_IIC_BUS, kD2257_GPIO9_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
#if TARGET_HAS_BASEBAND
// GPIO5: GPIO_PMU_TO_BBPMU_RESET_R_L (rdar://20064772, rdar://20110706, rdar://21211826)
{ PMU_IIC_BUS, kD2257_GPIO5_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, no PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO5_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO17: GPIO_PMU_TO_BB_VBUS_DET
{ PMU_IIC_BUS, kD2257_GPIO17_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO17_CONF2, (0<<3)|(0<<0) }, // 0x00 VCC_MAIN, no DEB
#else
// GPIO5: GPIO_PMU_TO_BBPMU_RESET_R_L
{ PMU_IIC_BUS, kD2257_GPIO5_CONF1, (0<<6)|(0<<3)|(2<<1)|(0<<0) }, // 0x40 Input, AH, PD
{ PMU_IIC_BUS, kD2257_GPIO5_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO17: GPIO_PMU_TO_BB_VBUS_DET
{ PMU_IIC_BUS, kD2257_GPIO17_CONF1, (0<<6)|(0<<3)|(2<<1)|(0<<0) }, // 0x40 Input, AH, PD
{ PMU_IIC_BUS, kD2257_GPIO17_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
#endif
// GPIO19: GPIO_PMU_TO_EUPHRATES_LINCH_EN (was GPIO_GANGES_TO_PMU_WAKE)
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP1,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP2,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP3,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_OFF, (1<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x40 Output(Open Drain), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1, (1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO19_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO20: GPIO_PMU_TO_1V1_EXT_SW_ON
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO20_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO21: GPIO_PMU_TO_1V8_EXT_SW2_ON
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO21_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
// GPIO22: GPIO_PMU_TO_3V3_EXT_SW_ON (was GPIO_GANGES_TO_SOC_TO_PMU_IRQ_L)
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
{ PMU_IIC_BUS, kD2257_GPIO22_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
};
static const struct pmu_setup_struct pmu_backlight_enable[] =
{
{ PMU_IIC_BUS, kDIALOG_WLED_ISET, 0x06 }, // 75% of max 0x7FF
{ PMU_IIC_BUS, kDIALOG_WLED_ISET2, 0x00 },
{ PMU_IIC_BUS, kD2257_WLED_CTRL1, // enable all LED strings
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
{ PMU_IIC_BUS, kD2257_WLED_CTRL2, // enable all LED strings
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDA_EN, 0x1 }, // enable LED Power
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDB_EN, 0x1 }, // enable LED Power
};
static const struct pmu_setup_struct pmu_backlight_disable[] =
{
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDA_EN, 0x0 }, // disable LED Power
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDB_EN, 0x0 }, // disable LED Power
};
static const struct core_rails_struct soc_rails[] =
{
{ PMU_IIC_BUS, 0, kD2257_BUCK2_VSEL }
};
static const struct core_rails_struct cpu_rails[] =
{
{ PMU_IIC_BUS, 0, kD2257_BUCK0_VSEL }
};
// It's VDD FIXED! used for RAM inside the SOC
static const struct core_rails_struct ram_rails[] =
{
{ PMU_IIC_BUS, 0, kD2257_BUCK5_VSEL }
};
// This is indexed with POWER_RAIL_*, I really just need to use the
// index in LDO[]
target_rails_t target_rails = {
{ 0x10, 450, 1250, 3125 }, // POWER_RAIL_CPU, BUCK0
{ 0x15, 600, 1400, 3125 }, // POWER_RAIL_VDD_FIXED BUCK5
{ 0x12, 600, 1400, 3125 }, // POWER_RAIL_SOC, BUCK2
{ 0x17, 600, 1400, 3125 }, // POWER_RAIL_CPU_RAM, BUCK7
{ 0x11, 450, 1250, 3125 }, // POWER_RAIL_GPU, BUCK1
{ 0x18, 600, 1400, 3125 }, // POWER_RAIL_GPU_RAM, BUCK8
};
#endif // POWERCONFIG_PMU_SETUP
#define NO_BATTERY_VOLTAGE 2700
#define MIN_BOOT_BATTERY_VOLTAGE 3600
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
#define TARGET_BOOT_BATTERY_CAPACITY 50
#define PRECHARGE_BACKLIGHT_LEVEL 824
#define ALWAYS_BOOT_BATTERY_VOLTAGE (TARGET_BOOT_BATTERY_VOLTAGE + 100)
#define TARGET_MAX_USB_INPUT_CURRENT 2400
#define TARGET_PRECHARGE_ALWAYS_DISPLAY_IDLE 1
#define ACC_PWR_LDO (6)
#define GASGAUGE_BATTERYID_BLOCK 1
#endif
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_UARTCONFIG_H
#define __TARGET_UARTCONFIG_H
/* define one debug serial ports */
#define DEBUG_SERIAL_PORT (0)
#define HDQGAUGE_SERIAL_PORT (5)
#endif
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#ifndef __TARGET_USBCONFIG_H
#define __TARGET_USBCONFIG_H
#ifdef USBPHY_OTGTUNE0
#undef USBPHY_OTGTUNE0
#define USBPHY_OTGTUNE0 (0x37377B93)
#endif /* USBPHY_OTGTUNE0 */
#ifdef USBPHY_OTGTUNE1
#undef USBPHY_OTGTUNE1
#define USBPHY_OTGTUNE1 (0x20C04)
#endif /* USBPHY_OTGTUNE1 */
#endif /* __TARGET_USBCONFIG_H */
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#include <debug.h>
#include <drivers/apple/gpio.h>
#include <drivers/power.h>
#include <drivers/gasgauge.h>
#include <lib/env.h>
#include <lib/mib.h>
#include <lib/paint.h>
#include <lib/syscfg.h>
#include <platform.h>
#include <platform/gpiodef.h>
#include <platform/soc/chipid.h>
#include <target.h>
#include <target/boardid.h>
#include <platform/soc/hwclocks.h>
#include <platform/soc/pmgr.h>
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
#include <drivers/displayport/displayport.h>
#include <drivers/displayport.h>
#endif
#if TARGET_USES_BLEND_CM
#include <target/display_gamma_tables.h>
#endif
MIB_CONSTANT(kMIBTargetOsPictureScale, kOIDTypeUInt32, 2);
MIB_CONSTANT(kMIBTargetPictureRotate, kOIDTypeInt32, 0);
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
static dp_t dp;
#endif
// DEV settings for:
//
// IO GPIO 298: AOP_I2CM_SCL (AOP GPIO 10) -> SPI_ACCEL_CS_L
// IO GPIO 299: AOP_FUNC[0] (AOP GPIO 11) -> SPI_MAGNESIUM_CS_L
// IO GPIO 303: AOP_FUNC[4] (AOP GPIO 15) -> SPI_CARBON_CS_L
// IO GPIO 305: AOP_FUNC[6] (AOP GPIO 17) -> SPI_PHOSPHORUS_CS_L
static const uint32_t fixup_list_dev[] = {
GPIOC(GPIOC_1, (10 / 8), (10 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S7 | SLOW_SLEW),
GPIOC(GPIOC_1, (11 / 8), (11 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S7 | SLOW_SLEW),
GPIOC(GPIOC_1, (15 / 8), (15 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S7 | SLOW_SLEW),
GPIOC(GPIOC_1, (17 / 8), (17 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S7 | SLOW_SLEW),
UINT32_MAX, UINT32_MAX
};
// AP settings for:
//
// IO GPIO 298: AOP_I2CM_SCL (AOP GPIO 10) -> SPI_ACCEL_CS_L
// IO GPIO 299: AOP_FUNC[0] (AOP GPIO 11) -> SPI_MAGNESIUM_CS_L
// IO GPIO 303: AOP_FUNC[4] (AOP GPIO 15) -> SPI_CARBON_CS_L
// IO GPIO 305: AOP_FUNC[6] (AOP GPIO 17) -> SPI_PHOSPHORUS_CS_L
static const uint32_t fixup_list_ap[] = {
GPIOC(GPIOC_1, (10 / 8), (10 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S4 | SLOW_SLEW),
GPIOC(GPIOC_1, (11 / 8), (11 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S4 | SLOW_SLEW),
GPIOC(GPIOC_1, (15 / 8), (15 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S4 | SLOW_SLEW),
GPIOC(GPIOC_1, (17 / 8), (17 % 8)),
(FUNC_ALT0 | PULL_UP | DRIVE_S4 | SLOW_SLEW),
UINT32_MAX, UINT32_MAX
};
static uint32_t gpio_board_rev;
static bool gpio_board_rev_valid;
#if WITH_HW_POWER
int pmu_set_data(int dev, uint16_t reg, uint8_t byte, bool do_confirm);
int pmu_get_data(int dev, uint16_t reg, uint8_t *byte);
#endif
uint32_t
ipad6b_get_board_rev (void)
{
/*
* Sequence:
* - Set GPIO as input.
* - Enable PU and disable PD.
* - Read
*/
if (!gpio_board_rev_valid) {
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_IN);
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_IN);
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_IN);
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_IN);
gpio_configure_pupdn(GPIO_BOARD_REV0, GPIO_PUP);
gpio_configure_pupdn(GPIO_BOARD_REV1, GPIO_PUP);
gpio_configure_pupdn(GPIO_BOARD_REV2, GPIO_PUP);
gpio_configure_pupdn(GPIO_BOARD_REV3, GPIO_PUP);
spin(100); // Wait 100us
gpio_board_rev =
(gpio_read(GPIO_BOARD_REV3) << 3) |
(gpio_read(GPIO_BOARD_REV2) << 2) |
(gpio_read(GPIO_BOARD_REV1) << 1) |
(gpio_read(GPIO_BOARD_REV0) << 0);
gpio_configure(GPIO_BOARD_REV0, GPIO_CFG_DFLT);
gpio_configure(GPIO_BOARD_REV1, GPIO_CFG_DFLT);
gpio_configure(GPIO_BOARD_REV2, GPIO_CFG_DFLT);
gpio_configure(GPIO_BOARD_REV3, GPIO_CFG_DFLT);
gpio_board_rev_valid = true;
}
return (gpio_board_rev);
}
int
target_get_boot_battery_capacity (void)
{
int temp = 0;
#if WITH_HW_GASGAUGE
if (gasgauge_read_temperature(&temp) != 0) {
temp = 0; // defensive
}
#endif
if (temp > 500) {
return (0); // rely on SOC1 clear only
}
return (50); // @see rdar://16587240
}
uint32_t
target_get_board_rev (void)
{
if (!gpio_board_rev_valid) {
ipad6b_get_board_rev();
}
return (gpio_board_rev);
}
static
void target_fixup_power (uint32_t board_rev)
{
#if WITH_HW_POWER
int charger_set_data(int dev, uint16_t reg, uint8_t byte, bool do_confirm);
int rc;
// <rdar://problem/22952749> Update PMU UV comparator settings for J127 units prior to EVT
// NOTE: kD2257_IPK_UV_BUCK1_UV_EN_THR, kD2257_IPK_UV_BUCK1_UV_DIG_CONF_1 (0xf8c,0x0f8a) set in pmu_uvwarn_config()
uint8_t data=0xff;
pmu_get_data(0, 0x0201, &data);
if ( data < 0x09 ) { // 0x09 = BJ
rc = pmu_set_data(0, 0x7000, 0x1d, false);
if ( rc<0 ) {
dprintf(DEBUG_CRITICAL, "pmu: cannot enter test mode (%d)\n", rc);
} else {
rc = pmu_set_data(0, 0x0f8e, 0x0f, true); // was 0xa
if ( rc==0 ) rc = pmu_set_data(0, 0x0f87, 0x00, true); // required
if ( rc==0 ) rc = pmu_set_data(0, 0x0f8d, 0x0f, true); // ok
if ( rc==0 ) rc = pmu_set_data(0, 0x1108, 0xff, true);
if ( rc!=0 ) dprintf(DEBUG_INFO, "pmu: failed UV_WARN reconfig(%d)\n", rc);
int temp=pmu_set_data(0, 0x700, 0x1d, false);
if ( temp<0 ) panic("pmu: cannot exit test mode\n");
}
}
rc=charger_set_data(0, 0x04d7, 0x04, true);
if ( rc<0 ) dprintf(DEBUG_CRITICAL, "chg: cannot update ATV table (%d)\n", rc);
#endif
}
void
target_early_init (void)
{
uint32_t board_rev = target_get_board_rev();
uint32_t board_id = platform_get_board_id();
dprintf(DEBUG_INFO, "%s: board id: 0x%02x, board rev: 0x%02x\n",
__func__, board_id, board_rev);
#if PRODUCT_LLB || PRODUCT_IBSS
// Refer rdar://18848645
target_fixup_power(board_rev);
pmgr_platform_config_uvwarn();
#endif
}
void
target_late_init (void)
{
power_set_gpio(GPIO_PMU_NAND_LOW_POWER_MODE, 1, 1);
}
void
target_init (void)
{
#if WITH_HW_FLASH_NOR
flash_nor_init(SPI_NOR0);
#endif
if (target_config_dev()) {
gpio_fixup_pinconfig(fixup_list_dev);
} else {
gpio_fixup_pinconfig(fixup_list_ap);
}
}
void
target_quiesce_hardware (void)
{
}
void
target_poweroff (void)
{
}
int
target_bootprep (enum boot_target target)
{
return 0;
}
bool
target_should_recover (void)
{
return (platform_get_request_dfu2() && power_has_usb());
}
bool
target_should_poweron (bool *cold_button_boot)
{
#if WITH_HW_POWER
if (power_get_boot_flag() == kPowerBootFlagColdButton) {
*cold_button_boot = true;
}
#else
*cold_button_boot = false;
#endif // WITH_HW_POWER
return (!*cold_button_boot || platform_get_request_dfu1());
}
bool
target_should_poweroff (bool at_boot)
{
return (platform_get_request_dfu1() && (!at_boot || !power_has_usb()));
}
void * target_get_display_configuration(void)
{
#if (APPLICATION_IBOOT && (PRODUCT_IBOOT || PRODUCT_IBEC))
dp.mode = kDPControllerMode_Slave;
dp.type = kDPControllerType_EDP;
dp.min_link_rate = kLinkRate270Gbps;
dp.max_link_rate = kLinkRate270Gbps;
dp.lanes = 0x4;
dp.ssc = 0x0;
dp.alpm = 0x1;
dp.vrr_enable = 0x1;
dp.vrr_on = 0x1;
dp.rx_n1= 25;
dp.rx_n2= 2;
dp.rx_n3= 13380;
dp.rx_n5= 0x2;
dp.fast_link_training = true;
return ((void *)(&dp));
#else
return NULL;
#endif
}
#if WITH_ENV
void
target_setup_default_environment (void)
{
// boot-device is set in platform's init.c
env_set("display-color-space","ARGB8101010", 0);
env_set("display-timing", "ipad6", 0);
env_set("adbe-tunables", "ipad6b", 0);
env_set("adfe-tunables", "ipad6b", 0);
}
#endif
#if WITH_DEVICETREE
int
target_update_device_tree (void)
{
#if WITH_HW_DISPLAY_EDP
DTNode *clcd_node = NULL, *backlight_node = NULL, *lcd_node = NULL;
DTNode *lpdp_node = NULL;
#endif
DTNode *node;
void *propData;
uint32_t propSize;
char *propName;
#if WITH_HW_DISPLAY_EDP
if (FindNode(0, DP_DTPATH, &node)) {
extern int edp_update_device_tree(DTNode *edp_node,
DTNode *lcd_node,
DTNode *clcd_node,
DTNode *backlight_node);
FindNode(0, "arm-io/disp0", &clcd_node);
FindNode(0, DP_DTPATH "/lcd", &lcd_node);
FindNode(0, "backlight", &backlight_node);
edp_update_device_tree(node, lcd_node, clcd_node, backlight_node);
extern int lpdp_phy_update_device_tree(DTNode *lpdp_node);
FindNode(0, DPPHY_DTPATH, &lpdp_node);
lpdp_phy_update_device_tree(lpdp_node);
}
#endif
#if TARGET_USES_BLEND_CM
if (dt_find_node(0, "arm-io/disp0", &node)) {
dt_set_prop(node, "cm-post-blend-degamma", target_blend_degamma_tables, sizeof(target_blend_degamma_tables));
dt_set_prop(node, "cm-post-blend-engamma", target_blend_engamma_tables, sizeof(target_blend_engamma_tables));
}
#endif
// Update the als calibration data for all nodes that may be present on the dev board
if (dt_find_node(0, "arm-io/i2c3/als-1-fh", &node)) {
propName = "alsCalibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
//First, copy the CSCI key is present
if(syscfgCopyDataForTag('CSCI', propData, propSize) == -1) {
//Otherwise try to copy the CTMP key
syscfgCopyDataForTag('CTMP', propData, propSize);
}
}
}
if (dt_find_node(0, "arm-io/i2c3/als-2-cn", &node)) {
propName = "alsCalibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
//First, copy the CSCI key is present
if(syscfgCopyDataForTag('CSCI', propData, propSize) == -1) {
//Otherwise try to copy the CTMP key
syscfgCopyDataForTag('CTMP', propData, propSize);
}
}
}
// Update the backlight calibration data
if (FindNode(0, "backlight", &node)) {
propName = "backlight-calibration";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('BLCl', propData, propSize);
}
}
if (dt_find_node(0, "arm-io/spi3/multi-touch", &node)) {
propName = "multitouch-to-display-offset";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('MtDO', propData, propSize);
}
propName = "firefly-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('FfCl', propData, propSize);
}
//
// rdar://problem/20508636 - Orb Cal Sys Cfg Keys
//
propName = "orb-afe-cal";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('OrbF', propData, propSize);
}
propName = "orb-sum-cal";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('OrbS', propData, propSize);
}
propName = "orb-dhybrid-cal";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('OrbD', propData, propSize);
}
propName = "orb-plmf-cal";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('OrbP', propData, propSize);
}
}
// Update the compass calibration data
if (dt_find_node(0, "arm-io/aop/iop-aop-nub/compass", &node)) {
propName = "compass-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('CPAS', propData, propSize);
}
propName = "compass-orientation";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('CRot', propData, propSize);
}
}
// Update the gyro calibration data
if (dt_find_node(0, "arm-io/aop/iop-aop-nub/gyro", &node)) {
propName = "gyro-orientation";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GRot', propData, propSize);
}
propName = "gyro-sensitivity-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GSCl', propData, propSize);
}
propName = "gyro-temp-table";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GYTT', propData, propSize);
}
propName = "gyro-interrupt-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('GICl', propData, propSize);
}
}
// Update accelerometer calibration data
if (dt_find_node(0, "arm-io/aop/iop-aop-nub/accel", &node)) {
propName = "accel-orientation";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('ARot', propData, propSize);
}
propName = "low-temp-accel-offset";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('LTAO', propData, propSize);
}
propName = "accel-sensitivity-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('ASCl', propData, propSize);
}
propName = "accel-interrupt-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('AICl', propData, propSize);
}
}
// Update pressure sensor calibration data
if (dt_find_node(0, "arm-io/aop/iop-aop-nub/pressure", &node)) {
propName = "pressure-offset-calibration";
if (dt_get_prop(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('SPPO', propData, propSize);
}
}
//
// <rdar://problem/21492027> J127: Unexpected speaker calibration values
//
if (FindNode(0, "arm-io/i2c1/audio-speaker-cn-left", &node)) {
propName = "speaker-calib";
if (FindProperty(node, &propName, &propData, &propSize)) {
syscfgCopyDataForTag('SpCl', propData, propSize);
}
}
return (0);
}
#endif // WITH_DEVICETREE
#if WITH_PAINT
// The default background is expected to to be black and the artwork is expected
// to be white. This arrangement will be inverted depending upon the cover glass
// color of the device.
// Sample DClr_override values for testing devices without DClr syscfg entries
// (enclosure/cover glass):
// gray/black: setenv DClr_override 000200009B9899002827270000000000
// silver/white: setenv DClr_override 00020000D8D9D700E4E7E80000000000
static color_policy_invert_t target_cover_glass_color_table[] = {
{ RGB( 39, 39, 40), false }, // Blacker - black background, white logo
{ RGB(228, 231, 232), true }, // Whiter - white background, black logo
// !!!FIXME!!! Remove the colors below when proto devices have been deprecated
// <rdar://problem/22951458> Remove old J127/J128 DClr values after Proto 2 units are deprecated
{ RGB( 59, 59, 60), false }, // Black - black background, white logo
{ RGB(225, 228, 227), true }, // White - white background, black logo
};
color_policy_t *
target_color_map_init (enum colorspace cs, color_policy_t *color_policy)
{
// Must have a color policy structure passed in.
if (color_policy == NULL)
goto fail;
if ((cs != CS_RGB888) && (cs != CS_ARGB8101010))
goto fail;
color_policy->policy_type = COLOR_MAP_POLICY_INVERT;
color_policy->color_table = (void *)target_cover_glass_color_table;
color_policy->color_count = ARRAY_SIZE(target_cover_glass_color_table);
color_policy->map_color = NULL; // Use standard remapper
return color_policy;
fail:
return NULL;
}
#endif // WITH_PAINT
#if !WITH_HW_POWER
bool
power_needs_precharge (void)
{
return false;
}
void
power_cancel_buttonwait (void)
{
}
bool
power_do_chargetrap (void)
{
return false;
}
bool
power_is_suspended (void)
{
return false;
}
void
power_will_resume (void)
{
}
bool
power_has_usb (void)
{
return false;
}
int
power_read_dock_id (unsigned *id)
{
return -1;
}
bool
power_get_diags_dock (void)
{
return false;
}
uint32_t
power_get_boot_battery_level (void)
{
return 0;
}
int
power_get_nvram (uint8_t key, uint8_t *data)
{
return -1;
}
int
power_set_nvram (uint8_t key, uint8_t data)
{
return -1;
}
int
power_set_soc_voltage (unsigned mv, int override)
{
return -1;
}
bool force_usb_power = false;
void
power_set_usb_state (bool configured, bool suspended)
{
}
int
power_backlight_enable (uint32_t backlight_level)
{
return 0;
}
#endif /* ! WITH_HW_POWER */
+59
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/*
* Copyright (C) 2015 Apple Inc. All rights reserved.
*
* This document is the property of Apple Inc.
* It is considered confidential and proprietary.
*
* This document may not be reproduced or transmitted in any form,
* in whole or in part, without the express written permission of
* Apple Inc.
*/
#include <debug.h>
#include <drivers/apple/gpio.h>
#include <platform.h>
#include <platform/soc/hwregbase.h>
#include <stdint.h>
#include <target.h>
#include <target/boardid.h>
extern uint32_t ipad6b_get_board_rev(void);
extern const uint32_t* target_get_proto2_gpio_cfg(uint32_t gpioc);
static bool use_proto2_pinconfig;
static bool board_rev_determined;
const uint32_t *
target_get_default_gpio_cfg (uint32_t gpioc)
{
uint32_t brev;
// HACK: The first call into target_get_default_gpio_cfg() reads
// and attempts to restore BOARD_REV[3:0] to GPIO_CFG_DEFAULT.
//
// This will result in a recursive call back into
// target_get_default_gpio_cfg. To break the recursion, while determining
// board rev we can reply with any pinconfig since it's only being used
// for BOARD_REV[3:0] and it's CFG_DISABLED in all pinconfigs.
//
// Remove this after we no longer have BOARD_REV-dependent pinconfigs.
if (use_proto2_pinconfig) {
return (target_get_proto2_gpio_cfg(gpioc));
}
if (!board_rev_determined) {
use_proto2_pinconfig = true;
(void)ipad6b_get_board_rev();
use_proto2_pinconfig = false;
board_rev_determined = true;
}
switch ((brev = ipad6b_get_board_rev())) {
default:
return (target_get_proto2_gpio_cfg(gpioc));
}
}
File diff suppressed because it is too large. Load diff
+75
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# Copyright (C) 2015 Apple Inc. All rights reserved.
#
# This document is the property of Apple Inc.
# It is considered confidential and proprietary.
#
# This document may not be reproduced or transmitted in any form,
# in whole or in part, without the express written permission of
# Apple Inc.
#
LOCAL_DIR := $(GET_LOCAL_DIR)
TARGET_DIR := $(LOCAL_DIR)
OPTIONS += \
DIALOG_D2257=1 \
DIALOG_D2355=1 \
TARGET_BOOT_CPU_VOLTAGE=0 \
TARGET_BOOT_RAM_VOLTAGE=0 \
TARGET_BOOT_SOC_VOLTAGE=0 \
TARGET_PLL_VCO_CAP=0 \
TARGET_VCO_RANGE=2 \
TARGET_LPF_CTRL=8 \
TARGET_ICP_CTR=15 \
TARGET_PHY_STOP_WAIT_TIME=0x28 \
DISPLAY_LANDSCAPE_IPAD_TUNABLES=1 \
PMU_LCD_PWR_EN=1 \
TARGET_HAS_BASEBAND=$(TARGET_HAS_BASEBAND) \
TARGET_CORE_PHY_TMR_LPCLK_CFG=0x00330087 \
TARGET_CORE_PHY_TMR_CFG=0x256f0000 \
DCS_NUM_RANKS=1 \
DCS_NUM_CHANNELS=4 \
DCS_FIXUP_PARAMS=1 \
TARGET_DWI_FREQUENCY=24000000 \
TARGET_DWI_TRANSFER_GAP_US=2.5 \
TARGET_DITHER_TYPE=DITHER_SPATIO_TEMPORAL \
TARGET_DITHER_INBITSREDUCTION=0 \
TARGET_DITHER_EDOUTTOSTINWIDTH=0 \
TARGET_DITHER_DITHEROUTWIDTH=3 \
TARGET_DITHER_ST_METHOD_MAX=3 \
TARGET_DITHER_ST_METHOD_POP=4 \
TARGET_DITHER_ST_PHASE=0x1a00 \
TARGET_DITHER_ST_SKEWLOC0=0 \
TARGET_DITHER_ST_SKEWLOC1=1 \
TARGET_DITHER_ST_SKEWLOC2=100 \
TARGET_DITHER_ST_SKEWLOC3=1023 \
TARGET_DITHER_ST_SKEWLOC4=1023 \
TARGET_DITHER_ST_SKEWLOC5=1023 \
TARGET_DITHER_ST_SKEWLOC6=1023 \
TARGET_DITHER_ST_SKEWLOC7=1023 \
TARGET_DITHER_ST_SKEWLOC8=1023 \
TARGET_DITHER_ST_SKEWLOC9=1023 \
TARGET_DITHER_ST_SKEWLOC10=1023 \
TARGET_DITHER_ST_SKEWLOC11=1023 \
TARGET_DITHER_ST_SKEWLOC12=1023 \
TARGET_DITHER_ST_SKEWLOC13=1023 \
TARGET_DITHER_ST_SKEWLOC14=1023 \
TARGET_USES_BLEND_CM=1 \
WITH_HW_KSF_BACKLIGHT=1 \
BUCK_CPU=0 \
BUCK_CPU_RAM=7 \
BUCK_SOC=2 \
BUCK_GPU=1 \
BUCK_GPU_RAM=8 \
WITH_CPU_APSC=1 \
PMU_LCD_PWR_EN=1 \
MULTITOUCH_DTPATH=\"arm-io/spi3/multi-touch\" \
WIFI_DTPATH=\"arm-io/uart2/wlan\" \
DP_DTPATH=\"arm-io/displayport0\" \
DPPHY_DTPATH=\"arm-io/lpdp-phy0\" \
BT_DTPATH=\"arm-io/uart3/bluetooth\" \
WITH_TARGET_USB_CONFIG=1
GLOBAL_INCLUDES += $(LOCAL_DIR)/include
ALL_OBJS += $(LOCAL_DIR)/init.o $(LOCAL_DIR)/pinconfig.o \
$(LOCAL_DIR)/pinconfig_proto2.o