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@@ -0,0 +1,33 @@
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/*
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* Copyright (C) 2015 Apple Inc. All rights reserved.
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*
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||||
* This document is the property of Apple Computer, Inc.
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* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
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*/
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#ifndef __TARGET_ADBE_SETTINGS_H
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#define __TARGET_ADBE_SETTINGS_H
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static struct adbe_v2_tuneable adbe_tuneables[] = {
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{
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.name = "ipad6b",
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.adbe0_vftgctl_idle_frame_vblank_enable = 1,
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.adbe0_vblank_pos_vbi_pulse = 0x012d,
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.adbe0_vblank_clk_gate_wakeup = 0x0007,
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.adbe0_vblank_clk_gate_idle = 0x0000,
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.adbe0_vblank_busy_finish = 0,
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.adbe0_tunable_mode_ctrl = (DBEMODECNTL_PMGR_CLK_GATE_ENABLE | \
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DBEMODECNTL_DYN_CLK_GATE_ENABLE | \
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DBEMODECNTL_BLK_CLK_GATE_ENABLE),
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.adbe0_aap_support = 1,
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.adbe0_aap_format_control_reg1 = (AAP_FORMAT_CONTROL_REG1_AUTOPOS |
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AAP_FORMAT_CONTROL_REG1_FCMODE(2) |
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AAP_FORMAT_CONTROL_REG1_RSVD(0) |
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AAP_FORMAT_CONTROL_REG1_VS_POL),
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},
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};
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#endif
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@@ -0,0 +1,35 @@
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/*
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||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
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||||
*
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||||
* This document is the property of Apple Inc.
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||||
* It is considered confidential and proprietary.
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||||
*
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||||
* This document may not be reproduced or transmitted in any form,
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||||
* in whole or in part, without the express written permission of
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||||
* Apple Inc.
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*/
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#ifndef TARGET_BOARDID_H
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#define TARGET_BOARDID_H
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// Board ids
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#define TARGET_BOARD_ID_J127AP (0x8)
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#define TARGET_BOARD_ID_J127DEV (0x9)
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#define TARGET_BOARD_ID_J128AP (0xA)
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#define TARGET_BOARD_ID_J128DEV (0xB)
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// Board revs - for info purposes
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/*
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J127_DEV1_BOARD_REV (0x0) // DEPRECIATED
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J127_DEV2_BOARD_REV (0x4)
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J127_PROTO0_BOARD_REV (0x0) // DEPRECIATED
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J127_PROTO0_A_BOARD_REV (0x1) // DEPRECIATED
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J127_PROTO0_B_BOARD_REV (0x2) // DEPRECIATED
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J127_PROTO1_BOARD_REV (0x3) // DEPRECIATED
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J127_PRE_PROTO2_BOARD_REV (0x4) // DEPRECIATED
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J127_PROTO2_MOHAVE_A1_BOARD_REV (0x5)
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J127_PROTO2_MOHAVE_A0_POR_BOARD_REV (0x6)
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*/
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#endif
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@@ -0,0 +1,16 @@
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/*
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* Copyright (C) 2015 Apple Inc. All rights reserved.
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||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
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*/
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static inline
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void dcs_init_config_fixup_params(dcs_config_params_t *dcs_params, dcs_target_t targtype)
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{
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dcs_params->chnldec = 0x00050110;
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};
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@@ -0,0 +1,604 @@
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/*
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* Copyright (C) 2013-2015 Apple Inc. All rights reserved.
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*
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* This document is the property of Apple Computer, Inc.
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||||
* It is considered confidential and proprietary.
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||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
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||||
* in whole or in part, without the express written permission of
|
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* Apple Inc.
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*/
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#ifndef __TARGET_DISPLAY_GAMMA_TABLES_H
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#define __TARGET_DISPLAY_GAMMA_TABLES_H
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/* display gamma tables */
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#define ADP_CM_DEGAMMA_PAIRED_LUT_COUNT 65
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#define ADP_CM_DEGAMMA_PAIRED_LUT_SIZE (ADP_CM_DEGAMMA_PAIRED_LUT_COUNT - 1)
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static const uint32_t target_blend_degamma_tables[ADP_CM_DEGAMMA_PAIRED_LUT_COUNT] = {
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0x00050000,
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0x000F000A,
|
||||
0x00190014,
|
||||
0x0024001E,
|
||||
0x0031002A,
|
||||
0x00410039,
|
||||
0x0054004A,
|
||||
0x006A005F,
|
||||
0x00820076,
|
||||
0x009E0090,
|
||||
0x00BD00AD,
|
||||
0x00DF00CD,
|
||||
0x010400F1,
|
||||
0x012C0118,
|
||||
0x01590142,
|
||||
0x01880170,
|
||||
0x01BC01A2,
|
||||
0x01F301D7,
|
||||
0x022E0210,
|
||||
0x026C024C,
|
||||
0x02AF028D,
|
||||
0x02F602D2,
|
||||
0x0340031A,
|
||||
0x038F0367,
|
||||
0x03E203B8,
|
||||
0x043A040D,
|
||||
0x04950467,
|
||||
0x04F504C5,
|
||||
0x055A0527,
|
||||
0x05C3058E,
|
||||
0x063005F9,
|
||||
0x06A20669,
|
||||
0x071906DD,
|
||||
0x07940756,
|
||||
0x081407D4,
|
||||
0x08990856,
|
||||
0x092308DE,
|
||||
0x09B2096A,
|
||||
0x0A4609FB,
|
||||
0x0ADF0A92,
|
||||
0x0B7C0B2D,
|
||||
0x0C1F0BCD,
|
||||
0x0CC70C73,
|
||||
0x0D740D1D,
|
||||
0x0E270DCD,
|
||||
0x0EDF0E82,
|
||||
0x0F9C0F3C,
|
||||
0x105E0FFC,
|
||||
0x112610C1,
|
||||
0x11F3118C,
|
||||
0x12C6125C,
|
||||
0x139E1331,
|
||||
0x147C140D,
|
||||
0x156014ED,
|
||||
0x164915D4,
|
||||
0x173816C0,
|
||||
0x182C17B1,
|
||||
0x192718A9,
|
||||
0x1A2719A6,
|
||||
0x1B2D1AA9,
|
||||
0x1C391BB2,
|
||||
0x1D4B1CC1,
|
||||
0x1E621DD6,
|
||||
0x1F801EF0,
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||||
0x29F42011,
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||||
};
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#define ADP_CM_ENGAMMA_PAIRED_LUT_COUNT 513
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#define ADP_CM_ENGAMMA_PAIRED_LUT_SIZE (ADP_CM_ENGAMMA_PAIRED_LUT_COUNT - 1)
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static const uint32_t target_blend_engamma_tables[ADP_CM_ENGAMMA_PAIRED_LUT_COUNT] = {
|
||||
0x000D0000,
|
||||
0x0026001A,
|
||||
0x003D0033,
|
||||
0x004F0047,
|
||||
0x005E0057,
|
||||
0x006B0065,
|
||||
0x00770071,
|
||||
0x0081007C,
|
||||
0x008B0087,
|
||||
0x00950090,
|
||||
0x009D0099,
|
||||
0x00A500A2,
|
||||
0x00AD00AA,
|
||||
0x00B500B1,
|
||||
0x00BC00B8,
|
||||
0x00C300C0,
|
||||
0x00CA00C6,
|
||||
0x00D000CD,
|
||||
0x00D600D3,
|
||||
0x00DC00D9,
|
||||
0x00E200DF,
|
||||
0x00E800E5,
|
||||
0x00ED00EB,
|
||||
0x00F300F0,
|
||||
0x00F800F5,
|
||||
0x00FD00FA,
|
||||
0x01020100,
|
||||
0x01070104,
|
||||
0x010C0109,
|
||||
0x0110010E,
|
||||
0x01150113,
|
||||
0x01190117,
|
||||
0x011E011C,
|
||||
0x01220120,
|
||||
0x01270124,
|
||||
0x012B0129,
|
||||
0x012F012D,
|
||||
0x01330131,
|
||||
0x01370135,
|
||||
0x013B0139,
|
||||
0x013F013D,
|
||||
0x01430141,
|
||||
0x01460144,
|
||||
0x014A0148,
|
||||
0x014E014C,
|
||||
0x01510150,
|
||||
0x01550153,
|
||||
0x01590157,
|
||||
0x015C015A,
|
||||
0x015F015E,
|
||||
0x01630161,
|
||||
0x01660165,
|
||||
0x016A0168,
|
||||
0x016D016B,
|
||||
0x0170016F,
|
||||
0x01730172,
|
||||
0x01770175,
|
||||
0x017A0178,
|
||||
0x017D017B,
|
||||
0x0180017E,
|
||||
0x01830181,
|
||||
0x01860185,
|
||||
0x01890188,
|
||||
0x018C018B,
|
||||
0x018F018E,
|
||||
0x01920190,
|
||||
0x01950193,
|
||||
0x01980196,
|
||||
0x019B0199,
|
||||
0x019D019C,
|
||||
0x01A0019F,
|
||||
0x01A301A2,
|
||||
0x01A601A4,
|
||||
0x01A801A7,
|
||||
0x01AB01AA,
|
||||
0x01AE01AD,
|
||||
0x01B101AF,
|
||||
0x01B301B2,
|
||||
0x01B601B5,
|
||||
0x01B801B7,
|
||||
0x01BB01BA,
|
||||
0x01BE01BC,
|
||||
0x01C001BF,
|
||||
0x01C301C1,
|
||||
0x01C501C4,
|
||||
0x01C801C6,
|
||||
0x01CA01C9,
|
||||
0x01CD01CB,
|
||||
0x01CF01CE,
|
||||
0x01D201D0,
|
||||
0x01D401D3,
|
||||
0x01D601D5,
|
||||
0x01D901D8,
|
||||
0x01DB01DA,
|
||||
0x01DE01DC,
|
||||
0x01E001DF,
|
||||
0x01E201E1,
|
||||
0x01E501E3,
|
||||
0x01E701E6,
|
||||
0x01E901E8,
|
||||
0x01EB01EA,
|
||||
0x01EE01ED,
|
||||
0x01F001EF,
|
||||
0x01F201F1,
|
||||
0x01F401F3,
|
||||
0x01F701F5,
|
||||
0x01F901F8,
|
||||
0x01FB01FA,
|
||||
0x01FD01FC,
|
||||
0x01FF01FE,
|
||||
0x02010200,
|
||||
0x02040203,
|
||||
0x02060205,
|
||||
0x02080207,
|
||||
0x020A0209,
|
||||
0x020C020B,
|
||||
0x020E020D,
|
||||
0x0210020F,
|
||||
0x02120211,
|
||||
0x02140213,
|
||||
0x02160215,
|
||||
0x02180217,
|
||||
0x021A0219,
|
||||
0x021D021C,
|
||||
0x021E021E,
|
||||
0x02210220,
|
||||
0x02220222,
|
||||
0x02240224,
|
||||
0x02260225,
|
||||
0x02280227,
|
||||
0x022A0229,
|
||||
0x022C022B,
|
||||
0x022E022D,
|
||||
0x0230022F,
|
||||
0x02320231,
|
||||
0x02340233,
|
||||
0x02360235,
|
||||
0x02380237,
|
||||
0x023A0239,
|
||||
0x023C023B,
|
||||
0x023D023D,
|
||||
0x023F023E,
|
||||
0x02410240,
|
||||
0x02430242,
|
||||
0x02450244,
|
||||
0x02470246,
|
||||
0x02490248,
|
||||
0x024A0249,
|
||||
0x024C024B,
|
||||
0x024E024D,
|
||||
0x0250024F,
|
||||
0x02520251,
|
||||
0x02530252,
|
||||
0x02550254,
|
||||
0x02570256,
|
||||
0x02590258,
|
||||
0x025A025A,
|
||||
0x025C025B,
|
||||
0x025E025D,
|
||||
0x0260025F,
|
||||
0x02610261,
|
||||
0x02630262,
|
||||
0x02650264,
|
||||
0x02670266,
|
||||
0x02680267,
|
||||
0x026A0269,
|
||||
0x026C026B,
|
||||
0x026D026C,
|
||||
0x026F026E,
|
||||
0x02710270,
|
||||
0x02720272,
|
||||
0x02740273,
|
||||
0x02760275,
|
||||
0x02770276,
|
||||
0x02790278,
|
||||
0x027B027A,
|
||||
0x027C027B,
|
||||
0x027E027D,
|
||||
0x0280027F,
|
||||
0x02810280,
|
||||
0x02830282,
|
||||
0x02840284,
|
||||
0x02860285,
|
||||
0x02880287,
|
||||
0x02890288,
|
||||
0x028B028A,
|
||||
0x028C028C,
|
||||
0x028E028D,
|
||||
0x028F028F,
|
||||
0x02910290,
|
||||
0x02930292,
|
||||
0x02940293,
|
||||
0x02960295,
|
||||
0x02970297,
|
||||
0x02990298,
|
||||
0x029A029A,
|
||||
0x029C029B,
|
||||
0x029D029D,
|
||||
0x029F029E,
|
||||
0x02A102A0,
|
||||
0x02A202A1,
|
||||
0x02A402A3,
|
||||
0x02A502A4,
|
||||
0x02A702A6,
|
||||
0x02A802A7,
|
||||
0x02AA02A9,
|
||||
0x02AB02AA,
|
||||
0x02AD02AC,
|
||||
0x02AE02AD,
|
||||
0x02B002AF,
|
||||
0x02B102B0,
|
||||
0x02B202B2,
|
||||
0x02B402B3,
|
||||
0x02B502B5,
|
||||
0x02B702B6,
|
||||
0x02B802B8,
|
||||
0x02BA02B9,
|
||||
0x02BB02BB,
|
||||
0x02BD02BC,
|
||||
0x02BE02BD,
|
||||
0x02C002BF,
|
||||
0x02C102C0,
|
||||
0x02C202C2,
|
||||
0x02C402C3,
|
||||
0x02C502C5,
|
||||
0x02C702C6,
|
||||
0x02C802C7,
|
||||
0x02CA02C9,
|
||||
0x02CB02CA,
|
||||
0x02CC02CC,
|
||||
0x02CE02CD,
|
||||
0x02CF02CE,
|
||||
0x02D102D0,
|
||||
0x02D202D1,
|
||||
0x02D302D3,
|
||||
0x02D502D4,
|
||||
0x02D602D5,
|
||||
0x02D702D7,
|
||||
0x02D902D8,
|
||||
0x02DA02D9,
|
||||
0x02DC02DB,
|
||||
0x02DD02DC,
|
||||
0x02DE02DE,
|
||||
0x02E002DF,
|
||||
0x02E102E0,
|
||||
0x02E202E2,
|
||||
0x02E402E3,
|
||||
0x02E502E4,
|
||||
0x02E602E6,
|
||||
0x02E802E7,
|
||||
0x02E902E8,
|
||||
0x02EA02EA,
|
||||
0x02EC02EB,
|
||||
0x02ED02EC,
|
||||
0x02EE02EE,
|
||||
0x02F002EF,
|
||||
0x02F102F0,
|
||||
0x02F202F2,
|
||||
0x02F402F3,
|
||||
0x02F502F4,
|
||||
0x02F602F6,
|
||||
0x02F802F7,
|
||||
0x02F902F8,
|
||||
0x02FA02F9,
|
||||
0x02FB02FB,
|
||||
0x02FD02FC,
|
||||
0x02FE02FD,
|
||||
0x02FF02FF,
|
||||
0x03010300,
|
||||
0x03020301,
|
||||
0x03030302,
|
||||
0x03040304,
|
||||
0x03060305,
|
||||
0x03070306,
|
||||
0x03080308,
|
||||
0x03090309,
|
||||
0x030B030A,
|
||||
0x030C030B,
|
||||
0x030D030D,
|
||||
0x030E030E,
|
||||
0x0310030F,
|
||||
0x03110310,
|
||||
0x03120312,
|
||||
0x03130313,
|
||||
0x03150314,
|
||||
0x03160315,
|
||||
0x03170317,
|
||||
0x03180318,
|
||||
0x031A0319,
|
||||
0x031B031A,
|
||||
0x031C031B,
|
||||
0x031D031D,
|
||||
0x031E031E,
|
||||
0x0320031F,
|
||||
0x03210320,
|
||||
0x03220322,
|
||||
0x03230323,
|
||||
0x03250324,
|
||||
0x03260325,
|
||||
0x03270326,
|
||||
0x03280328,
|
||||
0x03290329,
|
||||
0x032B032A,
|
||||
0x032C032B,
|
||||
0x032D032C,
|
||||
0x032E032E,
|
||||
0x032F032F,
|
||||
0x03300330,
|
||||
0x03320331,
|
||||
0x03330332,
|
||||
0x03340333,
|
||||
0x03350335,
|
||||
0x03360336,
|
||||
0x03380337,
|
||||
0x03390338,
|
||||
0x033A0339,
|
||||
0x033B033A,
|
||||
0x033C033C,
|
||||
0x033D033D,
|
||||
0x033F033E,
|
||||
0x0340033F,
|
||||
0x03410340,
|
||||
0x03420341,
|
||||
0x03430343,
|
||||
0x03440344,
|
||||
0x03450345,
|
||||
0x03470346,
|
||||
0x03480347,
|
||||
0x03490348,
|
||||
0x034A0349,
|
||||
0x034B034B,
|
||||
0x034C034C,
|
||||
0x034D034D,
|
||||
0x034F034E,
|
||||
0x0350034F,
|
||||
0x03510350,
|
||||
0x03520351,
|
||||
0x03530352,
|
||||
0x03540354,
|
||||
0x03550355,
|
||||
0x03560356,
|
||||
0x03570357,
|
||||
0x03590358,
|
||||
0x035A0359,
|
||||
0x035B035A,
|
||||
0x035C035B,
|
||||
0x035D035C,
|
||||
0x035E035E,
|
||||
0x035F035F,
|
||||
0x03600360,
|
||||
0x03610361,
|
||||
0x03620362,
|
||||
0x03640363,
|
||||
0x03650364,
|
||||
0x03660365,
|
||||
0x03670366,
|
||||
0x03680367,
|
||||
0x03690368,
|
||||
0x036A036A,
|
||||
0x036B036B,
|
||||
0x036C036C,
|
||||
0x036D036D,
|
||||
0x036E036E,
|
||||
0x036F036F,
|
||||
0x03710370,
|
||||
0x03720371,
|
||||
0x03730372,
|
||||
0x03740373,
|
||||
0x03750374,
|
||||
0x03760375,
|
||||
0x03770376,
|
||||
0x03780377,
|
||||
0x03790379,
|
||||
0x037A037A,
|
||||
0x037B037B,
|
||||
0x037C037C,
|
||||
0x037D037D,
|
||||
0x037E037E,
|
||||
0x037F037F,
|
||||
0x03800380,
|
||||
0x03810381,
|
||||
0x03830382,
|
||||
0x03840383,
|
||||
0x03850384,
|
||||
0x03860385,
|
||||
0x03870386,
|
||||
0x03880387,
|
||||
0x03890388,
|
||||
0x038A0389,
|
||||
0x038B038A,
|
||||
0x038C038B,
|
||||
0x038D038C,
|
||||
0x038E038D,
|
||||
0x038F038E,
|
||||
0x0390038F,
|
||||
0x03910390,
|
||||
0x03920391,
|
||||
0x03930393,
|
||||
0x03940394,
|
||||
0x03950395,
|
||||
0x03960396,
|
||||
0x03970397,
|
||||
0x03980398,
|
||||
0x03990399,
|
||||
0x039A039A,
|
||||
0x039B039B,
|
||||
0x039C039C,
|
||||
0x039D039D,
|
||||
0x039E039E,
|
||||
0x039F039F,
|
||||
0x03A003A0,
|
||||
0x03A103A1,
|
||||
0x03A203A2,
|
||||
0x03A303A3,
|
||||
0x03A403A4,
|
||||
0x03A503A5,
|
||||
0x03A603A6,
|
||||
0x03A703A7,
|
||||
0x03A803A8,
|
||||
0x03A903A9,
|
||||
0x03AA03AA,
|
||||
0x03AB03AB,
|
||||
0x03AC03AC,
|
||||
0x03AD03AD,
|
||||
0x03AE03AD,
|
||||
0x03AF03AE,
|
||||
0x03B003AF,
|
||||
0x03B103B0,
|
||||
0x03B203B1,
|
||||
0x03B303B2,
|
||||
0x03B403B3,
|
||||
0x03B503B4,
|
||||
0x03B603B5,
|
||||
0x03B703B6,
|
||||
0x03B803B7,
|
||||
0x03B903B8,
|
||||
0x03BA03B9,
|
||||
0x03BB03BA,
|
||||
0x03BC03BB,
|
||||
0x03BD03BC,
|
||||
0x03BD03BD,
|
||||
0x03BE03BE,
|
||||
0x03BF03BF,
|
||||
0x03C003C0,
|
||||
0x03C103C1,
|
||||
0x03C203C2,
|
||||
0x03C303C3,
|
||||
0x03C403C4,
|
||||
0x03C503C5,
|
||||
0x03C603C6,
|
||||
0x03C703C7,
|
||||
0x03C803C7,
|
||||
0x03C903C8,
|
||||
0x03CA03C9,
|
||||
0x03CB03CA,
|
||||
0x03CC03CB,
|
||||
0x03CD03CC,
|
||||
0x03CE03CD,
|
||||
0x03CF03CE,
|
||||
0x03CF03CF,
|
||||
0x03D003D0,
|
||||
0x03D103D1,
|
||||
0x03D203D2,
|
||||
0x03D303D3,
|
||||
0x03D403D4,
|
||||
0x03D503D5,
|
||||
0x03D603D6,
|
||||
0x03D703D6,
|
||||
0x03D803D7,
|
||||
0x03D903D8,
|
||||
0x03DA03D9,
|
||||
0x03DB03DA,
|
||||
0x03DC03DB,
|
||||
0x03DC03DC,
|
||||
0x03DD03DD,
|
||||
0x03DE03DE,
|
||||
0x03DF03DF,
|
||||
0x03E003E0,
|
||||
0x03E103E1,
|
||||
0x03E203E2,
|
||||
0x03E303E2,
|
||||
0x03E403E3,
|
||||
0x03E503E4,
|
||||
0x03E603E5,
|
||||
0x03E703E6,
|
||||
0x03E703E7,
|
||||
0x03E803E8,
|
||||
0x03E903E9,
|
||||
0x03EA03EA,
|
||||
0x03EB03EB,
|
||||
0x03EC03EB,
|
||||
0x03ED03EC,
|
||||
0x03EE03ED,
|
||||
0x03EF03EE,
|
||||
0x03F003EF,
|
||||
0x03F003F0,
|
||||
0x03F103F1,
|
||||
0x03F203F2,
|
||||
0x03F303F3,
|
||||
0x03F403F4,
|
||||
0x03F503F4,
|
||||
0x03F603F5,
|
||||
0x03F703F6,
|
||||
0x03F803F7,
|
||||
0x03F803F8,
|
||||
0x03F903F9,
|
||||
0x03FA03FA,
|
||||
0x03FB03FB,
|
||||
0x03FC03FC,
|
||||
0x03FD03FC,
|
||||
0x03FE03FD,
|
||||
0x03FF03FE,
|
||||
0x043503FF
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_GPIODEF_H
|
||||
#define __TARGET_GPIODEF_H
|
||||
|
||||
/* ipad6,x specific gpio -> pin mappings */
|
||||
|
||||
#include <platform/gpio.h>
|
||||
|
||||
/* define target-specific gpios in a generic fashion here. */
|
||||
|
||||
/* Board Revision */
|
||||
#define GPIO_BOARD_REV0 GPIO(14, 4) // 116 : GPIO[44]
|
||||
#define GPIO_BOARD_REV1 GPIO(14, 5) // 117 : GPIO[45]
|
||||
#define GPIO_BOARD_REV2 GPIO(14, 6) // 118 : GPIO[46]
|
||||
#define GPIO_BOARD_REV3 GPIO(15, 1) // 121 : GPIO[49]
|
||||
|
||||
/* Miscellaneous Pins */
|
||||
#define GPIO_DISPLAY_HPD GPIO(24, 2) // 194: EPD_HPD0 -> LPDP_TCON_TO_SOC_HPD
|
||||
|
||||
#define GPIO_S3E_BOOT_FROM_HOST GPIO_ID(76) // 76 : GPIO[2] -> GPIO_SOC_TO_NAND_FW_STRAP
|
||||
|
||||
#define GPIO_TOUCH_SENSOR_ID GPIO(10, 5) // 85 : GPIO[11] -> TOUCH_SENSOR_ID0
|
||||
|
||||
/* which IICs to initialize */
|
||||
#define IICS_MASK (0xF)
|
||||
|
||||
#define TRISTAR_IIC_BUS (0)
|
||||
#define BACKLIGHT_IIC_BUS (0)
|
||||
#define DISPLAY_PMU_IIC_BUS (0)
|
||||
|
||||
#define GPIO_PMU_LCD_PWR_EN (17) // PMU GPIO 18 - GPIO_PMU_TO_LCD_PWREN
|
||||
#define GPIO_PMU_NAND_LOW_POWER_MODE (15) // PMU GPIO 16 - GPIO_PMU_TO_NAND_LOW_BATT_L
|
||||
|
||||
#endif /* ! __TARGET_GPIODEF_H */
|
||||
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef LPDP_SETTINGS_H
|
||||
#define LPDP_SETTINGS_H
|
||||
|
||||
static struct lpdp_port_calibration lpdp_port_calibration_table[1][1] = {
|
||||
{ {LPDP_PHY_LANE_VREG_ADJ_450_mV, 0}, },
|
||||
};
|
||||
|
||||
#define LPDP_PORT_CALIBRATION_TABLE_FIXED (true)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,256 @@
|
||||
#ifndef __TARGET_POWERCONFIG_H
|
||||
#define __TARGET_POWERCONFIG_H
|
||||
|
||||
// Configuration per target
|
||||
|
||||
#define PMU_IIC_BUS 0
|
||||
#define CHARGER_IIC_BUS 0
|
||||
|
||||
|
||||
// This configuration is very PMU specific and must be included exactly
|
||||
// once in power.c
|
||||
#ifdef POWERCONFIG_PMU_SETUP
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_warm_setup[] =
|
||||
{
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_ldo_cold_setup[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD2257_EN_CMD0, (1<<7)|(1<<3)|(1<<2)|(1<<1)|(1<<0) },
|
||||
{ PMU_IIC_BUS, kD2257_EN_CMD1, (1<<0) }, // buck8
|
||||
{ PMU_IIC_BUS, kD2257_EN_CMD2, 1 }, // enable WLED SPI access
|
||||
{ PMU_IIC_BUS, kD2257_SPI_CTRL, 1 } // enable SPI access
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_warm_init[] =
|
||||
{
|
||||
};
|
||||
|
||||
// IO_CONFIG[7:6] 0=I 1=O_OD 2=O_PP 3=SS
|
||||
// IO_TYPE[5:3] O 0=L 1=32K 2=nR 3=TI 4=L
|
||||
// PUPD[2:1] O 0=NP 1=PU 2=NP 3=<0>
|
||||
// WAKE_LVL[0] O 0=low 1=high
|
||||
// IO_TYPE[5:3] I 0=L_AH 1=L_AL 2=RE 3=FE 4=AE
|
||||
// PUPD[2:1] I 0=NP 1=PU 2=PD_GND 3=<0>
|
||||
// WAKE_LVL[0] I 0=NW 1=W
|
||||
//
|
||||
// <rdar://problem/19493772> J127 GPIO Spreadsheet (master)
|
||||
// J127_IO_spreadsheet_v26 (EVT).xlsx
|
||||
static const struct pmu_setup_struct pmu_cold_init[] =
|
||||
{
|
||||
// TODO :This is a Bringup Hack, remove
|
||||
{ PMU_IIC_BUS, kD2257_BUCK0_VSEL, 0xc0 }, // CPU rail
|
||||
{ PMU_IIC_BUS, kD2257_BUCK1_VSEL, 0xc0 }, // GPU rail
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK1_EN, 0xf }, // GPU power rail (see <rdar://problem/19733370>)
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK8_EN, 0xf }, // GPU RAM power rail (see <rdar://problem/19733370>)
|
||||
// TODO :This is a Bringup Hack, remove
|
||||
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_BUCK3_SW2_EN, 0xf}, // <rdar://20080883> J99A/J127: Keep DVDD power rail on to avoid speaker pops (work around HW issue)
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_LDO4_EN, 0x1 }, // Enable PP3V0_ALS
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_LDO7_EN, 0x1 }, // Enable PP3V3_USB_SOC
|
||||
|
||||
{ PMU_IIC_BUS, kD2257_LDO2_BYPASS, 0x1}, // bypass when Active rdar://19773152
|
||||
|
||||
// Drive GPIO_PMU_TO_1V1_EXT_SW_ON (PMU GPIO 20) to enable PP1V1_S1_EXT_SW
|
||||
// which inturn is SNSI_PP1V1_S1_DDR_VDDQ_x.
|
||||
//
|
||||
// Should be ON by default via OTP.
|
||||
|
||||
// Drive GPIO_PMU_TO_1V8_EXT_SW2_ON (PMU GPIO 21) to enable PP1V8_S2_EXT_SW2
|
||||
// which inturn is PP1V8_S2_IO_EXPANDER.
|
||||
//
|
||||
// Should be ON by default via OTP.
|
||||
|
||||
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_ENA }, // Enable Test Mode
|
||||
{ PMU_IIC_BUS, kD2257_EN_CMD3, 0}, // Enable SPI access for BUCKx (x=3)
|
||||
{ PMU_IIC_BUS, kDIALOG_TEST_ACCESS, kDIALOG_TEST_ACCESS_DIS }, // Disable Test Mode
|
||||
|
||||
// GPIO1: GPIO_AJ_HALL_TO_PMU_IRQ_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO1_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
|
||||
{ PMU_IIC_BUS, kD2257_GPIO1_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO2: GPIO_ACC_TO_PMU_PWR_SW_OC_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO2_CONF1, (0<<6)|(3<<3)|(0<<1)|(0<<0) }, // 0x18 Input, AnyE, No PU/PD
|
||||
{ PMU_IIC_BUS, kD2257_GPIO2_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
|
||||
|
||||
// GPIO3: GPIO_ORION_TO_SOC_TO_PMU_IRQ
|
||||
{ PMU_IIC_BUS, kD2257_GPIO3_CONF1, (0<<6)|(0<<3)|(2<<1)|(1<<0) }, // 0x25 Input, AH, PD, Wakeup
|
||||
{ PMU_IIC_BUS, kD2257_GPIO3_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO4: GPIO_PMU_TO_ACC_PWR_SW (was GPIO_PMU_TO_ACC_PWR_SEL)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO4_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO4_CONF2, (0<<3)|(0<<0) }, // 0x00 VCC_MAIN, no DEB
|
||||
|
||||
// GPIO6: UART_BATT_HDQ
|
||||
{ PMU_IIC_BUS, kD2257_GPIO6_CONF1, (0<<6)|(3<<3)|(0<<1)|(1<<0) }, // 0x19 Input, FE, No PU/PD
|
||||
{ PMU_IIC_BUS, kD2257_GPIO6_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
|
||||
|
||||
// GPIO7: GPIO_BT_TO_PMU_HOST_WAKE
|
||||
{ PMU_IIC_BUS, kD2257_GPIO7_CONF1, (0<<6)|(2<<3)|(0<<1)|(1<<0) }, // 0x11 Input, RE, No PU/PD, Wakeup
|
||||
{ PMU_IIC_BUS, kD2257_GPIO7_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO8: GPIO_WLAN_TO_PMU_HOST_WAKE
|
||||
{ PMU_IIC_BUS, kD2257_GPIO8_CONF1, (0<<6)|(2<<3)|(2<<1)|(1<<0) }, // 0x15 Input, RE, PD, Wakeup
|
||||
{ PMU_IIC_BUS, kD2257_GPIO8_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO10: GPIO_CODEC_TO_PMU_WAKE_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO10_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, Wakeup
|
||||
{ PMU_IIC_BUS, kD2257_GPIO10_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
|
||||
|
||||
// GPIO11: GPIO_STB_HALL_TO_PMU_IRQ_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO11_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
|
||||
{ PMU_IIC_BUS, kD2257_GPIO11_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO12: GPIO_TS_TO_SOC_TO_PMU_IRQ
|
||||
{ PMU_IIC_BUS, kD2257_GPIO12_CONF1, (0<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x01 Input, AH, No PU/PD, Wakeup
|
||||
{ PMU_IIC_BUS, kD2257_GPIO12_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
// GPIO13: GPIO_BELFIELD_TO_PMU_WAKE_L (was GPIO_IO_EXP_TO_PMU_IRQ)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO13_CONF1, (0<<6)|(4<<3)|(1<<1)|(1<<0) }, // 0x23 Input, AnyE, PU, WakeUp
|
||||
{ PMU_IIC_BUS, kD2257_GPIO13_CONF2, (1<<3)|(2<<0) }, // 0x0A VBUCK3, 10ms
|
||||
|
||||
// GPIO14: GPIO_EUPHRATES_TO_PMU_WAKE (was PCIE_WLAN_TO_PMU_WAKE_L)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO14_CONF1, (0<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x01 Input, AH, No PU/PD, WakeUp
|
||||
{ PMU_IIC_BUS, kD2257_GPIO14_CONF2, (3<<3)|(1<<0) }, // 0x19 PP1V8_ALWAYS, 5ms
|
||||
|
||||
// GPIO15: GPIO_EUPHRATES_TO_SOC_TO_PMU_IRQ_L (was GPIO_PMU_TO_CODEC_RESET_L)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO15_CONF1, (0<<6)|(3<<3)|(1<<1)|(1<<0) }, // 0x1B Input, FE, PU, WakeUp
|
||||
{ PMU_IIC_BUS, kD2257_GPIO15_CONF2, (3<<3)|(2<<0) }, // 0x1A PP1V8_ALWAYS, 10ms
|
||||
|
||||
// GPIO16: GPIO_PMU_TO_NAND_LOW_BATT_L
|
||||
// kD2257_GPIO16_CONF1 gets set in target_late_init()
|
||||
{ PMU_IIC_BUS, kD2257_GPIO16_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO18: Enable GPIO_PMU_TO_LCD_PWREN
|
||||
{ PMU_IIC_BUS, kD2257_GPIO18_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO18_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO9: GPIO_BB_TO_PMU_HOST_WAKE_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO9_CONF1, (0<<6)|(1<<3)|(2<<1)|(0<<0) }, // 0x0C Input, AL, PD
|
||||
{ PMU_IIC_BUS, kD2257_GPIO9_CONF2, (1<<3)|(1<<0) }, // 0x09 VBUCK3, 5ms
|
||||
|
||||
#if TARGET_HAS_BASEBAND
|
||||
// GPIO5: GPIO_PMU_TO_BBPMU_RESET_R_L (rdar://20064772, rdar://20110706, rdar://21211826)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO5_CONF1, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, no PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO5_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO17: GPIO_PMU_TO_BB_VBUS_DET
|
||||
{ PMU_IIC_BUS, kD2257_GPIO17_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO17_CONF2, (0<<3)|(0<<0) }, // 0x00 VCC_MAIN, no DEB
|
||||
#else
|
||||
// GPIO5: GPIO_PMU_TO_BBPMU_RESET_R_L
|
||||
{ PMU_IIC_BUS, kD2257_GPIO5_CONF1, (0<<6)|(0<<3)|(2<<1)|(0<<0) }, // 0x40 Input, AH, PD
|
||||
{ PMU_IIC_BUS, kD2257_GPIO5_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO17: GPIO_PMU_TO_BB_VBUS_DET
|
||||
{ PMU_IIC_BUS, kD2257_GPIO17_CONF1, (0<<6)|(0<<3)|(2<<1)|(0<<0) }, // 0x40 Input, AH, PD
|
||||
{ PMU_IIC_BUS, kD2257_GPIO17_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
#endif
|
||||
|
||||
// GPIO19: GPIO_PMU_TO_EUPHRATES_LINCH_EN (was GPIO_GANGES_TO_PMU_WAKE)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP1,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP2,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_SLP3,(1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1_OFF, (1<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x40 Output(Open Drain), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF1, (1<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x41 Output(Open Drain), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO19_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO20: GPIO_PMU_TO_1V1_EXT_SW_ON
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO20_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO21: GPIO_PMU_TO_1V8_EXT_SW2_ON
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO21_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
|
||||
// GPIO22: GPIO_PMU_TO_3V3_EXT_SW_ON (was GPIO_GANGES_TO_SOC_TO_PMU_IRQ_L)
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP1,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP2,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_SLP3,(2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1_OFF, (2<<6)|(0<<3)|(0<<1)|(0<<0) }, // 0x80 Output(Push-Pull), Level, No PU/PD, Low
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF1, (2<<6)|(0<<3)|(0<<1)|(1<<0) }, // 0x81 Output(Push-Pull), Level, No PU/PD, High
|
||||
{ PMU_IIC_BUS, kD2257_GPIO22_CONF2, (1<<3)|(0<<0) }, // 0x08 VBUCK3, no DEB
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_enable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET, 0x06 }, // 75% of max 0x7FF
|
||||
{ PMU_IIC_BUS, kDIALOG_WLED_ISET2, 0x00 },
|
||||
{ PMU_IIC_BUS, kD2257_WLED_CTRL1, // enable all LED strings
|
||||
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
|
||||
{ PMU_IIC_BUS, kD2257_WLED_CTRL2, // enable all LED strings
|
||||
(kDIALOG_WLED_CONTROL_WLED_ENABLE1 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE2 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE3 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE4 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE5 |
|
||||
kDIALOG_WLED_CONTROL_WLED_ENABLE6) },
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDA_EN, 0x1 }, // enable LED Power
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDB_EN, 0x1 }, // enable LED Power
|
||||
};
|
||||
|
||||
static const struct pmu_setup_struct pmu_backlight_disable[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDA_EN, 0x0 }, // disable LED Power
|
||||
{ PMU_IIC_BUS, kD2257_PWRONOFF_WLEDB_EN, 0x0 }, // disable LED Power
|
||||
};
|
||||
|
||||
static const struct core_rails_struct soc_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kD2257_BUCK2_VSEL }
|
||||
};
|
||||
|
||||
static const struct core_rails_struct cpu_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kD2257_BUCK0_VSEL }
|
||||
};
|
||||
|
||||
// It's VDD FIXED! used for RAM inside the SOC
|
||||
static const struct core_rails_struct ram_rails[] =
|
||||
{
|
||||
{ PMU_IIC_BUS, 0, kD2257_BUCK5_VSEL }
|
||||
};
|
||||
|
||||
// This is indexed with POWER_RAIL_*, I really just need to use the
|
||||
// index in LDO[]
|
||||
target_rails_t target_rails = {
|
||||
{ 0x10, 450, 1250, 3125 }, // POWER_RAIL_CPU, BUCK0
|
||||
{ 0x15, 600, 1400, 3125 }, // POWER_RAIL_VDD_FIXED BUCK5
|
||||
{ 0x12, 600, 1400, 3125 }, // POWER_RAIL_SOC, BUCK2
|
||||
|
||||
{ 0x17, 600, 1400, 3125 }, // POWER_RAIL_CPU_RAM, BUCK7
|
||||
{ 0x11, 450, 1250, 3125 }, // POWER_RAIL_GPU, BUCK1
|
||||
{ 0x18, 600, 1400, 3125 }, // POWER_RAIL_GPU_RAM, BUCK8
|
||||
};
|
||||
|
||||
#endif // POWERCONFIG_PMU_SETUP
|
||||
|
||||
#define NO_BATTERY_VOLTAGE 2700
|
||||
#define MIN_BOOT_BATTERY_VOLTAGE 3600
|
||||
#define TARGET_BOOT_BATTERY_VOLTAGE 3700
|
||||
#define TARGET_BOOT_BATTERY_CAPACITY 50
|
||||
#define PRECHARGE_BACKLIGHT_LEVEL 824
|
||||
#define ALWAYS_BOOT_BATTERY_VOLTAGE (TARGET_BOOT_BATTERY_VOLTAGE + 100)
|
||||
#define TARGET_MAX_USB_INPUT_CURRENT 2400
|
||||
|
||||
#define TARGET_PRECHARGE_ALWAYS_DISPLAY_IDLE 1
|
||||
|
||||
#define ACC_PWR_LDO (6)
|
||||
|
||||
#define GASGAUGE_BATTERYID_BLOCK 1
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,19 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_UARTCONFIG_H
|
||||
#define __TARGET_UARTCONFIG_H
|
||||
|
||||
/* define one debug serial ports */
|
||||
#define DEBUG_SERIAL_PORT (0)
|
||||
|
||||
#define HDQGAUGE_SERIAL_PORT (5)
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* Copyright (C) 2015 Apple Inc. All rights reserved.
|
||||
*
|
||||
* This document is the property of Apple Inc.
|
||||
* It is considered confidential and proprietary.
|
||||
*
|
||||
* This document may not be reproduced or transmitted in any form,
|
||||
* in whole or in part, without the express written permission of
|
||||
* Apple Inc.
|
||||
*/
|
||||
#ifndef __TARGET_USBCONFIG_H
|
||||
#define __TARGET_USBCONFIG_H
|
||||
|
||||
#ifdef USBPHY_OTGTUNE0
|
||||
|
||||
#undef USBPHY_OTGTUNE0
|
||||
#define USBPHY_OTGTUNE0 (0x37377B93)
|
||||
|
||||
#endif /* USBPHY_OTGTUNE0 */
|
||||
|
||||
#ifdef USBPHY_OTGTUNE1
|
||||
|
||||
#undef USBPHY_OTGTUNE1
|
||||
#define USBPHY_OTGTUNE1 (0x20C04)
|
||||
|
||||
#endif /* USBPHY_OTGTUNE1 */
|
||||
|
||||
|
||||
#endif /* __TARGET_USBCONFIG_H */
|
||||
Reference in new issue
Block a user